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fa506a92 SP |
1 | /* |
2 | * (C) Copyright 2007 | |
567fb852 | 3 | * Stelian Pop <stelian.pop@leadtechdesign.com> |
fa506a92 | 4 | * Lead Tech Design <www.leadtechdesign.com> |
dc39ae95 | 5 | * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
fa506a92 SP |
6 | * |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | #ifndef __ASM_ARM_ARCH_CLK_H__ | |
26 | #define __ASM_ARM_ARCH_CLK_H__ | |
27 | ||
28 | #include <asm/arch/hardware.h> | |
29 | ||
dc39ae95 JCPV |
30 | unsigned long get_cpu_clk_rate(void); |
31 | unsigned long get_main_clk_rate(void); | |
32 | unsigned long get_mck_clk_rate(void); | |
33 | unsigned long get_plla_clk_rate(void); | |
34 | unsigned long get_pllb_clk_rate(void); | |
35 | unsigned int get_pllb_init(void); | |
36 | ||
fa506a92 SP |
37 | static inline unsigned long get_macb_pclk_rate(unsigned int dev_id) |
38 | { | |
dc39ae95 | 39 | return get_mck_clk_rate(); |
fa506a92 SP |
40 | } |
41 | ||
42 | static inline unsigned long get_usart_clk_rate(unsigned int dev_id) | |
43 | { | |
dc39ae95 | 44 | return get_mck_clk_rate(); |
fa506a92 SP |
45 | } |
46 | ||
39cf4804 SP |
47 | static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id) |
48 | { | |
dc39ae95 | 49 | return get_mck_clk_rate(); |
39cf4804 SP |
50 | } |
51 | ||
22ee6473 SG |
52 | static inline unsigned long get_spi_clk_rate(unsigned int dev_id) |
53 | { | |
54 | return get_mck_clk_rate(); | |
55 | } | |
56 | ||
dc39ae95 JCPV |
57 | static inline unsigned long get_twi_clk_rate(unsigned int dev_id) |
58 | { | |
59 | return get_mck_clk_rate(); | |
60 | } | |
39cf4804 | 61 | |
dc39ae95 | 62 | int at91_clock_init(unsigned long main_clock); |
fa506a92 | 63 | #endif /* __ASM_ARM_ARCH_CLK_H__ */ |