[people/ms/u-boot.git] / arch / arm / include / asm / arch-kirkwood / kirkwood.h

/*
 * (C) Copyright 2009
 * Marvell Semiconductor <www.marvell.com>
 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
 *
 * Header file for the Marvell's Feroceon CPU core.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _ASM_ARCH_KIRKWOOD_H
#define _ASM_ARCH_KIRKWOOD_H

#if defined (CONFIG_FEROCEON_88FR131) || defined (CONFIG_SHEEVA_88SV131)

/* SOC specific definations */
#define INTREG_BASE			0xd0000000
#define KW_REGISTER(x)			(KW_REGS_PHY_BASE + x)
#define KW_OFFSET_REG			(INTREG_BASE + 0x20080)

/* undocumented registers */
#define KW_REG_UNDOC_0x1470		(KW_REGISTER(0x1470))
#define KW_REG_UNDOC_0x1478		(KW_REGISTER(0x1478))

#define KW_TWSI_BASE			(KW_REGISTER(0x11000))
#define KW_UART0_BASE			(KW_REGISTER(0x12000))
#define KW_UART1_BASE			(KW_REGISTER(0x12100))
#define KW_MPP_BASE			(KW_REGISTER(0x10000))
#define KW_GPIO0_BASE			(KW_REGISTER(0x10100))
#define KW_GPIO1_BASE			(KW_REGISTER(0x10140))
#define KW_RTC_BASE			(KW_REGISTER(0x10300))
#define KW_NANDF_BASE			(KW_REGISTER(0x10418))
#define KW_SPI_BASE			(KW_REGISTER(0x10600))
#define KW_CPU_WIN_BASE			(KW_REGISTER(0x20000))
#define KW_CPU_REG_BASE			(KW_REGISTER(0x20100))
#define KW_TIMER_BASE			(KW_REGISTER(0x20300))
#define KW_REG_PCIE_BASE		(KW_REGISTER(0x40000))
#define KW_USB20_BASE			(KW_REGISTER(0x50000))
#define KW_EGIGA0_BASE			(KW_REGISTER(0x72000))
#define KW_EGIGA1_BASE			(KW_REGISTER(0x76000))
#define KW_SATA_BASE			(KW_REGISTER(0x80000))

/* Kirkwood Sata controller has two ports */
#define KW_SATA_PORT0_OFFSET		0x2000
#define KW_SATA_PORT1_OFFSET		0x4000

/* Kirkwood GbE controller has two ports */
#define MAX_MVGBE_DEVS	2
#define MVGBE0_BASE	KW_EGIGA0_BASE
#define MVGBE1_BASE	KW_EGIGA1_BASE

/* Kirkwood USB Host controller */
#define MVUSB0_BASE			KW_USB20_BASE
#define MVUSB0_CPU_ATTR_DRAM_CS0	KWCPU_ATTR_DRAM_CS0
#define MVUSB0_CPU_ATTR_DRAM_CS1	KWCPU_ATTR_DRAM_CS1
#define MVUSB0_CPU_ATTR_DRAM_CS2	KWCPU_ATTR_DRAM_CS2
#define MVUSB0_CPU_ATTR_DRAM_CS3	KWCPU_ATTR_DRAM_CS3

/* Kirkwood CPU memory windows */
#define MVCPU_WIN_CTRL_DATA	KWCPU_WIN_CTRL_DATA
#define MVCPU_WIN_ENABLE	KWCPU_WIN_ENABLE
#define MVCPU_WIN_DISABLE	KWCPU_WIN_DISABLE

#if defined (CONFIG_KW88F6281)
#include <asm/arch/kw88f6281.h>
#elif defined (CONFIG_KW88F6192)
#include <asm/arch/kw88f6192.h>
#else
#error "SOC Name not defined"
#endif /* CONFIG_KW88F6281 */
#endif /* CONFIG_FEROCEON_88FR131 */
#endif /* _ASM_ARCH_KIRKWOOD_H */
Commit	Line	Data
4efb77d4 PW	1	/*
	2	* (C) Copyright 2009
	3	* Marvell Semiconductor <www.marvell.com>
	4	* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
	5	*
	6	* Header file for the Marvell's Feroceon CPU core.
	7	*
1a459660	8	* SPDX-License-Identifier: GPL-2.0+
4efb77d4 PW	9	*/
	10
	11	#ifndef _ASM_ARCH_KIRKWOOD_H
	12	#define _ASM_ARCH_KIRKWOOD_H
	13
4efb77d4	14	#if defined (CONFIG_FEROCEON_88FR131) \|\| defined (CONFIG_SHEEVA_88SV131)
4efb77d4 PW	15
	16	/* SOC specific definations */
	17	#define INTREG_BASE 0xd0000000
	18	#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x)
	19	#define KW_OFFSET_REG (INTREG_BASE + 0x20080)
	20
	21	/* undocumented registers */
	22	#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470))
	23	#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478))
	24
688b6a0f	25	#define KW_TWSI_BASE (KW_REGISTER(0x11000))
4efb77d4	26	#define KW_UART0_BASE (KW_REGISTER(0x12000))
b996165f	27	#define KW_UART1_BASE (KW_REGISTER(0x12100))
4efb77d4 PW	28	#define KW_MPP_BASE (KW_REGISTER(0x10000))
	29	#define KW_GPIO0_BASE (KW_REGISTER(0x10100))
	30	#define KW_GPIO1_BASE (KW_REGISTER(0x10140))
b608b957	31	#define KW_RTC_BASE (KW_REGISTER(0x10300))
4efb77d4 PW	32	#define KW_NANDF_BASE (KW_REGISTER(0x10418))
	33	#define KW_SPI_BASE (KW_REGISTER(0x10600))
	34	#define KW_CPU_WIN_BASE (KW_REGISTER(0x20000))
	35	#define KW_CPU_REG_BASE (KW_REGISTER(0x20100))
	36	#define KW_TIMER_BASE (KW_REGISTER(0x20300))
	37	#define KW_REG_PCIE_BASE (KW_REGISTER(0x40000))
78eabb90	38	#define KW_USB20_BASE (KW_REGISTER(0x50000))
4efb77d4 PW	39	#define KW_EGIGA0_BASE (KW_REGISTER(0x72000))
4efb77d4 PW	40	#define KW_EGIGA1_BASE (KW_REGISTER(0x76000))
5f305003 PW	41	#define KW_SATA_BASE (KW_REGISTER(0x80000))
	42
	43	/* Kirkwood Sata controller has two ports */
	44	#define KW_SATA_PORT0_OFFSET 0x2000
	45	#define KW_SATA_PORT1_OFFSET 0x4000
4efb77d4	46
d3c9ffd0 AA	47	/* Kirkwood GbE controller has two ports */
	48	#define MAX_MVGBE_DEVS 2
	49	#define MVGBE0_BASE KW_EGIGA0_BASE
	50	#define MVGBE1_BASE KW_EGIGA1_BASE
d44265ad	51
74d34421 AA	52	/* Kirkwood USB Host controller */
	53	#define MVUSB0_BASE KW_USB20_BASE
	54	#define MVUSB0_CPU_ATTR_DRAM_CS0 KWCPU_ATTR_DRAM_CS0
	55	#define MVUSB0_CPU_ATTR_DRAM_CS1 KWCPU_ATTR_DRAM_CS1
	56	#define MVUSB0_CPU_ATTR_DRAM_CS2 KWCPU_ATTR_DRAM_CS2
	57	#define MVUSB0_CPU_ATTR_DRAM_CS3 KWCPU_ATTR_DRAM_CS3
	58
	59	/* Kirkwood CPU memory windows */
	60	#define MVCPU_WIN_CTRL_DATA KWCPU_WIN_CTRL_DATA
	61	#define MVCPU_WIN_ENABLE KWCPU_WIN_ENABLE
	62	#define MVCPU_WIN_DISABLE KWCPU_WIN_DISABLE
	63
4efb77d4 PW	64	#if defined (CONFIG_KW88F6281)
	65	#include <asm/arch/kw88f6281.h>
	66	#elif defined (CONFIG_KW88F6192)
	67	#include <asm/arch/kw88f6192.h>
	68	#else
	69	#error "SOC Name not defined"
	70	#endif /* CONFIG_KW88F6281 */
	71	#endif /* CONFIG_FEROCEON_88FR131 */
	72	#endif /* _ASM_ARCH_KIRKWOOD_H */