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508a58fa S |
1 | /* |
2 | * (C) Copyright 2010 | |
3 | * Texas Instruments, <www.ti.com> | |
4 | * | |
1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
508a58fa S |
6 | */ |
7 | ||
8 | #ifndef _SYS_PROTO_H_ | |
9 | #define _SYS_PROTO_H_ | |
10 | ||
11 | #include <asm/arch/omap.h> | |
12 | #include <asm/io.h> | |
af1d002f | 13 | #include <asm/arch/clock.h> |
508a58fa | 14 | #include <asm/omap_common.h> |
6aff0509 | 15 | #include <linux/mtd/omap_gpmc.h> |
af1d002f | 16 | #include <asm/arch/clock.h> |
939911a6 | 17 | #include <asm/ti-common/sys_proto.h> |
508a58fa | 18 | |
4a0eb757 S |
19 | DECLARE_GLOBAL_DATA_PTR; |
20 | ||
687054a7 LV |
21 | struct pad_conf_entry { |
22 | u32 offset; | |
23 | u32 val; | |
24 | }; | |
25 | ||
508a58fa S |
26 | struct omap_sysinfo { |
27 | char *board_string; | |
28 | }; | |
29 | extern const struct omap_sysinfo sysinfo; | |
30 | ||
508a58fa S |
31 | void gpmc_init(void); |
32 | void watchdog_init(void); | |
33 | u32 get_device_type(void); | |
34 | void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); | |
1f68451c | 35 | void do_set_mux32(u32 base, struct pad_conf_entry const *array, int size); |
508a58fa | 36 | void set_muxconf_regs_essential(void); |
508a58fa S |
37 | u32 wait_on_value(u32, u32, void *, u32); |
38 | void sdelay(unsigned long); | |
508a58fa S |
39 | void setup_clocks_for_console(void); |
40 | void prcm_init(void); | |
01b753ff | 41 | void bypass_dpll(u32 const base); |
508a58fa S |
42 | void freq_update_core(void); |
43 | u32 get_sys_clk_freq(void); | |
44 | u32 omap5_ddr_clk(void); | |
45 | void cancel_out(u32 *num, u32 *den, u32 den_limit); | |
46 | void sdram_init(void); | |
47 | u32 omap_sdram_size(void); | |
48 | u32 cortex_rev(void); | |
4596dcc1 | 49 | void save_omap_boot_params(void); |
508a58fa S |
50 | void init_omap_revision(void); |
51 | void do_io_settings(void); | |
4ca94d81 | 52 | void sri2c_init(void); |
63fc0c77 | 53 | void gpi2c_init(void); |
a78274b2 | 54 | int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); |
70239507 | 55 | u32 warm_reset(void); |
38f25b12 | 56 | void force_emif_self_refresh(void); |
ef1697e9 | 57 | void get_ioregs(const struct ctrl_ioregs **regs); |
d4d986ee | 58 | void srcomp_enable(void); |
0b1b60c7 | 59 | void setup_warmreset_time(void); |
508a58fa | 60 | |
0b1b60c7 LV |
61 | static inline u32 div_round_up(u32 num, u32 den) |
62 | { | |
63 | return (num + den - 1)/den; | |
64 | } | |
65 | ||
66 | static inline u32 usec_to_32k(u32 usec) | |
67 | { | |
68 | return div_round_up(32768 * usec, 1000000); | |
69 | } | |
5f603761 PR |
70 | |
71 | #define OMAP5_SERVICE_L2ACTLR_SET 0x104 | |
72 | ||
508a58fa | 73 | #endif |