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Commit | Line | Data |
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09aa7c46 AY |
1 | /* |
2 | * (C) Copyright 2016 Rockchip Electronics Co., Ltd | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | #ifndef _ASM_ARCH_GRF_RV1108_H | |
7 | #define _ASM_ARCH_GRF_RV1108_H | |
8 | ||
9 | #include <common.h> | |
10 | ||
11 | struct rv1108_grf { | |
12 | u32 reserved[4]; | |
13 | u32 gpio1a_iomux; | |
14 | u32 gpio1b_iomux; | |
15 | u32 gpio1c_iomux; | |
16 | u32 gpio1d_iomux; | |
17 | u32 gpio2a_iomux; | |
18 | u32 gpio2b_iomux; | |
19 | u32 gpio2c_iomux; | |
20 | u32 gpio2d_iomux; | |
21 | u32 gpio3a_iomux; | |
22 | u32 gpio3b_iomux; | |
23 | u32 gpio3c_iomux; | |
24 | u32 gpio3d_iomux; | |
25 | u32 reserved1[52]; | |
26 | u32 gpio1a_pull; | |
27 | u32 gpio1b_pull; | |
28 | u32 gpio1c_pull; | |
29 | u32 gpio1d_pull; | |
30 | u32 gpio2a_pull; | |
31 | u32 gpio2b_pull; | |
32 | u32 gpio2c_pull; | |
33 | u32 gpio2d_pull; | |
34 | u32 gpio3a_pull; | |
35 | u32 gpio3b_pull; | |
36 | u32 gpio3c_pull; | |
37 | u32 gpio3d_pull; | |
38 | u32 reserved2[52]; | |
39 | u32 gpio1a_drv; | |
40 | u32 gpio1b_drv; | |
41 | u32 gpio1c_drv; | |
42 | u32 gpio1d_drv; | |
43 | u32 gpio2a_drv; | |
44 | u32 gpio2b_drv; | |
45 | u32 gpio2c_drv; | |
46 | u32 gpio2d_drv; | |
47 | u32 gpio3a_drv; | |
48 | u32 gpio3b_drv; | |
49 | u32 gpio3c_drv; | |
50 | u32 gpio3d_drv; | |
51 | u32 reserved3[50]; | |
52 | u32 gpio1l_sr; | |
53 | u32 gpio1h_sr; | |
54 | u32 gpio2l_sr; | |
55 | u32 gpio2h_sr; | |
56 | u32 gpio3l_sr; | |
57 | u32 gpio3h_sr; | |
58 | u32 reserved4[26]; | |
59 | u32 gpio1l_smt; | |
60 | u32 gpio1h_smt; | |
61 | u32 gpio2l_smt; | |
62 | u32 gpio2h_smt; | |
63 | u32 gpio3l_smt; | |
64 | u32 gpio3h_smt; | |
65 | u32 reserved5[24]; | |
66 | u32 soc_con0; | |
67 | u32 soc_con1; | |
68 | u32 soc_con2; | |
69 | u32 soc_con3; | |
70 | u32 soc_con4; | |
71 | u32 soc_con5; | |
72 | u32 soc_con6; | |
73 | u32 soc_con7; | |
74 | u32 soc_con8; | |
75 | u32 soc_con9; | |
76 | u32 soc_con10; | |
77 | u32 soc_con11; | |
78 | u32 reserved6[20]; | |
79 | u32 soc_status0; | |
80 | u32 soc_status1; | |
81 | u32 reserved7[30]; | |
82 | u32 cpu_con0; | |
83 | u32 cpu_con1; | |
84 | u32 reserved8[30]; | |
85 | u32 os_reg0; | |
86 | u32 os_reg1; | |
87 | u32 os_reg2; | |
88 | u32 os_reg3; | |
89 | u32 reserved9[29]; | |
90 | u32 ddr_status; | |
91 | u32 reserved10[30]; | |
92 | u32 sig_det_con; | |
93 | u32 reserved11[3]; | |
94 | u32 sig_det_status; | |
95 | u32 reserved12[3]; | |
96 | u32 sig_det_clr; | |
97 | u32 reserved13[23]; | |
98 | u32 host_con0; | |
99 | u32 host_con1; | |
100 | u32 reserved14[2]; | |
101 | u32 dma_con0; | |
102 | u32 dma_con1; | |
0788a31e | 103 | u32 reserved15[59]; |
09aa7c46 | 104 | u32 uoc_status; |
0788a31e | 105 | u32 reserved16[2]; |
09aa7c46 | 106 | u32 host_status; |
0788a31e | 107 | u32 reserved17[59]; |
09aa7c46 | 108 | u32 gmac_con0; |
0788a31e | 109 | u32 reserved18[191]; |
09aa7c46 AY |
110 | u32 chip_id; |
111 | }; | |
0788a31e DW |
112 | |
113 | check_member(rv1108_grf, chip_id, 0x0c00); | |
09aa7c46 | 114 | #endif |