[people/ms/u-boot.git] / arch / arm / include / asm / arch-s5pc1xx / gpio.h

/*
 * (C) Copyright 2009 Samsung Electronics
 * Minkyu Kang <mk7.kang@samsung.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#ifndef __ASM_ARCH_GPIO_H
#define __ASM_ARCH_GPIO_H

#ifndef __ASSEMBLY__
struct s5p_gpio_bank {
	unsigned int	con;
	unsigned int	dat;
	unsigned int	pull;
	unsigned int	drv;
	unsigned int	pdn_con;
	unsigned int	pdn_pull;
	unsigned char	res1[8];
};

struct s5pc100_gpio {
	struct s5p_gpio_bank gpio_a0;
	struct s5p_gpio_bank gpio_a1;
	struct s5p_gpio_bank gpio_b;
	struct s5p_gpio_bank gpio_c;
	struct s5p_gpio_bank gpio_d;
	struct s5p_gpio_bank gpio_e0;
	struct s5p_gpio_bank gpio_e1;
	struct s5p_gpio_bank gpio_f0;
	struct s5p_gpio_bank gpio_f1;
	struct s5p_gpio_bank gpio_f2;
	struct s5p_gpio_bank gpio_f3;
	struct s5p_gpio_bank gpio_g0;
	struct s5p_gpio_bank gpio_g1;
	struct s5p_gpio_bank gpio_g2;
	struct s5p_gpio_bank gpio_g3;
	struct s5p_gpio_bank gpio_i;
	struct s5p_gpio_bank gpio_j0;
	struct s5p_gpio_bank gpio_j1;
	struct s5p_gpio_bank gpio_j2;
	struct s5p_gpio_bank gpio_j3;
	struct s5p_gpio_bank gpio_j4;
	struct s5p_gpio_bank gpio_k0;
	struct s5p_gpio_bank gpio_k1;
	struct s5p_gpio_bank gpio_k2;
	struct s5p_gpio_bank gpio_k3;
	struct s5p_gpio_bank gpio_l0;
	struct s5p_gpio_bank gpio_l1;
	struct s5p_gpio_bank gpio_l2;
	struct s5p_gpio_bank gpio_l3;
	struct s5p_gpio_bank gpio_l4;
	struct s5p_gpio_bank gpio_h0;
	struct s5p_gpio_bank gpio_h1;
	struct s5p_gpio_bank gpio_h2;
	struct s5p_gpio_bank gpio_h3;
};

struct s5pc110_gpio {
	struct s5p_gpio_bank gpio_a0;
	struct s5p_gpio_bank gpio_a1;
	struct s5p_gpio_bank gpio_b;
	struct s5p_gpio_bank gpio_c0;
	struct s5p_gpio_bank gpio_c1;
	struct s5p_gpio_bank gpio_d0;
	struct s5p_gpio_bank gpio_d1;
	struct s5p_gpio_bank gpio_e0;
	struct s5p_gpio_bank gpio_e1;
	struct s5p_gpio_bank gpio_f0;
	struct s5p_gpio_bank gpio_f1;
	struct s5p_gpio_bank gpio_f2;
	struct s5p_gpio_bank gpio_f3;
	struct s5p_gpio_bank gpio_g0;
	struct s5p_gpio_bank gpio_g1;
	struct s5p_gpio_bank gpio_g2;
	struct s5p_gpio_bank gpio_g3;
	struct s5p_gpio_bank gpio_i;
	struct s5p_gpio_bank gpio_j0;
	struct s5p_gpio_bank gpio_j1;
	struct s5p_gpio_bank gpio_j2;
	struct s5p_gpio_bank gpio_j3;
	struct s5p_gpio_bank gpio_j4;
	struct s5p_gpio_bank gpio_mp0_1;
	struct s5p_gpio_bank gpio_mp0_2;
	struct s5p_gpio_bank gpio_mp0_3;
	struct s5p_gpio_bank gpio_mp0_4;
	struct s5p_gpio_bank gpio_mp0_5;
	struct s5p_gpio_bank gpio_mp0_6;
	struct s5p_gpio_bank gpio_mp0_7;
	struct s5p_gpio_bank gpio_mp1_0;
	struct s5p_gpio_bank gpio_mp1_1;
	struct s5p_gpio_bank gpio_mp1_2;
	struct s5p_gpio_bank gpio_mp1_3;
	struct s5p_gpio_bank gpio_mp1_4;
	struct s5p_gpio_bank gpio_mp1_5;
	struct s5p_gpio_bank gpio_mp1_6;
	struct s5p_gpio_bank gpio_mp1_7;
	struct s5p_gpio_bank gpio_mp1_8;
	struct s5p_gpio_bank gpio_mp2_0;
	struct s5p_gpio_bank gpio_mp2_1;
	struct s5p_gpio_bank gpio_mp2_2;
	struct s5p_gpio_bank gpio_mp2_3;
	struct s5p_gpio_bank gpio_mp2_4;
	struct s5p_gpio_bank gpio_mp2_5;
	struct s5p_gpio_bank gpio_mp2_6;
	struct s5p_gpio_bank gpio_mp2_7;
	struct s5p_gpio_bank gpio_mp2_8;
	struct s5p_gpio_bank res1[48];
	struct s5p_gpio_bank gpio_h0;
	struct s5p_gpio_bank gpio_h1;
	struct s5p_gpio_bank gpio_h2;
	struct s5p_gpio_bank gpio_h3;
};

/* functions */
void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
#endif

/* Pin configurations */
#define GPIO_INPUT	0x0
#define GPIO_OUTPUT	0x1
#define GPIO_IRQ	0xf
#define GPIO_FUNC(x)	(x)

/* Pull mode */
#define GPIO_PULL_NONE	0x0
#define GPIO_PULL_DOWN	0x1
#define GPIO_PULL_UP	0x2

/* Drive Strength level */
#define GPIO_DRV_1X	0x0
#define GPIO_DRV_2X	0x1
#define GPIO_DRV_3X	0x2
#define GPIO_DRV_4X	0x3
#define GPIO_DRV_FAST	0x0
#define GPIO_DRV_SLOW	0x1

#endif
Commit	Line	Data
399e5ae0 MK	1	/*
	2	* (C) Copyright 2009 Samsung Electronics
	3	* Minkyu Kang <mk7.kang@samsung.com>
	4	*
	5	* This program is free software; you can redistribute it and/or
	6	* modify it under the terms of the GNU General Public License as
	7	* published by the Free Software Foundation; either version 2 of
	8	* the License, or (at your option) any later version.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	18	* MA 02111-1307 USA
	19	*/
	20
	21	#ifndef __ASM_ARCH_GPIO_H
	22	#define __ASM_ARCH_GPIO_H
	23
	24	#ifndef __ASSEMBLY__
3bb6b037	25	struct s5p_gpio_bank {
f3807374 MK	26	unsigned int con;
	27	unsigned int dat;
	28	unsigned int pull;
	29	unsigned int drv;
	30	unsigned int pdn_con;
	31	unsigned int pdn_pull;
399e5ae0 MK	32	unsigned char res1[8];
	33	};
	34
	35	struct s5pc100_gpio {
3bb6b037 MK	36	struct s5p_gpio_bank gpio_a0;
	37	struct s5p_gpio_bank gpio_a1;
	38	struct s5p_gpio_bank gpio_b;
	39	struct s5p_gpio_bank gpio_c;
	40	struct s5p_gpio_bank gpio_d;
	41	struct s5p_gpio_bank gpio_e0;
	42	struct s5p_gpio_bank gpio_e1;
	43	struct s5p_gpio_bank gpio_f0;
	44	struct s5p_gpio_bank gpio_f1;
	45	struct s5p_gpio_bank gpio_f2;
	46	struct s5p_gpio_bank gpio_f3;
	47	struct s5p_gpio_bank gpio_g0;
	48	struct s5p_gpio_bank gpio_g1;
	49	struct s5p_gpio_bank gpio_g2;
	50	struct s5p_gpio_bank gpio_g3;
	51	struct s5p_gpio_bank gpio_i;
	52	struct s5p_gpio_bank gpio_j0;
	53	struct s5p_gpio_bank gpio_j1;
	54	struct s5p_gpio_bank gpio_j2;
	55	struct s5p_gpio_bank gpio_j3;
	56	struct s5p_gpio_bank gpio_j4;
	57	struct s5p_gpio_bank gpio_k0;
	58	struct s5p_gpio_bank gpio_k1;
	59	struct s5p_gpio_bank gpio_k2;
	60	struct s5p_gpio_bank gpio_k3;
	61	struct s5p_gpio_bank gpio_l0;
	62	struct s5p_gpio_bank gpio_l1;
	63	struct s5p_gpio_bank gpio_l2;
	64	struct s5p_gpio_bank gpio_l3;
	65	struct s5p_gpio_bank gpio_l4;
	66	struct s5p_gpio_bank gpio_h0;
	67	struct s5p_gpio_bank gpio_h1;
	68	struct s5p_gpio_bank gpio_h2;
	69	struct s5p_gpio_bank gpio_h3;
399e5ae0 MK	70	};
	71
	72	struct s5pc110_gpio {
3bb6b037 MK	73	struct s5p_gpio_bank gpio_a0;
	74	struct s5p_gpio_bank gpio_a1;
	75	struct s5p_gpio_bank gpio_b;
	76	struct s5p_gpio_bank gpio_c0;
	77	struct s5p_gpio_bank gpio_c1;
	78	struct s5p_gpio_bank gpio_d0;
	79	struct s5p_gpio_bank gpio_d1;
	80	struct s5p_gpio_bank gpio_e0;
	81	struct s5p_gpio_bank gpio_e1;
	82	struct s5p_gpio_bank gpio_f0;
	83	struct s5p_gpio_bank gpio_f1;
	84	struct s5p_gpio_bank gpio_f2;
	85	struct s5p_gpio_bank gpio_f3;
	86	struct s5p_gpio_bank gpio_g0;
	87	struct s5p_gpio_bank gpio_g1;
	88	struct s5p_gpio_bank gpio_g2;
	89	struct s5p_gpio_bank gpio_g3;
	90	struct s5p_gpio_bank gpio_i;
	91	struct s5p_gpio_bank gpio_j0;
	92	struct s5p_gpio_bank gpio_j1;
	93	struct s5p_gpio_bank gpio_j2;
	94	struct s5p_gpio_bank gpio_j3;
	95	struct s5p_gpio_bank gpio_j4;
	96	struct s5p_gpio_bank gpio_mp0_1;
	97	struct s5p_gpio_bank gpio_mp0_2;
	98	struct s5p_gpio_bank gpio_mp0_3;
	99	struct s5p_gpio_bank gpio_mp0_4;
	100	struct s5p_gpio_bank gpio_mp0_5;
	101	struct s5p_gpio_bank gpio_mp0_6;
	102	struct s5p_gpio_bank gpio_mp0_7;
	103	struct s5p_gpio_bank gpio_mp1_0;
	104	struct s5p_gpio_bank gpio_mp1_1;
	105	struct s5p_gpio_bank gpio_mp1_2;
	106	struct s5p_gpio_bank gpio_mp1_3;
	107	struct s5p_gpio_bank gpio_mp1_4;
	108	struct s5p_gpio_bank gpio_mp1_5;
	109	struct s5p_gpio_bank gpio_mp1_6;
	110	struct s5p_gpio_bank gpio_mp1_7;
	111	struct s5p_gpio_bank gpio_mp1_8;
	112	struct s5p_gpio_bank gpio_mp2_0;
	113	struct s5p_gpio_bank gpio_mp2_1;
	114	struct s5p_gpio_bank gpio_mp2_2;
	115	struct s5p_gpio_bank gpio_mp2_3;
	116	struct s5p_gpio_bank gpio_mp2_4;
	117	struct s5p_gpio_bank gpio_mp2_5;
	118	struct s5p_gpio_bank gpio_mp2_6;
	119	struct s5p_gpio_bank gpio_mp2_7;
	120	struct s5p_gpio_bank gpio_mp2_8;
	121	struct s5p_gpio_bank res1[48];
	122	struct s5p_gpio_bank gpio_h0;
	123	struct s5p_gpio_bank gpio_h1;
	124	struct s5p_gpio_bank gpio_h2;
	125	struct s5p_gpio_bank gpio_h3;
399e5ae0	126	};
ab693e9c MK	127
ab693e9c MK	128	/* functions */
3bb6b037 MK	129	void gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
	130	void gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
	131	void gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
	132	void gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
	133	unsigned int gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
	134	void gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
	135	void gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
	136	void gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
399e5ae0 MK	137	#endif
399e5ae0 MK	138
ab693e9c MK	139	/* Pin configurations */
	140	#define GPIO_INPUT 0x0
	141	#define GPIO_OUTPUT 0x1
	142	#define GPIO_IRQ 0xf
	143	#define GPIO_FUNC(x) (x)
	144
	145	/* Pull mode */
	146	#define GPIO_PULL_NONE 0x0
	147	#define GPIO_PULL_DOWN 0x1
	148	#define GPIO_PULL_UP 0x2
	149
	150	/* Drive Strength level */
	151	#define GPIO_DRV_1X 0x0
	152	#define GPIO_DRV_2X 0x1
	153	#define GPIO_DRV_3X 0x2
	154	#define GPIO_DRV_4X 0x3
	155	#define GPIO_DRV_FAST 0x0
	156	#define GPIO_DRV_SLOW 0x1
	157
399e5ae0	158	#endif