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[people/ms/u-boot.git] / arch / arm / mach-davinci / misc.c
CommitLineData
264bbdd1
HV
1/*
2 * Miscelaneous DaVinci functions.
3 *
ca8480d4 4 * Copyright (C) 2009 Nick Thompson, GE Fanuc Ltd, <nick.thompson@gefanuc.com>
264bbdd1
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5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 * Copyright (C) 2008 Lyrtech <www.lyrtech.com>
7 * Copyright (C) 2004 Texas Instruments.
8 *
1a459660 9 * SPDX-License-Identifier: GPL-2.0+
264bbdd1
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10 */
11
12#include <common.h>
13#include <i2c.h>
641e0925 14#include <net.h>
264bbdd1 15#include <asm/arch/hardware.h>
ca8480d4 16#include <asm/io.h>
d7f9b503 17#include <asm/arch/davinci_misc.h>
7a4f511b 18
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19DECLARE_GLOBAL_DATA_PTR;
20
eb40d05f 21#ifndef CONFIG_SPL_BUILD
97003756
BG
22int dram_init(void)
23{
24 /* dram_init must store complete ramsize in gd->ram_size */
25 gd->ram_size = get_ram_size(
a55d23cc 26 (void *)CONFIG_SYS_SDRAM_BASE,
97003756
BG
27 CONFIG_MAX_RAM_BANK_SIZE);
28 return 0;
29}
30
76b00aca 31int dram_init_banksize(void)
97003756
BG
32{
33 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
34 gd->bd->bi_dram[0].size = gd->ram_size;
76b00aca
SG
35
36 return 0;
97003756 37}
6d1c649f 38#endif
264bbdd1 39
641e0925 40#ifdef CONFIG_DRIVER_TI_EMAC
8a73e561
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41/*
42 * Read ethernet MAC address from EEPROM for DVEVM compatible boards.
264bbdd1
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43 * Returns 1 if found, 0 otherwise.
44 */
45int dvevm_read_mac_address(uint8_t *buf)
46{
6d0f6bcf 47#ifdef CONFIG_SYS_I2C_EEPROM_ADDR
264bbdd1 48 /* Read MAC address. */
8a73e561
HS
49 if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0x7F00,
50 CONFIG_SYS_I2C_EEPROM_ADDR_LEN, (uint8_t *) &buf[0], 6))
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51 goto i2cerr;
52
641e0925 53 /* Check that MAC address is valid. */
0adb5b76 54 if (!is_valid_ethaddr(buf))
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55 goto err;
56
57 return 1; /* Found */
58
59i2cerr:
8a73e561
HS
60 printf("Read from EEPROM @ 0x%02x failed\n",
61 CONFIG_SYS_I2C_EEPROM_ADDR);
264bbdd1 62err:
6d0f6bcf 63#endif /* CONFIG_SYS_I2C_EEPROM_ADDR */
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64
65 return 0;
66}
67
6d1c649f
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68/*
69 * Set the mii mode as MII or RMII
70 */
99e4c754 71#if defined(CONFIG_SOC_DA8XX)
6d1c649f
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72void davinci_emac_mii_mode_sel(int mode_sel)
73{
74 int val;
75
76 val = readl(&davinci_syscfg_regs->cfgchip3);
77 if (mode_sel == 0)
78 val &= ~(1 << 8);
79 else
80 val |= (1 << 8);
81 writel(val, &davinci_syscfg_regs->cfgchip3);
82}
83#endif
7b37a27e 84/*
264bbdd1 85 * If there is no MAC address in the environment, then it will be initialized
641e0925 86 * (silently) from the value in the EEPROM.
264bbdd1 87 */
7b37a27e 88void davinci_sync_env_enetaddr(uint8_t *rom_enetaddr)
264bbdd1 89{
7b37a27e 90 uint8_t env_enetaddr[6];
826e9913 91 int ret;
264bbdd1 92
35affd7a 93 ret = eth_env_get_enetaddr_by_index("eth", 0, env_enetaddr);
c8876f1c 94 if (!ret) {
8a73e561
HS
95 /*
96 * There is no MAC address in the environment, so we
97 * initialize it from the value in the EEPROM.
98 */
7b37a27e
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99 debug("### Setting environment from EEPROM MAC address = "
100 "\"%pM\"\n",
101 env_enetaddr);
fd1e959e 102 ret = !eth_env_set_enetaddr("ethaddr", rom_enetaddr);
264bbdd1 103 }
826e9913 104 if (!ret)
c8876f1c 105 printf("Failed to set mac address from EEPROM: %d\n", ret);
264bbdd1 106}
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107#endif /* CONFIG_DRIVER_TI_EMAC */
108
109#if defined(CONFIG_SOC_DA8XX)
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110void irq_init(void)
111{
112 /*
113 * Mask all IRQs by clearing the global enable and setting
114 * the enable clear for all the 90 interrupts.
115 */
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116 writel(0, &davinci_aintc_regs->ger);
117
118 writel(0, &davinci_aintc_regs->hier);
119
120 writel(0xffffffff, &davinci_aintc_regs->ecr1);
121 writel(0xffffffff, &davinci_aintc_regs->ecr2);
122 writel(0xffffffff, &davinci_aintc_regs->ecr3);
123}
6d1c649f
SB
124
125/*
126 * Enable PSC for various peripherals.
127 */
128int da8xx_configure_lpsc_items(const struct lpsc_resource *item,
129 const int n_items)
130{
131 int i;
132
133 for (i = 0; i < n_items; i++)
134 lpsc_on(item[i].lpsc_no);
135
136 return 0;
137}
138#endif