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b83c709e | 1 | /* |
29067abf | 2 | * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. |
b83c709e SB |
3 | * |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
fba6f9ef AA |
8 | #include <config.h> |
9 | #include <fuse.h> | |
b83c709e | 10 | #include <asm/io.h> |
36c1ca4d | 11 | #include <asm/system.h> |
36c1ca4d | 12 | #include <asm/arch/clock.h> |
f2f07e85 | 13 | #include <asm/arch/sys_proto.h> |
552a848e | 14 | #include <asm/mach-imx/hab.h> |
b83c709e SB |
15 | |
16 | /* -------- start of HAB API updates ------------*/ | |
f2f07e85 SB |
17 | |
18 | #define hab_rvt_report_event_p \ | |
19 | ( \ | |
b5437a80 PF |
20 | (is_mx6dqp()) ? \ |
21 | ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ | |
27cd0da4 | 22 | (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ |
f2f07e85 | 23 | ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ |
27cd0da4 | 24 | (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ |
f2f07e85 SB |
25 | ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \ |
26 | ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \ | |
27 | ) | |
28 | ||
29 | #define hab_rvt_report_status_p \ | |
30 | ( \ | |
b5437a80 PF |
31 | (is_mx6dqp()) ? \ |
32 | ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ | |
27cd0da4 | 33 | (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ |
f2f07e85 | 34 | ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ |
27cd0da4 | 35 | (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ |
f2f07e85 SB |
36 | ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\ |
37 | ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \ | |
38 | ) | |
39 | ||
40 | #define hab_rvt_authenticate_image_p \ | |
41 | ( \ | |
b5437a80 PF |
42 | (is_mx6dqp()) ? \ |
43 | ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ | |
27cd0da4 | 44 | (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ |
f2f07e85 | 45 | ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ |
27cd0da4 | 46 | (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ |
f2f07e85 SB |
47 | ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \ |
48 | ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \ | |
49 | ) | |
50 | ||
51 | #define hab_rvt_entry_p \ | |
52 | ( \ | |
b5437a80 PF |
53 | (is_mx6dqp()) ? \ |
54 | ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ | |
27cd0da4 | 55 | (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ |
f2f07e85 | 56 | ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ |
27cd0da4 | 57 | (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ |
f2f07e85 SB |
58 | ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \ |
59 | ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \ | |
60 | ) | |
61 | ||
62 | #define hab_rvt_exit_p \ | |
63 | ( \ | |
b5437a80 PF |
64 | (is_mx6dqp()) ? \ |
65 | ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ | |
27cd0da4 | 66 | (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \ |
f2f07e85 | 67 | ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ |
27cd0da4 | 68 | (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \ |
f2f07e85 SB |
69 | ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \ |
70 | ((hab_rvt_exit_t *)HAB_RVT_EXIT) \ | |
71 | ) | |
b83c709e | 72 | |
36c1ca4d | 73 | #define ALIGN_SIZE 0x1000 |
36c1ca4d NG |
74 | #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8 |
75 | #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0 | |
76 | #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18 | |
ee3899aa | 77 | #define IS_HAB_ENABLED_BIT \ |
27117b20 PF |
78 | (is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \ |
79 | (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2)) | |
36c1ca4d | 80 | |
15b505b0 SE |
81 | static bool is_hab_enabled(void); |
82 | ||
49b6d058 BD |
83 | static int ivt_header_error(const char *err_str, struct ivt_header *ivt_hdr) |
84 | { | |
85 | printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str, | |
86 | ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version); | |
87 | ||
88 | return 1; | |
89 | } | |
90 | ||
91 | static int verify_ivt_header(struct ivt_header *ivt_hdr) | |
92 | { | |
93 | int result = 0; | |
94 | ||
95 | if (ivt_hdr->magic != IVT_HEADER_MAGIC) | |
96 | result = ivt_header_error("bad magic", ivt_hdr); | |
97 | ||
98 | if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH) | |
99 | result = ivt_header_error("bad length", ivt_hdr); | |
100 | ||
101 | if (ivt_hdr->version != IVT_HEADER_V1 && | |
102 | ivt_hdr->version != IVT_HEADER_V2) | |
103 | result = ivt_header_error("bad version", ivt_hdr); | |
104 | ||
105 | return result; | |
106 | } | |
107 | ||
15b505b0 SE |
108 | #if !defined(CONFIG_SPL_BUILD) |
109 | ||
29067abf UC |
110 | #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */ |
111 | ||
112 | struct record { | |
113 | uint8_t tag; /* Tag */ | |
114 | uint8_t len[2]; /* Length */ | |
115 | uint8_t par; /* Version */ | |
116 | uint8_t contents[MAX_RECORD_BYTES];/* Record Data */ | |
117 | bool any_rec_flag; | |
118 | }; | |
119 | ||
120 | char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n", | |
121 | "RSN = HAB_ENG_FAIL (0x30)\n", | |
122 | "RSN = HAB_INV_ADDRESS (0x22)\n", | |
123 | "RSN = HAB_INV_ASSERTION (0x0C)\n", | |
124 | "RSN = HAB_INV_CALL (0x28)\n", | |
125 | "RSN = HAB_INV_CERTIFICATE (0x21)\n", | |
126 | "RSN = HAB_INV_COMMAND (0x06)\n", | |
127 | "RSN = HAB_INV_CSF (0x11)\n", | |
128 | "RSN = HAB_INV_DCD (0x27)\n", | |
129 | "RSN = HAB_INV_INDEX (0x0F)\n", | |
130 | "RSN = HAB_INV_IVT (0x05)\n", | |
131 | "RSN = HAB_INV_KEY (0x1D)\n", | |
132 | "RSN = HAB_INV_RETURN (0x1E)\n", | |
133 | "RSN = HAB_INV_SIGNATURE (0x18)\n", | |
134 | "RSN = HAB_INV_SIZE (0x17)\n", | |
135 | "RSN = HAB_MEM_FAIL (0x2E)\n", | |
136 | "RSN = HAB_OVR_COUNT (0x2B)\n", | |
137 | "RSN = HAB_OVR_STORAGE (0x2D)\n", | |
138 | "RSN = HAB_UNS_ALGORITHM (0x12)\n", | |
139 | "RSN = HAB_UNS_COMMAND (0x03)\n", | |
140 | "RSN = HAB_UNS_ENGINE (0x0A)\n", | |
141 | "RSN = HAB_UNS_ITEM (0x24)\n", | |
142 | "RSN = HAB_UNS_KEY (0x1B)\n", | |
143 | "RSN = HAB_UNS_PROTOCOL (0x14)\n", | |
144 | "RSN = HAB_UNS_STATE (0x09)\n", | |
145 | "RSN = INVALID\n", | |
146 | NULL}; | |
147 | ||
148 | char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n", | |
149 | "STS = HAB_FAILURE (0x33)\n", | |
150 | "STS = HAB_WARNING (0x69)\n", | |
151 | "STS = INVALID\n", | |
152 | NULL}; | |
153 | ||
154 | char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n", | |
155 | "ENG = HAB_ENG_SCC (0x03)\n", | |
156 | "ENG = HAB_ENG_RTIC (0x05)\n", | |
157 | "ENG = HAB_ENG_SAHARA (0x06)\n", | |
158 | "ENG = HAB_ENG_CSU (0x0A)\n", | |
159 | "ENG = HAB_ENG_SRTC (0x0C)\n", | |
160 | "ENG = HAB_ENG_DCP (0x1B)\n", | |
161 | "ENG = HAB_ENG_CAAM (0x1D)\n", | |
162 | "ENG = HAB_ENG_SNVS (0x1E)\n", | |
163 | "ENG = HAB_ENG_OCOTP (0x21)\n", | |
164 | "ENG = HAB_ENG_DTCP (0x22)\n", | |
165 | "ENG = HAB_ENG_ROM (0x36)\n", | |
166 | "ENG = HAB_ENG_HDCP (0x24)\n", | |
167 | "ENG = HAB_ENG_RTL (0x77)\n", | |
168 | "ENG = HAB_ENG_SW (0xFF)\n", | |
169 | "ENG = INVALID\n", | |
170 | NULL}; | |
171 | ||
172 | char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n", | |
173 | "CTX = HAB_CTX_FAB (0xFF)\n", | |
174 | "CTX = HAB_CTX_ENTRY (0xE1)\n", | |
175 | "CTX = HAB_CTX_TARGET (0x33)\n", | |
176 | "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n", | |
177 | "CTX = HAB_CTX_DCD (0xDD)\n", | |
178 | "CTX = HAB_CTX_CSF (0xCF)\n", | |
179 | "CTX = HAB_CTX_COMMAND (0xC0)\n", | |
180 | "CTX = HAB_CTX_AUT_DAT (0xDB)\n", | |
181 | "CTX = HAB_CTX_ASSERT (0xA0)\n", | |
182 | "CTX = HAB_CTX_EXIT (0xEE)\n", | |
183 | "CTX = INVALID\n", | |
184 | NULL}; | |
185 | ||
186 | uint8_t hab_statuses[5] = { | |
187 | HAB_STS_ANY, | |
188 | HAB_FAILURE, | |
189 | HAB_WARNING, | |
190 | HAB_SUCCESS, | |
191 | -1 | |
192 | }; | |
193 | ||
194 | uint8_t hab_reasons[26] = { | |
195 | HAB_RSN_ANY, | |
196 | HAB_ENG_FAIL, | |
197 | HAB_INV_ADDRESS, | |
198 | HAB_INV_ASSERTION, | |
199 | HAB_INV_CALL, | |
200 | HAB_INV_CERTIFICATE, | |
201 | HAB_INV_COMMAND, | |
202 | HAB_INV_CSF, | |
203 | HAB_INV_DCD, | |
204 | HAB_INV_INDEX, | |
205 | HAB_INV_IVT, | |
206 | HAB_INV_KEY, | |
207 | HAB_INV_RETURN, | |
208 | HAB_INV_SIGNATURE, | |
209 | HAB_INV_SIZE, | |
210 | HAB_MEM_FAIL, | |
211 | HAB_OVR_COUNT, | |
212 | HAB_OVR_STORAGE, | |
213 | HAB_UNS_ALGORITHM, | |
214 | HAB_UNS_COMMAND, | |
215 | HAB_UNS_ENGINE, | |
216 | HAB_UNS_ITEM, | |
217 | HAB_UNS_KEY, | |
218 | HAB_UNS_PROTOCOL, | |
219 | HAB_UNS_STATE, | |
220 | -1 | |
221 | }; | |
222 | ||
223 | uint8_t hab_contexts[12] = { | |
224 | HAB_CTX_ANY, | |
225 | HAB_CTX_FAB, | |
226 | HAB_CTX_ENTRY, | |
227 | HAB_CTX_TARGET, | |
228 | HAB_CTX_AUTHENTICATE, | |
229 | HAB_CTX_DCD, | |
230 | HAB_CTX_CSF, | |
231 | HAB_CTX_COMMAND, | |
232 | HAB_CTX_AUT_DAT, | |
233 | HAB_CTX_ASSERT, | |
234 | HAB_CTX_EXIT, | |
235 | -1 | |
236 | }; | |
237 | ||
238 | uint8_t hab_engines[16] = { | |
239 | HAB_ENG_ANY, | |
240 | HAB_ENG_SCC, | |
241 | HAB_ENG_RTIC, | |
242 | HAB_ENG_SAHARA, | |
243 | HAB_ENG_CSU, | |
244 | HAB_ENG_SRTC, | |
245 | HAB_ENG_DCP, | |
246 | HAB_ENG_CAAM, | |
247 | HAB_ENG_SNVS, | |
248 | HAB_ENG_OCOTP, | |
249 | HAB_ENG_DTCP, | |
250 | HAB_ENG_ROM, | |
251 | HAB_ENG_HDCP, | |
252 | HAB_ENG_RTL, | |
253 | HAB_ENG_SW, | |
254 | -1 | |
255 | }; | |
256 | ||
29067abf UC |
257 | static inline uint8_t get_idx(uint8_t *list, uint8_t tgt) |
258 | { | |
259 | uint8_t idx = 0; | |
260 | uint8_t element = list[idx]; | |
261 | while (element != -1) { | |
262 | if (element == tgt) | |
263 | return idx; | |
264 | element = list[++idx]; | |
265 | } | |
266 | return -1; | |
267 | } | |
268 | ||
269 | void process_event_record(uint8_t *event_data, size_t bytes) | |
270 | { | |
271 | struct record *rec = (struct record *)event_data; | |
272 | ||
273 | printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]); | |
274 | printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]); | |
275 | printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]); | |
276 | printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]); | |
277 | } | |
278 | ||
b83c709e SB |
279 | void display_event(uint8_t *event_data, size_t bytes) |
280 | { | |
281 | uint32_t i; | |
282 | ||
283 | if (!(event_data && bytes > 0)) | |
284 | return; | |
285 | ||
286 | for (i = 0; i < bytes; i++) { | |
287 | if (i == 0) | |
288 | printf("\t0x%02x", event_data[i]); | |
289 | else if ((i % 8) == 0) | |
290 | printf("\n\t0x%02x", event_data[i]); | |
291 | else | |
292 | printf(" 0x%02x", event_data[i]); | |
293 | } | |
29067abf UC |
294 | |
295 | process_event_record(event_data, bytes); | |
b83c709e SB |
296 | } |
297 | ||
298 | int get_hab_status(void) | |
299 | { | |
300 | uint32_t index = 0; /* Loop index */ | |
301 | uint8_t event_data[128]; /* Event data buffer */ | |
302 | size_t bytes = sizeof(event_data); /* Event size in bytes */ | |
303 | enum hab_config config = 0; | |
304 | enum hab_state state = 0; | |
f2f07e85 SB |
305 | hab_rvt_report_event_t *hab_rvt_report_event; |
306 | hab_rvt_report_status_t *hab_rvt_report_status; | |
307 | ||
308 | hab_rvt_report_event = hab_rvt_report_event_p; | |
309 | hab_rvt_report_status = hab_rvt_report_status_p; | |
b83c709e SB |
310 | |
311 | if (is_hab_enabled()) | |
312 | puts("\nSecure boot enabled\n"); | |
313 | else | |
314 | puts("\nSecure boot disabled\n"); | |
315 | ||
316 | /* Check HAB status */ | |
317 | if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) { | |
318 | printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n", | |
319 | config, state); | |
320 | ||
321 | /* Display HAB Error events */ | |
322 | while (hab_rvt_report_event(HAB_FAILURE, index, event_data, | |
323 | &bytes) == HAB_SUCCESS) { | |
324 | puts("\n"); | |
325 | printf("--------- HAB Event %d -----------------\n", | |
326 | index + 1); | |
327 | puts("event data:\n"); | |
328 | display_event(event_data, bytes); | |
329 | puts("\n"); | |
330 | bytes = sizeof(event_data); | |
331 | index++; | |
332 | } | |
333 | } | |
334 | /* Display message if no HAB events are found */ | |
335 | else { | |
336 | printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n", | |
337 | config, state); | |
338 | puts("No HAB Events Found!\n\n"); | |
339 | } | |
340 | return 0; | |
341 | } | |
342 | ||
15b505b0 SE |
343 | int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
344 | { | |
345 | if ((argc != 1)) { | |
346 | cmd_usage(cmdtp); | |
347 | return 1; | |
348 | } | |
349 | ||
350 | get_hab_status(); | |
351 | ||
352 | return 0; | |
353 | } | |
354 | ||
355 | static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc, | |
356 | char * const argv[]) | |
357 | { | |
c5800b25 | 358 | ulong addr, length, ivt_offset; |
15b505b0 SE |
359 | int rcode = 0; |
360 | ||
c5800b25 | 361 | if (argc < 4) |
15b505b0 SE |
362 | return CMD_RET_USAGE; |
363 | ||
364 | addr = simple_strtoul(argv[1], NULL, 16); | |
c5800b25 BD |
365 | length = simple_strtoul(argv[2], NULL, 16); |
366 | ivt_offset = simple_strtoul(argv[3], NULL, 16); | |
15b505b0 | 367 | |
c5800b25 | 368 | rcode = authenticate_image(addr, length, ivt_offset); |
9535b397 BD |
369 | if (rcode == 0) |
370 | rcode = CMD_RET_SUCCESS; | |
371 | else | |
372 | rcode = CMD_RET_FAILURE; | |
c5800b25 | 373 | |
15b505b0 SE |
374 | return rcode; |
375 | } | |
376 | ||
377 | U_BOOT_CMD( | |
378 | hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status, | |
379 | "display HAB status", | |
380 | "" | |
381 | ); | |
382 | ||
383 | U_BOOT_CMD( | |
c5800b25 | 384 | hab_auth_img, 4, 0, do_authenticate_image, |
15b505b0 | 385 | "authenticate image via HAB", |
c5800b25 | 386 | "addr length ivt_offset\n" |
15b505b0 | 387 | "addr - image hex address\n" |
c5800b25 | 388 | "length - image hex length\n" |
15b505b0 SE |
389 | "ivt_offset - hex offset of IVT in the image" |
390 | ); | |
391 | ||
392 | ||
393 | #endif /* !defined(CONFIG_SPL_BUILD) */ | |
394 | ||
395 | static bool is_hab_enabled(void) | |
396 | { | |
397 | struct imx_sec_config_fuse_t *fuse = | |
398 | (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse; | |
399 | uint32_t reg; | |
400 | int ret; | |
401 | ||
402 | ret = fuse_read(fuse->bank, fuse->word, ®); | |
403 | if (ret) { | |
404 | puts("\nSecure boot fuse read error\n"); | |
405 | return ret; | |
406 | } | |
407 | ||
408 | return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT; | |
409 | } | |
410 | ||
c5800b25 BD |
411 | int authenticate_image(uint32_t ddr_start, uint32_t image_size, |
412 | uint32_t ivt_offset) | |
36c1ca4d NG |
413 | { |
414 | uint32_t load_addr = 0; | |
415 | size_t bytes; | |
c5800b25 | 416 | uint32_t ivt_addr = 0; |
9535b397 | 417 | int result = 1; |
36c1ca4d NG |
418 | ulong start; |
419 | hab_rvt_authenticate_image_t *hab_rvt_authenticate_image; | |
420 | hab_rvt_entry_t *hab_rvt_entry; | |
421 | hab_rvt_exit_t *hab_rvt_exit; | |
49b6d058 BD |
422 | struct ivt *ivt; |
423 | struct ivt_header *ivt_hdr; | |
36c1ca4d NG |
424 | |
425 | hab_rvt_authenticate_image = hab_rvt_authenticate_image_p; | |
426 | hab_rvt_entry = hab_rvt_entry_p; | |
427 | hab_rvt_exit = hab_rvt_exit_p; | |
428 | ||
d2c61800 BD |
429 | if (!is_hab_enabled()) { |
430 | puts("hab fuse not enabled\n"); | |
431 | return result; | |
432 | } | |
36c1ca4d | 433 | |
d2c61800 BD |
434 | printf("\nAuthenticate image from DDR location 0x%x...\n", |
435 | ddr_start); | |
36c1ca4d | 436 | |
d2c61800 | 437 | hab_caam_clock_enable(1); |
36c1ca4d | 438 | |
53c8a510 BD |
439 | if (hab_rvt_entry() != HAB_SUCCESS) { |
440 | puts("hab entry function fail\n"); | |
441 | goto hab_caam_clock_disable; | |
442 | } | |
d2c61800 | 443 | |
c5800b25 BD |
444 | /* Calculate IVT address header */ |
445 | ivt_addr = ddr_start + ivt_offset; | |
49b6d058 BD |
446 | ivt = (struct ivt *)ivt_addr; |
447 | ivt_hdr = &ivt->hdr; | |
448 | ||
449 | /* Verify IVT header bugging out on error */ | |
450 | if (verify_ivt_header(ivt_hdr)) | |
451 | goto hab_caam_clock_disable; | |
452 | ||
53c8a510 | 453 | start = ddr_start; |
c5800b25 | 454 | bytes = image_size; |
36c1ca4d | 455 | #ifdef DEBUG |
c5800b25 | 456 | printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr); |
53c8a510 | 457 | puts("Dumping IVT\n"); |
c5800b25 | 458 | print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0); |
53c8a510 BD |
459 | |
460 | puts("Dumping CSF Header\n"); | |
c5800b25 BD |
461 | print_buffer(ivt_addr + IVT_SIZE, (void *)(ivt_addr + IVT_SIZE), 4, |
462 | 0x10, 0); | |
36c1ca4d | 463 | |
15b505b0 | 464 | #if !defined(CONFIG_SPL_BUILD) |
53c8a510 | 465 | get_hab_status(); |
15b505b0 | 466 | #endif |
36c1ca4d | 467 | |
53c8a510 BD |
468 | puts("\nCalling authenticate_image in ROM\n"); |
469 | printf("\tivt_offset = 0x%x\n", ivt_offset); | |
470 | printf("\tstart = 0x%08lx\n", start); | |
471 | printf("\tbytes = 0x%x\n", bytes); | |
36c1ca4d | 472 | #endif |
53c8a510 BD |
473 | /* |
474 | * If the MMU is enabled, we have to notify the ROM | |
475 | * code, or it won't flush the caches when needed. | |
476 | * This is done, by setting the "pu_irom_mmu_enabled" | |
477 | * word to 1. You can find its address by looking in | |
478 | * the ROM map. This is critical for | |
479 | * authenticate_image(). If MMU is enabled, without | |
480 | * setting this bit, authentication will fail and may | |
481 | * crash. | |
482 | */ | |
483 | /* Check MMU enabled */ | |
484 | if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) { | |
485 | if (is_mx6dq()) { | |
486 | /* | |
487 | * This won't work on Rev 1.0.0 of | |
488 | * i.MX6Q/D, since their ROM doesn't | |
489 | * do cache flushes. don't think any | |
490 | * exist, so we ignore them. | |
491 | */ | |
492 | if (!is_mx6dqp()) | |
493 | writel(1, MX6DQ_PU_IROM_MMU_EN_VAR); | |
494 | } else if (is_mx6sdl()) { | |
495 | writel(1, MX6DLS_PU_IROM_MMU_EN_VAR); | |
496 | } else if (is_mx6sl()) { | |
497 | writel(1, MX6SL_PU_IROM_MMU_EN_VAR); | |
d2c61800 | 498 | } |
53c8a510 | 499 | } |
36c1ca4d | 500 | |
53c8a510 BD |
501 | load_addr = (uint32_t)hab_rvt_authenticate_image( |
502 | HAB_CID_UBOOT, | |
503 | ivt_offset, (void **)&start, | |
504 | (size_t *)&bytes, NULL); | |
505 | if (hab_rvt_exit() != HAB_SUCCESS) { | |
506 | puts("hab exit function fail\n"); | |
507 | load_addr = 0; | |
d2c61800 | 508 | } |
36c1ca4d | 509 | |
53c8a510 | 510 | hab_caam_clock_disable: |
d2c61800 | 511 | hab_caam_clock_enable(0); |
36c1ca4d | 512 | |
15b505b0 | 513 | #if !defined(CONFIG_SPL_BUILD) |
d2c61800 | 514 | get_hab_status(); |
15b505b0 | 515 | #endif |
d2c61800 | 516 | if (load_addr != 0) |
9535b397 | 517 | result = 0; |
36c1ca4d NG |
518 | |
519 | return result; | |
520 | } |