[people/ms/u-boot.git] / arch / arm / mach-imx / hab.c

/*
 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:    GPL-2.0+
 */

#include <common.h>
#include <config.h>
#include <fuse.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/hab.h>

/* -------- start of HAB API updates ------------*/

#define hab_rvt_report_event_p					\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)	\
)

#define hab_rvt_report_status_p					\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)	\
)

#define hab_rvt_authenticate_image_p				\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)	\
)

#define hab_rvt_entry_p						\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY)			\
)

#define hab_rvt_exit_p						\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	((hab_rvt_exit_t *)HAB_RVT_EXIT)			\
)

static inline enum hab_status hab_rvt_check_target_new(enum hab_target target,
						       const void *start,
						       size_t bytes)
{
	return HAB_SUCCESS;
}

#define hab_rvt_check_target_p					\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_check_target_t *)hab_rvt_check_target_new) :	\
	((hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET)	\
)

#define ALIGN_SIZE		0x1000
#define MX6DQ_PU_IROM_MMU_EN_VAR	0x009024a8
#define MX6DLS_PU_IROM_MMU_EN_VAR	0x00901dd0
#define MX6SL_PU_IROM_MMU_EN_VAR	0x00900a18
#define IS_HAB_ENABLED_BIT \
	(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 :	\
	 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))

static bool is_hab_enabled(void);

static int ivt_header_error(const char *err_str, struct ivt_header *ivt_hdr)
{
	printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str,
	       ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version);

	return 1;
}

static int verify_ivt_header(struct ivt_header *ivt_hdr)
{
	int result = 0;

	if (ivt_hdr->magic != IVT_HEADER_MAGIC)
		result = ivt_header_error("bad magic", ivt_hdr);

	if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH)
		result = ivt_header_error("bad length", ivt_hdr);

	if (ivt_hdr->version != IVT_HEADER_V1 &&
	    ivt_hdr->version != IVT_HEADER_V2)
		result = ivt_header_error("bad version", ivt_hdr);

	return result;
}

#if !defined(CONFIG_SPL_BUILD)

#define MAX_RECORD_BYTES     (8*1024) /* 4 kbytes */

struct record {
	uint8_t  tag;						/* Tag */
	uint8_t  len[2];					/* Length */
	uint8_t  par;						/* Version */
	uint8_t  contents[MAX_RECORD_BYTES];/* Record Data */
	bool	 any_rec_flag;
};

static char *rsn_str[] = {
			  "RSN = HAB_RSN_ANY (0x00)\n",
			  "RSN = HAB_ENG_FAIL (0x30)\n",
			  "RSN = HAB_INV_ADDRESS (0x22)\n",
			  "RSN = HAB_INV_ASSERTION (0x0C)\n",
			  "RSN = HAB_INV_CALL (0x28)\n",
			  "RSN = HAB_INV_CERTIFICATE (0x21)\n",
			  "RSN = HAB_INV_COMMAND (0x06)\n",
			  "RSN = HAB_INV_CSF (0x11)\n",
			  "RSN = HAB_INV_DCD (0x27)\n",
			  "RSN = HAB_INV_INDEX (0x0F)\n",
			  "RSN = HAB_INV_IVT (0x05)\n",
			  "RSN = HAB_INV_KEY (0x1D)\n",
			  "RSN = HAB_INV_RETURN (0x1E)\n",
			  "RSN = HAB_INV_SIGNATURE (0x18)\n",
			  "RSN = HAB_INV_SIZE (0x17)\n",
			  "RSN = HAB_MEM_FAIL (0x2E)\n",
			  "RSN = HAB_OVR_COUNT (0x2B)\n",
			  "RSN = HAB_OVR_STORAGE (0x2D)\n",
			  "RSN = HAB_UNS_ALGORITHM (0x12)\n",
			  "RSN = HAB_UNS_COMMAND (0x03)\n",
			  "RSN = HAB_UNS_ENGINE (0x0A)\n",
			  "RSN = HAB_UNS_ITEM (0x24)\n",
			  "RSN = HAB_UNS_KEY (0x1B)\n",
			  "RSN = HAB_UNS_PROTOCOL (0x14)\n",
			  "RSN = HAB_UNS_STATE (0x09)\n",
			  "RSN = INVALID\n",
			  NULL
};

static char *sts_str[] = {
			  "STS = HAB_SUCCESS (0xF0)\n",
			  "STS = HAB_FAILURE (0x33)\n",
			  "STS = HAB_WARNING (0x69)\n",
			  "STS = INVALID\n",
			  NULL
};

static char *eng_str[] = {
			  "ENG = HAB_ENG_ANY (0x00)\n",
			  "ENG = HAB_ENG_SCC (0x03)\n",
			  "ENG = HAB_ENG_RTIC (0x05)\n",
			  "ENG = HAB_ENG_SAHARA (0x06)\n",
			  "ENG = HAB_ENG_CSU (0x0A)\n",
			  "ENG = HAB_ENG_SRTC (0x0C)\n",
			  "ENG = HAB_ENG_DCP (0x1B)\n",
			  "ENG = HAB_ENG_CAAM (0x1D)\n",
			  "ENG = HAB_ENG_SNVS (0x1E)\n",
			  "ENG = HAB_ENG_OCOTP (0x21)\n",
			  "ENG = HAB_ENG_DTCP (0x22)\n",
			  "ENG = HAB_ENG_ROM (0x36)\n",
			  "ENG = HAB_ENG_HDCP (0x24)\n",
			  "ENG = HAB_ENG_RTL (0x77)\n",
			  "ENG = HAB_ENG_SW (0xFF)\n",
			  "ENG = INVALID\n",
			  NULL
};

static char *ctx_str[] = {
			  "CTX = HAB_CTX_ANY(0x00)\n",
			  "CTX = HAB_CTX_FAB (0xFF)\n",
			  "CTX = HAB_CTX_ENTRY (0xE1)\n",
			  "CTX = HAB_CTX_TARGET (0x33)\n",
			  "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
			  "CTX = HAB_CTX_DCD (0xDD)\n",
			  "CTX = HAB_CTX_CSF (0xCF)\n",
			  "CTX = HAB_CTX_COMMAND (0xC0)\n",
			  "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
			  "CTX = HAB_CTX_ASSERT (0xA0)\n",
			  "CTX = HAB_CTX_EXIT (0xEE)\n",
			  "CTX = INVALID\n",
			  NULL
};

static uint8_t hab_statuses[5] = {
	HAB_STS_ANY,
	HAB_FAILURE,
	HAB_WARNING,
	HAB_SUCCESS,
	-1
};

static uint8_t hab_reasons[26] = {
	HAB_RSN_ANY,
	HAB_ENG_FAIL,
	HAB_INV_ADDRESS,
	HAB_INV_ASSERTION,
	HAB_INV_CALL,
	HAB_INV_CERTIFICATE,
	HAB_INV_COMMAND,
	HAB_INV_CSF,
	HAB_INV_DCD,
	HAB_INV_INDEX,
	HAB_INV_IVT,
	HAB_INV_KEY,
	HAB_INV_RETURN,
	HAB_INV_SIGNATURE,
	HAB_INV_SIZE,
	HAB_MEM_FAIL,
	HAB_OVR_COUNT,
	HAB_OVR_STORAGE,
	HAB_UNS_ALGORITHM,
	HAB_UNS_COMMAND,
	HAB_UNS_ENGINE,
	HAB_UNS_ITEM,
	HAB_UNS_KEY,
	HAB_UNS_PROTOCOL,
	HAB_UNS_STATE,
	-1
};

static uint8_t hab_contexts[12] = {
	HAB_CTX_ANY,
	HAB_CTX_FAB,
	HAB_CTX_ENTRY,
	HAB_CTX_TARGET,
	HAB_CTX_AUTHENTICATE,
	HAB_CTX_DCD,
	HAB_CTX_CSF,
	HAB_CTX_COMMAND,
	HAB_CTX_AUT_DAT,
	HAB_CTX_ASSERT,
	HAB_CTX_EXIT,
	-1
};

static uint8_t hab_engines[16] = {
	HAB_ENG_ANY,
	HAB_ENG_SCC,
	HAB_ENG_RTIC,
	HAB_ENG_SAHARA,
	HAB_ENG_CSU,
	HAB_ENG_SRTC,
	HAB_ENG_DCP,
	HAB_ENG_CAAM,
	HAB_ENG_SNVS,
	HAB_ENG_OCOTP,
	HAB_ENG_DTCP,
	HAB_ENG_ROM,
	HAB_ENG_HDCP,
	HAB_ENG_RTL,
	HAB_ENG_SW,
	-1
};

static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
{
	uint8_t idx = 0;
	uint8_t element = list[idx];
	while (element != -1) {
		if (element == tgt)
			return idx;
		element = list[++idx];
	}
	return -1;
}

static void process_event_record(uint8_t *event_data, size_t bytes)
{
	struct record *rec = (struct record *)event_data;

	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
}

static void display_event(uint8_t *event_data, size_t bytes)
{
	uint32_t i;

	if (!(event_data && bytes > 0))
		return;

	for (i = 0; i < bytes; i++) {
		if (i == 0)
			printf("\t0x%02x", event_data[i]);
		else if ((i % 8) == 0)
			printf("\n\t0x%02x", event_data[i]);
		else
			printf(" 0x%02x", event_data[i]);
	}

	process_event_record(event_data, bytes);
}

static int get_hab_status(void)
{
	uint32_t index = 0; /* Loop index */
	uint8_t event_data[128]; /* Event data buffer */
	size_t bytes = sizeof(event_data); /* Event size in bytes */
	enum hab_config config = 0;
	enum hab_state state = 0;
	hab_rvt_report_event_t *hab_rvt_report_event;
	hab_rvt_report_status_t *hab_rvt_report_status;

	hab_rvt_report_event = hab_rvt_report_event_p;
	hab_rvt_report_status = hab_rvt_report_status_p;

	if (is_hab_enabled())
		puts("\nSecure boot enabled\n");
	else
		puts("\nSecure boot disabled\n");

	/* Check HAB status */
	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);

		/* Display HAB Error events */
		while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
					&bytes) == HAB_SUCCESS) {
			puts("\n");
			printf("--------- HAB Event %d -----------------\n",
			       index + 1);
			puts("event data:\n");
			display_event(event_data, bytes);
			puts("\n");
			bytes = sizeof(event_data);
			index++;
		}
	}
	/* Display message if no HAB events are found */
	else {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);
		puts("No HAB Events Found!\n\n");
	}
	return 0;
}

static int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc,
			 char * const argv[])
{
	if ((argc != 1)) {
		cmd_usage(cmdtp);
		return 1;
	}

	get_hab_status();

	return 0;
}

static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
				 char * const argv[])
{
	ulong	addr, length, ivt_offset;
	int	rcode = 0;

	if (argc < 4)
		return CMD_RET_USAGE;

	addr = simple_strtoul(argv[1], NULL, 16);
	length = simple_strtoul(argv[2], NULL, 16);
	ivt_offset = simple_strtoul(argv[3], NULL, 16);

	rcode = imx_hab_authenticate_image(addr, length, ivt_offset);
	if (rcode == 0)
		rcode = CMD_RET_SUCCESS;
	else
		rcode = CMD_RET_FAILURE;

	return rcode;
}

U_BOOT_CMD(
		hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
		"display HAB status",
		""
	  );

U_BOOT_CMD(
		hab_auth_img, 4, 0, do_authenticate_image,
		"authenticate image via HAB",
		"addr length ivt_offset\n"
		"addr - image hex address\n"
		"length - image hex length\n"
		"ivt_offset - hex offset of IVT in the image"
	  );


#endif /* !defined(CONFIG_SPL_BUILD) */

static bool is_hab_enabled(void)
{
	struct imx_sec_config_fuse_t *fuse =
		(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	uint32_t reg;
	int ret;

	ret = fuse_read(fuse->bank, fuse->word, &reg);
	if (ret) {
		puts("\nSecure boot fuse read error\n");
		return ret;
	}

	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
}

int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
			       uint32_t ivt_offset)
{
	uint32_t load_addr = 0;
	size_t bytes;
	uint32_t ivt_addr = 0;
	int result = 1;
	ulong start;
	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	hab_rvt_entry_t *hab_rvt_entry;
	hab_rvt_exit_t *hab_rvt_exit;
	hab_rvt_check_target_t *hab_rvt_check_target;
	struct ivt *ivt;
	struct ivt_header *ivt_hdr;
	enum hab_status status;

	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	hab_rvt_entry = hab_rvt_entry_p;
	hab_rvt_exit = hab_rvt_exit_p;
	hab_rvt_check_target = hab_rvt_check_target_p;

	if (!is_hab_enabled()) {
		puts("hab fuse not enabled\n");
		return result;
	}

	printf("\nAuthenticate image from DDR location 0x%x...\n",
	       ddr_start);

	hab_caam_clock_enable(1);

	/* Calculate IVT address header */
	ivt_addr = ddr_start + ivt_offset;
	ivt = (struct ivt *)ivt_addr;
	ivt_hdr = &ivt->hdr;

	/* Verify IVT header bugging out on error */
	if (verify_ivt_header(ivt_hdr))
		goto hab_caam_clock_disable;

	/* Verify IVT body */
	if (ivt->self != ivt_addr) {
		printf("ivt->self 0x%08x pointer is 0x%08x\n",
		       ivt->self, ivt_addr);
		goto hab_caam_clock_disable;
	}

	start = ddr_start;
	bytes = image_size;

	if (hab_rvt_entry() != HAB_SUCCESS) {
		puts("hab entry function fail\n");
		goto hab_exit_failure_print_status;
	}

	status = hab_rvt_check_target(HAB_TGT_MEMORY, (void *)ddr_start, bytes);
	if (status != HAB_SUCCESS) {
		printf("HAB check target 0x%08x-0x%08x fail\n",
		       ddr_start, ddr_start + bytes);
		goto hab_exit_failure_print_status;
	}
#ifdef DEBUG
	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
	printf("ivt entry = 0x%08x, dcd = 0x%08x, csf = 0x%08x\n", ivt->entry,
	       ivt->dcd, ivt->csf);
	puts("Dumping IVT\n");
	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);

	puts("Dumping CSF Header\n");
	print_buffer(ivt->csf, (void *)(ivt->csf), 4, 0x10, 0);

#if  !defined(CONFIG_SPL_BUILD)
	get_hab_status();
#endif

	puts("\nCalling authenticate_image in ROM\n");
	printf("\tivt_offset = 0x%x\n", ivt_offset);
	printf("\tstart = 0x%08lx\n", start);
	printf("\tbytes = 0x%x\n", bytes);
#endif
	/*
	 * If the MMU is enabled, we have to notify the ROM
	 * code, or it won't flush the caches when needed.
	 * This is done, by setting the "pu_irom_mmu_enabled"
	 * word to 1. You can find its address by looking in
	 * the ROM map. This is critical for
	 * authenticate_image(). If MMU is enabled, without
	 * setting this bit, authentication will fail and may
	 * crash.
	 */
	/* Check MMU enabled */
	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
		if (is_mx6dq()) {
			/*
			 * This won't work on Rev 1.0.0 of
			 * i.MX6Q/D, since their ROM doesn't
			 * do cache flushes. don't think any
			 * exist, so we ignore them.
			 */
			if (!is_mx6dqp())
				writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
		} else if (is_mx6sdl()) {
			writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
		} else if (is_mx6sl()) {
			writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
		}
	}

	load_addr = (uint32_t)hab_rvt_authenticate_image(
			HAB_CID_UBOOT,
			ivt_offset, (void **)&start,
			(size_t *)&bytes, NULL);
	if (hab_rvt_exit() != HAB_SUCCESS) {
		puts("hab exit function fail\n");
		load_addr = 0;
	}

hab_exit_failure_print_status:
#if !defined(CONFIG_SPL_BUILD)
	get_hab_status();
#endif

hab_caam_clock_disable:
	hab_caam_clock_enable(0);

	if (load_addr != 0)
		result = 0;

	return result;
}
Commit	Line	Data
b83c709e	1	/*
29067abf	2	* Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
b83c709e SB	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
fba6f9ef AA	8	#include <config.h>
fba6f9ef AA	9	#include <fuse.h>
b83c709e	10	#include <asm/io.h>
36c1ca4d	11	#include <asm/system.h>
36c1ca4d	12	#include <asm/arch/clock.h>
f2f07e85	13	#include <asm/arch/sys_proto.h>
552a848e	14	#include <asm/mach-imx/hab.h>
b83c709e SB	15
b83c709e SB	16	/* -------- start of HAB API updates ------------*/
f2f07e85 SB	17
	18	#define hab_rvt_report_event_p \
	19	( \
b5437a80 PF	20	(is_mx6dqp()) ? \
b5437a80 PF	21	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
27cd0da4	22	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	23	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
27cd0da4	24	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	25	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
	26	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
	27	)
	28
	29	#define hab_rvt_report_status_p \
	30	( \
b5437a80 PF	31	(is_mx6dqp()) ? \
b5437a80 PF	32	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
27cd0da4	33	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	34	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
27cd0da4	35	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	36	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	37	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
	38	)
	39
	40	#define hab_rvt_authenticate_image_p \
	41	( \
b5437a80 PF	42	(is_mx6dqp()) ? \
b5437a80 PF	43	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
27cd0da4	44	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	45	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
27cd0da4	46	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	47	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	48	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
	49	)
	50
	51	#define hab_rvt_entry_p \
	52	( \
b5437a80 PF	53	(is_mx6dqp()) ? \
b5437a80 PF	54	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
27cd0da4	55	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	56	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
27cd0da4	57	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	58	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
	59	((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
	60	)
	61
	62	#define hab_rvt_exit_p \
	63	( \
b5437a80 PF	64	(is_mx6dqp()) ? \
b5437a80 PF	65	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
27cd0da4	66	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	67	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
27cd0da4	68	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	69	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
	70	((hab_rvt_exit_t *)HAB_RVT_EXIT) \
	71	)
b83c709e	72
c0a55b73 BD	73	static inline enum hab_status hab_rvt_check_target_new(enum hab_target target,
	74	const void *start,
	75	size_t bytes)
	76	{
	77	return HAB_SUCCESS;
	78	}
	79
	80	#define hab_rvt_check_target_p \
	81	( \
	82	(is_mx6dqp()) ? \
	83	((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
	84	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
	85	((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
	86	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
	87	((hab_rvt_check_target_t *)hab_rvt_check_target_new) : \
	88	((hab_rvt_check_target_t *)HAB_RVT_CHECK_TARGET) \
	89	)
	90
36c1ca4d	91	#define ALIGN_SIZE 0x1000
36c1ca4d NG	92	#define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
	93	#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
	94	#define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
ee3899aa	95	#define IS_HAB_ENABLED_BIT \
27117b20 PF	96	(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
27117b20 PF	97	(is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
36c1ca4d	98
15b505b0 SE	99	static bool is_hab_enabled(void);
15b505b0 SE	100
49b6d058 BD	101	static int ivt_header_error(const char err_str, struct ivt_header ivt_hdr)
	102	{
	103	printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str,
	104	ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version);
	105
	106	return 1;
	107	}
	108
	109	static int verify_ivt_header(struct ivt_header *ivt_hdr)
	110	{
	111	int result = 0;
	112
	113	if (ivt_hdr->magic != IVT_HEADER_MAGIC)
	114	result = ivt_header_error("bad magic", ivt_hdr);
	115
	116	if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH)
	117	result = ivt_header_error("bad length", ivt_hdr);
	118
	119	if (ivt_hdr->version != IVT_HEADER_V1 &&
	120	ivt_hdr->version != IVT_HEADER_V2)
	121	result = ivt_header_error("bad version", ivt_hdr);
	122
	123	return result;
	124	}
	125
15b505b0 SE	126	#if !defined(CONFIG_SPL_BUILD)
15b505b0 SE	127
29067abf UC	128	#define MAX_RECORD_BYTES (81024) / 4 kbytes */
	129
	130	struct record {
	131	uint8_t tag; /* Tag */
	132	uint8_t len[2]; /* Length */
	133	uint8_t par; /* Version */
	134	uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
	135	bool any_rec_flag;
	136	};
	137
58bebfb7 BD	138	static char *rsn_str[] = {
	139	"RSN = HAB_RSN_ANY (0x00)\n",
	140	"RSN = HAB_ENG_FAIL (0x30)\n",
	141	"RSN = HAB_INV_ADDRESS (0x22)\n",
	142	"RSN = HAB_INV_ASSERTION (0x0C)\n",
	143	"RSN = HAB_INV_CALL (0x28)\n",
	144	"RSN = HAB_INV_CERTIFICATE (0x21)\n",
	145	"RSN = HAB_INV_COMMAND (0x06)\n",
	146	"RSN = HAB_INV_CSF (0x11)\n",
	147	"RSN = HAB_INV_DCD (0x27)\n",
	148	"RSN = HAB_INV_INDEX (0x0F)\n",
	149	"RSN = HAB_INV_IVT (0x05)\n",
	150	"RSN = HAB_INV_KEY (0x1D)\n",
	151	"RSN = HAB_INV_RETURN (0x1E)\n",
	152	"RSN = HAB_INV_SIGNATURE (0x18)\n",
	153	"RSN = HAB_INV_SIZE (0x17)\n",
	154	"RSN = HAB_MEM_FAIL (0x2E)\n",
	155	"RSN = HAB_OVR_COUNT (0x2B)\n",
	156	"RSN = HAB_OVR_STORAGE (0x2D)\n",
	157	"RSN = HAB_UNS_ALGORITHM (0x12)\n",
	158	"RSN = HAB_UNS_COMMAND (0x03)\n",
	159	"RSN = HAB_UNS_ENGINE (0x0A)\n",
	160	"RSN = HAB_UNS_ITEM (0x24)\n",
	161	"RSN = HAB_UNS_KEY (0x1B)\n",
	162	"RSN = HAB_UNS_PROTOCOL (0x14)\n",
	163	"RSN = HAB_UNS_STATE (0x09)\n",
	164	"RSN = INVALID\n",
	165	NULL
	166	};
	167
	168	static char *sts_str[] = {
	169	"STS = HAB_SUCCESS (0xF0)\n",
	170	"STS = HAB_FAILURE (0x33)\n",
	171	"STS = HAB_WARNING (0x69)\n",
	172	"STS = INVALID\n",
	173	NULL
	174	};
	175
	176	static char *eng_str[] = {
	177	"ENG = HAB_ENG_ANY (0x00)\n",
	178	"ENG = HAB_ENG_SCC (0x03)\n",
	179	"ENG = HAB_ENG_RTIC (0x05)\n",
	180	"ENG = HAB_ENG_SAHARA (0x06)\n",
	181	"ENG = HAB_ENG_CSU (0x0A)\n",
	182	"ENG = HAB_ENG_SRTC (0x0C)\n",
	183	"ENG = HAB_ENG_DCP (0x1B)\n",
	184	"ENG = HAB_ENG_CAAM (0x1D)\n",
	185	"ENG = HAB_ENG_SNVS (0x1E)\n",
	186	"ENG = HAB_ENG_OCOTP (0x21)\n",
	187	"ENG = HAB_ENG_DTCP (0x22)\n",
	188	"ENG = HAB_ENG_ROM (0x36)\n",
	189	"ENG = HAB_ENG_HDCP (0x24)\n",
	190	"ENG = HAB_ENG_RTL (0x77)\n",
	191	"ENG = HAB_ENG_SW (0xFF)\n",
	192	"ENG = INVALID\n",
	193	NULL
	194	};
	195
	196	static char *ctx_str[] = {
	197	"CTX = HAB_CTX_ANY(0x00)\n",
	198	"CTX = HAB_CTX_FAB (0xFF)\n",
	199	"CTX = HAB_CTX_ENTRY (0xE1)\n",
	200	"CTX = HAB_CTX_TARGET (0x33)\n",
	201	"CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
202	"CTX = HAB_CTX_DCD (0xDD)\n",
203	"CTX = HAB_CTX_CSF (0xCF)\n",
204	"CTX = HAB_CTX_COMMAND (0xC0)\n",
205	"CTX = HAB_CTX_AUT_DAT (0xDB)\n",
206	"CTX = HAB_CTX_ASSERT (0xA0)\n",
207	"CTX = HAB_CTX_EXIT (0xEE)\n",
208	"CTX = INVALID\n",
209	NULL
210	};
211
212	static uint8_t hab_statuses[5] = {
29067abf UC	213	HAB_STS_ANY,
	214	HAB_FAILURE,
	215	HAB_WARNING,
	216	HAB_SUCCESS,
	217	-1
	218	};
	219
58bebfb7	220	static uint8_t hab_reasons[26] = {
29067abf UC	221	HAB_RSN_ANY,
	222	HAB_ENG_FAIL,
	223	HAB_INV_ADDRESS,
	224	HAB_INV_ASSERTION,
	225	HAB_INV_CALL,
	226	HAB_INV_CERTIFICATE,
	227	HAB_INV_COMMAND,
	228	HAB_INV_CSF,
	229	HAB_INV_DCD,
	230	HAB_INV_INDEX,
	231	HAB_INV_IVT,
	232	HAB_INV_KEY,
	233	HAB_INV_RETURN,
	234	HAB_INV_SIGNATURE,
	235	HAB_INV_SIZE,
	236	HAB_MEM_FAIL,
	237	HAB_OVR_COUNT,
	238	HAB_OVR_STORAGE,
	239	HAB_UNS_ALGORITHM,
	240	HAB_UNS_COMMAND,
	241	HAB_UNS_ENGINE,
	242	HAB_UNS_ITEM,
	243	HAB_UNS_KEY,
	244	HAB_UNS_PROTOCOL,
	245	HAB_UNS_STATE,
	246	-1
	247	};
	248
58bebfb7	249	static uint8_t hab_contexts[12] = {
29067abf UC	250	HAB_CTX_ANY,
	251	HAB_CTX_FAB,
	252	HAB_CTX_ENTRY,
	253	HAB_CTX_TARGET,
	254	HAB_CTX_AUTHENTICATE,
	255	HAB_CTX_DCD,
	256	HAB_CTX_CSF,
	257	HAB_CTX_COMMAND,
	258	HAB_CTX_AUT_DAT,
	259	HAB_CTX_ASSERT,
	260	HAB_CTX_EXIT,
	261	-1
	262	};
	263
58bebfb7	264	static uint8_t hab_engines[16] = {
29067abf UC	265	HAB_ENG_ANY,
	266	HAB_ENG_SCC,
	267	HAB_ENG_RTIC,
	268	HAB_ENG_SAHARA,
	269	HAB_ENG_CSU,
	270	HAB_ENG_SRTC,
	271	HAB_ENG_DCP,
	272	HAB_ENG_CAAM,
	273	HAB_ENG_SNVS,
	274	HAB_ENG_OCOTP,
	275	HAB_ENG_DTCP,
	276	HAB_ENG_ROM,
	277	HAB_ENG_HDCP,
	278	HAB_ENG_RTL,
	279	HAB_ENG_SW,
	280	-1
	281	};
	282
29067abf UC	283	static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
	284	{
	285	uint8_t idx = 0;
	286	uint8_t element = list[idx];
	287	while (element != -1) {
	288	if (element == tgt)
	289	return idx;
	290	element = list[++idx];
	291	}
	292	return -1;
	293	}
	294
58bebfb7	295	static void process_event_record(uint8_t *event_data, size_t bytes)
29067abf UC	296	{
	297	struct record rec = (struct record )event_data;
	298
	299	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	300	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	301	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	302	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
	303	}
	304
58bebfb7	305	static void display_event(uint8_t *event_data, size_t bytes)
b83c709e SB	306	{
	307	uint32_t i;
	308
	309	if (!(event_data && bytes > 0))
	310	return;
	311
	312	for (i = 0; i < bytes; i++) {
	313	if (i == 0)
	314	printf("\t0x%02x", event_data[i]);
	315	else if ((i % 8) == 0)
	316	printf("\n\t0x%02x", event_data[i]);
	317	else
	318	printf(" 0x%02x", event_data[i]);
	319	}
29067abf UC	320
29067abf UC	321	process_event_record(event_data, bytes);
b83c709e SB	322	}
b83c709e SB	323
58bebfb7	324	static int get_hab_status(void)
b83c709e SB	325	{
	326	uint32_t index = 0; /* Loop index */
	327	uint8_t event_data[128]; /* Event data buffer */
	328	size_t bytes = sizeof(event_data); /* Event size in bytes */
	329	enum hab_config config = 0;
	330	enum hab_state state = 0;
f2f07e85 SB	331	hab_rvt_report_event_t *hab_rvt_report_event;
	332	hab_rvt_report_status_t *hab_rvt_report_status;
	333
	334	hab_rvt_report_event = hab_rvt_report_event_p;
	335	hab_rvt_report_status = hab_rvt_report_status_p;
b83c709e SB	336
	337	if (is_hab_enabled())
	338	puts("\nSecure boot enabled\n");
	339	else
	340	puts("\nSecure boot disabled\n");
	341
	342	/* Check HAB status */
	343	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
	344	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	345	config, state);
	346
	347	/* Display HAB Error events */
	348	while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
	349	&bytes) == HAB_SUCCESS) {
	350	puts("\n");
	351	printf("--------- HAB Event %d -----------------\n",
	352	index + 1);
	353	puts("event data:\n");
	354	display_event(event_data, bytes);
	355	puts("\n");
	356	bytes = sizeof(event_data);
	357	index++;
	358	}
	359	}
	360	/* Display message if no HAB events are found */
	361	else {
	362	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	363	config, state);
	364	puts("No HAB Events Found!\n\n");
	365	}
	366	return 0;
	367	}
	368
58bebfb7 BD	369	static int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc,
58bebfb7 BD	370	char * const argv[])
15b505b0 SE	371	{
	372	if ((argc != 1)) {
	373	cmd_usage(cmdtp);
	374	return 1;
	375	}
	376
	377	get_hab_status();
	378
	379	return 0;
	380	}
	381
	382	static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
58bebfb7	383	char * const argv[])
15b505b0	384	{
c5800b25	385	ulong addr, length, ivt_offset;
15b505b0 SE	386	int rcode = 0;
15b505b0 SE	387
c5800b25	388	if (argc < 4)
15b505b0 SE	389	return CMD_RET_USAGE;
	390
	391	addr = simple_strtoul(argv[1], NULL, 16);
c5800b25 BD	392	length = simple_strtoul(argv[2], NULL, 16);
c5800b25 BD	393	ivt_offset = simple_strtoul(argv[3], NULL, 16);
15b505b0	394
57f65486	395	rcode = imx_hab_authenticate_image(addr, length, ivt_offset);
9535b397 BD	396	if (rcode == 0)
	397	rcode = CMD_RET_SUCCESS;
	398	else
	399	rcode = CMD_RET_FAILURE;
c5800b25	400
15b505b0 SE	401	return rcode;
	402	}
	403
	404	U_BOOT_CMD(
	405	hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
	406	"display HAB status",
	407	""
	408	);
	409
	410	U_BOOT_CMD(
c5800b25	411	hab_auth_img, 4, 0, do_authenticate_image,
15b505b0	412	"authenticate image via HAB",
c5800b25	413	"addr length ivt_offset\n"
15b505b0	414	"addr - image hex address\n"
c5800b25	415	"length - image hex length\n"
15b505b0 SE	416	"ivt_offset - hex offset of IVT in the image"
	417	);
	418
	419
	420	#endif /* !defined(CONFIG_SPL_BUILD) */
	421
	422	static bool is_hab_enabled(void)
	423	{
	424	struct imx_sec_config_fuse_t *fuse =
	425	(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	426	uint32_t reg;
	427	int ret;
	428
	429	ret = fuse_read(fuse->bank, fuse->word, &reg);
	430	if (ret) {
	431	puts("\nSecure boot fuse read error\n");
	432	return ret;
	433	}
	434
	435	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
	436	}
	437
57f65486 BD	438	int imx_hab_authenticate_image(uint32_t ddr_start, uint32_t image_size,
57f65486 BD	439	uint32_t ivt_offset)
36c1ca4d NG	440	{
	441	uint32_t load_addr = 0;
	442	size_t bytes;
c5800b25	443	uint32_t ivt_addr = 0;
9535b397	444	int result = 1;
36c1ca4d NG	445	ulong start;
	446	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	447	hab_rvt_entry_t *hab_rvt_entry;
	448	hab_rvt_exit_t *hab_rvt_exit;
b7c3cae7	449	hab_rvt_check_target_t *hab_rvt_check_target;
49b6d058 BD	450	struct ivt *ivt;
49b6d058 BD	451	struct ivt_header *ivt_hdr;
b7c3cae7	452	enum hab_status status;
36c1ca4d NG	453
	454	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	455	hab_rvt_entry = hab_rvt_entry_p;
	456	hab_rvt_exit = hab_rvt_exit_p;
b7c3cae7	457	hab_rvt_check_target = hab_rvt_check_target_p;
36c1ca4d	458
d2c61800 BD	459	if (!is_hab_enabled()) {
	460	puts("hab fuse not enabled\n");
	461	return result;
	462	}
36c1ca4d	463
d2c61800 BD	464	printf("\nAuthenticate image from DDR location 0x%x...\n",
d2c61800 BD	465	ddr_start);
36c1ca4d	466
d2c61800	467	hab_caam_clock_enable(1);
36c1ca4d	468
c5800b25 BD	469	/* Calculate IVT address header */
c5800b25 BD	470	ivt_addr = ddr_start + ivt_offset;
49b6d058 BD	471	ivt = (struct ivt *)ivt_addr;
	472	ivt_hdr = &ivt->hdr;
	473
	474	/* Verify IVT header bugging out on error */
	475	if (verify_ivt_header(ivt_hdr))
	476	goto hab_caam_clock_disable;
	477
e59eb9e0 BD	478	/* Verify IVT body */
	479	if (ivt->self != ivt_addr) {
	480	printf("ivt->self 0x%08x pointer is 0x%08x\n",
	481	ivt->self, ivt_addr);
	482	goto hab_caam_clock_disable;
	483	}
	484
53c8a510	485	start = ddr_start;
c5800b25	486	bytes = image_size;
04099e9c BD	487
	488	if (hab_rvt_entry() != HAB_SUCCESS) {
	489	puts("hab entry function fail\n");
2c6c68d2	490	goto hab_exit_failure_print_status;
04099e9c BD	491	}
04099e9c BD	492
b7c3cae7 BD	493	status = hab_rvt_check_target(HAB_TGT_MEMORY, (void *)ddr_start, bytes);
	494	if (status != HAB_SUCCESS) {
	495	printf("HAB check target 0x%08x-0x%08x fail\n",
	496	ddr_start, ddr_start + bytes);
2c6c68d2	497	goto hab_exit_failure_print_status;
b7c3cae7	498	}
36c1ca4d	499	#ifdef DEBUG
c5800b25	500	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
824ef302 BD	501	printf("ivt entry = 0x%08x, dcd = 0x%08x, csf = 0x%08x\n", ivt->entry,
824ef302 BD	502	ivt->dcd, ivt->csf);
53c8a510	503	puts("Dumping IVT\n");
c5800b25	504	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
53c8a510 BD	505
53c8a510 BD	506	puts("Dumping CSF Header\n");
fd15fe5f	507	print_buffer(ivt->csf, (void *)(ivt->csf), 4, 0x10, 0);
36c1ca4d	508
15b505b0	509	#if !defined(CONFIG_SPL_BUILD)
53c8a510	510	get_hab_status();
15b505b0	511	#endif
36c1ca4d	512
53c8a510 BD	513	puts("\nCalling authenticate_image in ROM\n");
	514	printf("\tivt_offset = 0x%x\n", ivt_offset);
	515	printf("\tstart = 0x%08lx\n", start);
	516	printf("\tbytes = 0x%x\n", bytes);
36c1ca4d	517	#endif
53c8a510 BD	518	/*
	519	* If the MMU is enabled, we have to notify the ROM
	520	* code, or it won't flush the caches when needed.
	521	* This is done, by setting the "pu_irom_mmu_enabled"
	522	* word to 1. You can find its address by looking in
	523	* the ROM map. This is critical for
	524	* authenticate_image(). If MMU is enabled, without
	525	* setting this bit, authentication will fail and may
	526	* crash.
	527	*/
	528	/* Check MMU enabled */
	529	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
	530	if (is_mx6dq()) {
	531	/*
	532	* This won't work on Rev 1.0.0 of
	533	* i.MX6Q/D, since their ROM doesn't
	534	* do cache flushes. don't think any
	535	* exist, so we ignore them.
	536	*/
	537	if (!is_mx6dqp())
	538	writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
	539	} else if (is_mx6sdl()) {
	540	writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
	541	} else if (is_mx6sl()) {
	542	writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
d2c61800	543	}
53c8a510	544	}
36c1ca4d	545
53c8a510 BD	546	load_addr = (uint32_t)hab_rvt_authenticate_image(
	547	HAB_CID_UBOOT,
	548	ivt_offset, (void **)&start,
	549	(size_t *)&bytes, NULL);
	550	if (hab_rvt_exit() != HAB_SUCCESS) {
	551	puts("hab exit function fail\n");
	552	load_addr = 0;
d2c61800	553	}
36c1ca4d	554
2c6c68d2	555	hab_exit_failure_print_status:
15b505b0	556	#if !defined(CONFIG_SPL_BUILD)
d2c61800	557	get_hab_status();
15b505b0	558	#endif
2c6c68d2 BD	559
	560	hab_caam_clock_disable:
	561	hab_caam_clock_enable(0);
	562
d2c61800	563	if (load_addr != 0)
9535b397	564	result = 0;
36c1ca4d NG	565
	566	return result;
	567	}