[people/ms/u-boot.git] / arch / arm / mach-imx / hab.c

/*
 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:    GPL-2.0+
 */

#include <common.h>
#include <config.h>
#include <fuse.h>
#include <asm/io.h>
#include <asm/system.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>
#include <asm/mach-imx/hab.h>

/* -------- start of HAB API updates ------------*/

#define hab_rvt_report_event_p					\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :	\
	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)	\
)

#define hab_rvt_report_status_p					\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)	\
)

#define hab_rvt_authenticate_image_p				\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)	\
)

#define hab_rvt_entry_p						\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :		\
	((hab_rvt_entry_t *)HAB_RVT_ENTRY)			\
)

#define hab_rvt_exit_p						\
(								\
	(is_mx6dqp()) ?						\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	(is_mx6sdl() &&	(soc_rev() >= CHIP_REV_1_2)) ?		\
	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :			\
	((hab_rvt_exit_t *)HAB_RVT_EXIT)			\
)

#define ALIGN_SIZE		0x1000
#define MX6DQ_PU_IROM_MMU_EN_VAR	0x009024a8
#define MX6DLS_PU_IROM_MMU_EN_VAR	0x00901dd0
#define MX6SL_PU_IROM_MMU_EN_VAR	0x00900a18
#define IS_HAB_ENABLED_BIT \
	(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 :	\
	 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))

static bool is_hab_enabled(void);

static int ivt_header_error(const char *err_str, struct ivt_header *ivt_hdr)
{
	printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str,
	       ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version);

	return 1;
}

static int verify_ivt_header(struct ivt_header *ivt_hdr)
{
	int result = 0;

	if (ivt_hdr->magic != IVT_HEADER_MAGIC)
		result = ivt_header_error("bad magic", ivt_hdr);

	if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH)
		result = ivt_header_error("bad length", ivt_hdr);

	if (ivt_hdr->version != IVT_HEADER_V1 &&
	    ivt_hdr->version != IVT_HEADER_V2)
		result = ivt_header_error("bad version", ivt_hdr);

	return result;
}

#if !defined(CONFIG_SPL_BUILD)

#define MAX_RECORD_BYTES     (8*1024) /* 4 kbytes */

struct record {
	uint8_t  tag;						/* Tag */
	uint8_t  len[2];					/* Length */
	uint8_t  par;						/* Version */
	uint8_t  contents[MAX_RECORD_BYTES];/* Record Data */
	bool	 any_rec_flag;
};

char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
				   "RSN = HAB_ENG_FAIL (0x30)\n",
				   "RSN = HAB_INV_ADDRESS (0x22)\n",
				   "RSN = HAB_INV_ASSERTION (0x0C)\n",
				   "RSN = HAB_INV_CALL (0x28)\n",
				   "RSN = HAB_INV_CERTIFICATE (0x21)\n",
				   "RSN = HAB_INV_COMMAND (0x06)\n",
				   "RSN = HAB_INV_CSF (0x11)\n",
				   "RSN = HAB_INV_DCD (0x27)\n",
				   "RSN = HAB_INV_INDEX (0x0F)\n",
				   "RSN = HAB_INV_IVT (0x05)\n",
				   "RSN = HAB_INV_KEY (0x1D)\n",
				   "RSN = HAB_INV_RETURN (0x1E)\n",
				   "RSN = HAB_INV_SIGNATURE (0x18)\n",
				   "RSN = HAB_INV_SIZE (0x17)\n",
				   "RSN = HAB_MEM_FAIL (0x2E)\n",
				   "RSN = HAB_OVR_COUNT (0x2B)\n",
				   "RSN = HAB_OVR_STORAGE (0x2D)\n",
				   "RSN = HAB_UNS_ALGORITHM (0x12)\n",
				   "RSN = HAB_UNS_COMMAND (0x03)\n",
				   "RSN = HAB_UNS_ENGINE (0x0A)\n",
				   "RSN = HAB_UNS_ITEM (0x24)\n",
				   "RSN = HAB_UNS_KEY (0x1B)\n",
				   "RSN = HAB_UNS_PROTOCOL (0x14)\n",
				   "RSN = HAB_UNS_STATE (0x09)\n",
				   "RSN = INVALID\n",
				   NULL};

char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
				   "STS = HAB_FAILURE (0x33)\n",
				   "STS = HAB_WARNING (0x69)\n",
				   "STS = INVALID\n",
				   NULL};

char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
				   "ENG = HAB_ENG_SCC (0x03)\n",
				   "ENG = HAB_ENG_RTIC (0x05)\n",
				   "ENG = HAB_ENG_SAHARA (0x06)\n",
				   "ENG = HAB_ENG_CSU (0x0A)\n",
				   "ENG = HAB_ENG_SRTC (0x0C)\n",
				   "ENG = HAB_ENG_DCP (0x1B)\n",
				   "ENG = HAB_ENG_CAAM (0x1D)\n",
				   "ENG = HAB_ENG_SNVS (0x1E)\n",
				   "ENG = HAB_ENG_OCOTP (0x21)\n",
				   "ENG = HAB_ENG_DTCP (0x22)\n",
				   "ENG = HAB_ENG_ROM (0x36)\n",
				   "ENG = HAB_ENG_HDCP (0x24)\n",
				   "ENG = HAB_ENG_RTL (0x77)\n",
				   "ENG = HAB_ENG_SW (0xFF)\n",
				   "ENG = INVALID\n",
				   NULL};

char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
				   "CTX = HAB_CTX_FAB (0xFF)\n",
				   "CTX = HAB_CTX_ENTRY (0xE1)\n",
				   "CTX = HAB_CTX_TARGET (0x33)\n",
				   "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
				   "CTX = HAB_CTX_DCD (0xDD)\n",
				   "CTX = HAB_CTX_CSF (0xCF)\n",
				   "CTX = HAB_CTX_COMMAND (0xC0)\n",
				   "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
				   "CTX = HAB_CTX_ASSERT (0xA0)\n",
				   "CTX = HAB_CTX_EXIT (0xEE)\n",
				   "CTX = INVALID\n",
				   NULL};

uint8_t hab_statuses[5] = {
	HAB_STS_ANY,
	HAB_FAILURE,
	HAB_WARNING,
	HAB_SUCCESS,
	-1
};

uint8_t hab_reasons[26] = {
	HAB_RSN_ANY,
	HAB_ENG_FAIL,
	HAB_INV_ADDRESS,
	HAB_INV_ASSERTION,
	HAB_INV_CALL,
	HAB_INV_CERTIFICATE,
	HAB_INV_COMMAND,
	HAB_INV_CSF,
	HAB_INV_DCD,
	HAB_INV_INDEX,
	HAB_INV_IVT,
	HAB_INV_KEY,
	HAB_INV_RETURN,
	HAB_INV_SIGNATURE,
	HAB_INV_SIZE,
	HAB_MEM_FAIL,
	HAB_OVR_COUNT,
	HAB_OVR_STORAGE,
	HAB_UNS_ALGORITHM,
	HAB_UNS_COMMAND,
	HAB_UNS_ENGINE,
	HAB_UNS_ITEM,
	HAB_UNS_KEY,
	HAB_UNS_PROTOCOL,
	HAB_UNS_STATE,
	-1
};

uint8_t hab_contexts[12] = {
	HAB_CTX_ANY,
	HAB_CTX_FAB,
	HAB_CTX_ENTRY,
	HAB_CTX_TARGET,
	HAB_CTX_AUTHENTICATE,
	HAB_CTX_DCD,
	HAB_CTX_CSF,
	HAB_CTX_COMMAND,
	HAB_CTX_AUT_DAT,
	HAB_CTX_ASSERT,
	HAB_CTX_EXIT,
	-1
};

uint8_t hab_engines[16] = {
	HAB_ENG_ANY,
	HAB_ENG_SCC,
	HAB_ENG_RTIC,
	HAB_ENG_SAHARA,
	HAB_ENG_CSU,
	HAB_ENG_SRTC,
	HAB_ENG_DCP,
	HAB_ENG_CAAM,
	HAB_ENG_SNVS,
	HAB_ENG_OCOTP,
	HAB_ENG_DTCP,
	HAB_ENG_ROM,
	HAB_ENG_HDCP,
	HAB_ENG_RTL,
	HAB_ENG_SW,
	-1
};

static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
{
	uint8_t idx = 0;
	uint8_t element = list[idx];
	while (element != -1) {
		if (element == tgt)
			return idx;
		element = list[++idx];
	}
	return -1;
}

void process_event_record(uint8_t *event_data, size_t bytes)
{
	struct record *rec = (struct record *)event_data;

	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
}

void display_event(uint8_t *event_data, size_t bytes)
{
	uint32_t i;

	if (!(event_data && bytes > 0))
		return;

	for (i = 0; i < bytes; i++) {
		if (i == 0)
			printf("\t0x%02x", event_data[i]);
		else if ((i % 8) == 0)
			printf("\n\t0x%02x", event_data[i]);
		else
			printf(" 0x%02x", event_data[i]);
	}

	process_event_record(event_data, bytes);
}

int get_hab_status(void)
{
	uint32_t index = 0; /* Loop index */
	uint8_t event_data[128]; /* Event data buffer */
	size_t bytes = sizeof(event_data); /* Event size in bytes */
	enum hab_config config = 0;
	enum hab_state state = 0;
	hab_rvt_report_event_t *hab_rvt_report_event;
	hab_rvt_report_status_t *hab_rvt_report_status;

	hab_rvt_report_event = hab_rvt_report_event_p;
	hab_rvt_report_status = hab_rvt_report_status_p;

	if (is_hab_enabled())
		puts("\nSecure boot enabled\n");
	else
		puts("\nSecure boot disabled\n");

	/* Check HAB status */
	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);

		/* Display HAB Error events */
		while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
					&bytes) == HAB_SUCCESS) {
			puts("\n");
			printf("--------- HAB Event %d -----------------\n",
			       index + 1);
			puts("event data:\n");
			display_event(event_data, bytes);
			puts("\n");
			bytes = sizeof(event_data);
			index++;
		}
	}
	/* Display message if no HAB events are found */
	else {
		printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
		       config, state);
		puts("No HAB Events Found!\n\n");
	}
	return 0;
}

int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
	if ((argc != 1)) {
		cmd_usage(cmdtp);
		return 1;
	}

	get_hab_status();

	return 0;
}

static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
				char * const argv[])
{
	ulong	addr, length, ivt_offset;
	int	rcode = 0;

	if (argc < 4)
		return CMD_RET_USAGE;

	addr = simple_strtoul(argv[1], NULL, 16);
	length = simple_strtoul(argv[2], NULL, 16);
	ivt_offset = simple_strtoul(argv[3], NULL, 16);

	rcode = authenticate_image(addr, length, ivt_offset);
	if (rcode == 0)
		rcode = CMD_RET_SUCCESS;
	else
		rcode = CMD_RET_FAILURE;

	return rcode;
}

U_BOOT_CMD(
		hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
		"display HAB status",
		""
	  );

U_BOOT_CMD(
		hab_auth_img, 4, 0, do_authenticate_image,
		"authenticate image via HAB",
		"addr length ivt_offset\n"
		"addr - image hex address\n"
		"length - image hex length\n"
		"ivt_offset - hex offset of IVT in the image"
	  );


#endif /* !defined(CONFIG_SPL_BUILD) */

static bool is_hab_enabled(void)
{
	struct imx_sec_config_fuse_t *fuse =
		(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	uint32_t reg;
	int ret;

	ret = fuse_read(fuse->bank, fuse->word, &reg);
	if (ret) {
		puts("\nSecure boot fuse read error\n");
		return ret;
	}

	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
}

int authenticate_image(uint32_t ddr_start, uint32_t image_size,
		       uint32_t ivt_offset)
{
	uint32_t load_addr = 0;
	size_t bytes;
	uint32_t ivt_addr = 0;
	int result = 1;
	ulong start;
	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	hab_rvt_entry_t *hab_rvt_entry;
	hab_rvt_exit_t *hab_rvt_exit;
	struct ivt *ivt;
	struct ivt_header *ivt_hdr;

	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	hab_rvt_entry = hab_rvt_entry_p;
	hab_rvt_exit = hab_rvt_exit_p;

	if (!is_hab_enabled()) {
		puts("hab fuse not enabled\n");
		return result;
	}

	printf("\nAuthenticate image from DDR location 0x%x...\n",
	       ddr_start);

	hab_caam_clock_enable(1);

	if (hab_rvt_entry() != HAB_SUCCESS) {
		puts("hab entry function fail\n");
		goto hab_caam_clock_disable;
	}

	/* Calculate IVT address header */
	ivt_addr = ddr_start + ivt_offset;
	ivt = (struct ivt *)ivt_addr;
	ivt_hdr = &ivt->hdr;

	/* Verify IVT header bugging out on error */
	if (verify_ivt_header(ivt_hdr))
		goto hab_caam_clock_disable;

	/* Verify IVT body */
	if (ivt->self != ivt_addr) {
		printf("ivt->self 0x%08x pointer is 0x%08x\n",
		       ivt->self, ivt_addr);
		goto hab_caam_clock_disable;
	}

	start = ddr_start;
	bytes = image_size;
#ifdef DEBUG
	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
	puts("Dumping IVT\n");
	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);

	puts("Dumping CSF Header\n");
	print_buffer(ivt_addr + IVT_SIZE, (void *)(ivt_addr + IVT_SIZE), 4,
		     0x10, 0);

#if  !defined(CONFIG_SPL_BUILD)
	get_hab_status();
#endif

	puts("\nCalling authenticate_image in ROM\n");
	printf("\tivt_offset = 0x%x\n", ivt_offset);
	printf("\tstart = 0x%08lx\n", start);
	printf("\tbytes = 0x%x\n", bytes);
#endif
	/*
	 * If the MMU is enabled, we have to notify the ROM
	 * code, or it won't flush the caches when needed.
	 * This is done, by setting the "pu_irom_mmu_enabled"
	 * word to 1. You can find its address by looking in
	 * the ROM map. This is critical for
	 * authenticate_image(). If MMU is enabled, without
	 * setting this bit, authentication will fail and may
	 * crash.
	 */
	/* Check MMU enabled */
	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
		if (is_mx6dq()) {
			/*
			 * This won't work on Rev 1.0.0 of
			 * i.MX6Q/D, since their ROM doesn't
			 * do cache flushes. don't think any
			 * exist, so we ignore them.
			 */
			if (!is_mx6dqp())
				writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
		} else if (is_mx6sdl()) {
			writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
		} else if (is_mx6sl()) {
			writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
		}
	}

	load_addr = (uint32_t)hab_rvt_authenticate_image(
			HAB_CID_UBOOT,
			ivt_offset, (void **)&start,
			(size_t *)&bytes, NULL);
	if (hab_rvt_exit() != HAB_SUCCESS) {
		puts("hab exit function fail\n");
		load_addr = 0;
	}

hab_caam_clock_disable:
	hab_caam_clock_enable(0);

#if !defined(CONFIG_SPL_BUILD)
	get_hab_status();
#endif
	if (load_addr != 0)
		result = 0;

	return result;
}
Commit	Line	Data
b83c709e	1	/*
29067abf	2	* Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
b83c709e SB	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
fba6f9ef AA	8	#include <config.h>
fba6f9ef AA	9	#include <fuse.h>
b83c709e	10	#include <asm/io.h>
36c1ca4d	11	#include <asm/system.h>
36c1ca4d	12	#include <asm/arch/clock.h>
f2f07e85	13	#include <asm/arch/sys_proto.h>
552a848e	14	#include <asm/mach-imx/hab.h>
b83c709e SB	15
b83c709e SB	16	/* -------- start of HAB API updates ------------*/
f2f07e85 SB	17
	18	#define hab_rvt_report_event_p \
	19	( \
b5437a80 PF	20	(is_mx6dqp()) ? \
b5437a80 PF	21	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
27cd0da4	22	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	23	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
27cd0da4	24	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	25	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
	26	((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
	27	)
	28
	29	#define hab_rvt_report_status_p \
	30	( \
b5437a80 PF	31	(is_mx6dqp()) ? \
b5437a80 PF	32	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
27cd0da4	33	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	34	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
27cd0da4	35	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	36	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
	37	((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
	38	)
	39
	40	#define hab_rvt_authenticate_image_p \
	41	( \
b5437a80 PF	42	(is_mx6dqp()) ? \
b5437a80 PF	43	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
27cd0da4	44	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	45	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
27cd0da4	46	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	47	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
	48	((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
	49	)
	50
	51	#define hab_rvt_entry_p \
	52	( \
b5437a80 PF	53	(is_mx6dqp()) ? \
b5437a80 PF	54	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
27cd0da4	55	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	56	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
27cd0da4	57	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	58	((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
	59	((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
	60	)
	61
	62	#define hab_rvt_exit_p \
	63	( \
b5437a80 PF	64	(is_mx6dqp()) ? \
b5437a80 PF	65	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
27cd0da4	66	(is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
f2f07e85	67	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
27cd0da4	68	(is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
f2f07e85 SB	69	((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
	70	((hab_rvt_exit_t *)HAB_RVT_EXIT) \
	71	)
b83c709e	72
36c1ca4d	73	#define ALIGN_SIZE 0x1000
36c1ca4d NG	74	#define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
	75	#define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
	76	#define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
ee3899aa	77	#define IS_HAB_ENABLED_BIT \
27117b20 PF	78	(is_soc_type(MXC_SOC_MX7ULP) ? 0x80000000 : \
27117b20 PF	79	(is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2))
36c1ca4d	80
15b505b0 SE	81	static bool is_hab_enabled(void);
15b505b0 SE	82
49b6d058 BD	83	static int ivt_header_error(const char err_str, struct ivt_header ivt_hdr)
	84	{
	85	printf("%s magic=0x%x length=0x%02x version=0x%x\n", err_str,
	86	ivt_hdr->magic, ivt_hdr->length, ivt_hdr->version);
	87
	88	return 1;
	89	}
	90
	91	static int verify_ivt_header(struct ivt_header *ivt_hdr)
	92	{
	93	int result = 0;
	94
	95	if (ivt_hdr->magic != IVT_HEADER_MAGIC)
	96	result = ivt_header_error("bad magic", ivt_hdr);
	97
	98	if (be16_to_cpu(ivt_hdr->length) != IVT_TOTAL_LENGTH)
	99	result = ivt_header_error("bad length", ivt_hdr);
	100
	101	if (ivt_hdr->version != IVT_HEADER_V1 &&
	102	ivt_hdr->version != IVT_HEADER_V2)
	103	result = ivt_header_error("bad version", ivt_hdr);
	104
	105	return result;
	106	}
	107
15b505b0 SE	108	#if !defined(CONFIG_SPL_BUILD)
15b505b0 SE	109
29067abf UC	110	#define MAX_RECORD_BYTES (81024) / 4 kbytes */
	111
	112	struct record {
	113	uint8_t tag; /* Tag */
	114	uint8_t len[2]; /* Length */
	115	uint8_t par; /* Version */
	116	uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
	117	bool any_rec_flag;
	118	};
	119
	120	char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
	121	"RSN = HAB_ENG_FAIL (0x30)\n",
	122	"RSN = HAB_INV_ADDRESS (0x22)\n",
	123	"RSN = HAB_INV_ASSERTION (0x0C)\n",
	124	"RSN = HAB_INV_CALL (0x28)\n",
	125	"RSN = HAB_INV_CERTIFICATE (0x21)\n",
	126	"RSN = HAB_INV_COMMAND (0x06)\n",
	127	"RSN = HAB_INV_CSF (0x11)\n",
	128	"RSN = HAB_INV_DCD (0x27)\n",
	129	"RSN = HAB_INV_INDEX (0x0F)\n",
	130	"RSN = HAB_INV_IVT (0x05)\n",
	131	"RSN = HAB_INV_KEY (0x1D)\n",
	132	"RSN = HAB_INV_RETURN (0x1E)\n",
	133	"RSN = HAB_INV_SIGNATURE (0x18)\n",
	134	"RSN = HAB_INV_SIZE (0x17)\n",
	135	"RSN = HAB_MEM_FAIL (0x2E)\n",
	136	"RSN = HAB_OVR_COUNT (0x2B)\n",
	137	"RSN = HAB_OVR_STORAGE (0x2D)\n",
	138	"RSN = HAB_UNS_ALGORITHM (0x12)\n",
	139	"RSN = HAB_UNS_COMMAND (0x03)\n",
	140	"RSN = HAB_UNS_ENGINE (0x0A)\n",
	141	"RSN = HAB_UNS_ITEM (0x24)\n",
	142	"RSN = HAB_UNS_KEY (0x1B)\n",
	143	"RSN = HAB_UNS_PROTOCOL (0x14)\n",
	144	"RSN = HAB_UNS_STATE (0x09)\n",
	145	"RSN = INVALID\n",
	146	NULL};
	147
	148	char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
	149	"STS = HAB_FAILURE (0x33)\n",
	150	"STS = HAB_WARNING (0x69)\n",
	151	"STS = INVALID\n",
	152	NULL};
	153
	154	char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
	155	"ENG = HAB_ENG_SCC (0x03)\n",
	156	"ENG = HAB_ENG_RTIC (0x05)\n",
	157	"ENG = HAB_ENG_SAHARA (0x06)\n",
	158	"ENG = HAB_ENG_CSU (0x0A)\n",
	159	"ENG = HAB_ENG_SRTC (0x0C)\n",
	160	"ENG = HAB_ENG_DCP (0x1B)\n",
	161	"ENG = HAB_ENG_CAAM (0x1D)\n",
	162	"ENG = HAB_ENG_SNVS (0x1E)\n",
	163	"ENG = HAB_ENG_OCOTP (0x21)\n",
	164	"ENG = HAB_ENG_DTCP (0x22)\n",
	165	"ENG = HAB_ENG_ROM (0x36)\n",
	166	"ENG = HAB_ENG_HDCP (0x24)\n",
	167	"ENG = HAB_ENG_RTL (0x77)\n",
	168	"ENG = HAB_ENG_SW (0xFF)\n",
	169	"ENG = INVALID\n",
	170	NULL};
	171
	172	char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
	173	"CTX = HAB_CTX_FAB (0xFF)\n",
174	"CTX = HAB_CTX_ENTRY (0xE1)\n",
175	"CTX = HAB_CTX_TARGET (0x33)\n",
176	"CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
177	"CTX = HAB_CTX_DCD (0xDD)\n",
178	"CTX = HAB_CTX_CSF (0xCF)\n",
179	"CTX = HAB_CTX_COMMAND (0xC0)\n",
180	"CTX = HAB_CTX_AUT_DAT (0xDB)\n",
181	"CTX = HAB_CTX_ASSERT (0xA0)\n",
182	"CTX = HAB_CTX_EXIT (0xEE)\n",
183	"CTX = INVALID\n",
184	NULL};
185
186	uint8_t hab_statuses[5] = {
187	HAB_STS_ANY,
188	HAB_FAILURE,
189	HAB_WARNING,
190	HAB_SUCCESS,
191	-1
192	};
193
194	uint8_t hab_reasons[26] = {
195	HAB_RSN_ANY,
196	HAB_ENG_FAIL,
197	HAB_INV_ADDRESS,
198	HAB_INV_ASSERTION,
199	HAB_INV_CALL,
200	HAB_INV_CERTIFICATE,
201	HAB_INV_COMMAND,
202	HAB_INV_CSF,
203	HAB_INV_DCD,
204	HAB_INV_INDEX,
205	HAB_INV_IVT,
206	HAB_INV_KEY,
207	HAB_INV_RETURN,
208	HAB_INV_SIGNATURE,
209	HAB_INV_SIZE,
210	HAB_MEM_FAIL,
211	HAB_OVR_COUNT,
212	HAB_OVR_STORAGE,
213	HAB_UNS_ALGORITHM,
214	HAB_UNS_COMMAND,
215	HAB_UNS_ENGINE,
216	HAB_UNS_ITEM,
217	HAB_UNS_KEY,
218	HAB_UNS_PROTOCOL,
219	HAB_UNS_STATE,
220	-1
221	};
222
223	uint8_t hab_contexts[12] = {
224	HAB_CTX_ANY,
225	HAB_CTX_FAB,
226	HAB_CTX_ENTRY,
227	HAB_CTX_TARGET,
228	HAB_CTX_AUTHENTICATE,
229	HAB_CTX_DCD,
230	HAB_CTX_CSF,
231	HAB_CTX_COMMAND,
232	HAB_CTX_AUT_DAT,
233	HAB_CTX_ASSERT,
234	HAB_CTX_EXIT,
235	-1
236	};
237
238	uint8_t hab_engines[16] = {
239	HAB_ENG_ANY,
240	HAB_ENG_SCC,
241	HAB_ENG_RTIC,
242	HAB_ENG_SAHARA,
243	HAB_ENG_CSU,
244	HAB_ENG_SRTC,
245	HAB_ENG_DCP,
246	HAB_ENG_CAAM,
247	HAB_ENG_SNVS,
248	HAB_ENG_OCOTP,
249	HAB_ENG_DTCP,
250	HAB_ENG_ROM,
251	HAB_ENG_HDCP,
252	HAB_ENG_RTL,
253	HAB_ENG_SW,
254	-1
255	};
256
29067abf UC	257	static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
	258	{
	259	uint8_t idx = 0;
	260	uint8_t element = list[idx];
	261	while (element != -1) {
	262	if (element == tgt)
	263	return idx;
	264	element = list[++idx];
	265	}
	266	return -1;
	267	}
	268
	269	void process_event_record(uint8_t *event_data, size_t bytes)
	270	{
	271	struct record rec = (struct record )event_data;
	272
	273	printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
	274	printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
	275	printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
	276	printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
	277	}
	278
b83c709e SB	279	void display_event(uint8_t *event_data, size_t bytes)
	280	{
	281	uint32_t i;
	282
	283	if (!(event_data && bytes > 0))
	284	return;
	285
	286	for (i = 0; i < bytes; i++) {
	287	if (i == 0)
	288	printf("\t0x%02x", event_data[i]);
	289	else if ((i % 8) == 0)
	290	printf("\n\t0x%02x", event_data[i]);
	291	else
	292	printf(" 0x%02x", event_data[i]);
	293	}
29067abf UC	294
29067abf UC	295	process_event_record(event_data, bytes);
b83c709e SB	296	}
	297
	298	int get_hab_status(void)
	299	{
	300	uint32_t index = 0; /* Loop index */
	301	uint8_t event_data[128]; /* Event data buffer */
	302	size_t bytes = sizeof(event_data); /* Event size in bytes */
	303	enum hab_config config = 0;
	304	enum hab_state state = 0;
f2f07e85 SB	305	hab_rvt_report_event_t *hab_rvt_report_event;
	306	hab_rvt_report_status_t *hab_rvt_report_status;
	307
	308	hab_rvt_report_event = hab_rvt_report_event_p;
	309	hab_rvt_report_status = hab_rvt_report_status_p;
b83c709e SB	310
	311	if (is_hab_enabled())
	312	puts("\nSecure boot enabled\n");
	313	else
	314	puts("\nSecure boot disabled\n");
	315
	316	/* Check HAB status */
	317	if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
	318	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	319	config, state);
	320
	321	/* Display HAB Error events */
	322	while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
	323	&bytes) == HAB_SUCCESS) {
	324	puts("\n");
	325	printf("--------- HAB Event %d -----------------\n",
	326	index + 1);
	327	puts("event data:\n");
	328	display_event(event_data, bytes);
	329	puts("\n");
	330	bytes = sizeof(event_data);
	331	index++;
	332	}
	333	}
	334	/* Display message if no HAB events are found */
	335	else {
	336	printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
	337	config, state);
	338	puts("No HAB Events Found!\n\n");
	339	}
	340	return 0;
	341	}
	342
15b505b0 SE	343	int do_hab_status(cmd_tbl_t cmdtp, int flag, int argc, char const argv[])
	344	{
	345	if ((argc != 1)) {
	346	cmd_usage(cmdtp);
	347	return 1;
	348	}
	349
	350	get_hab_status();
	351
	352	return 0;
	353	}
	354
	355	static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
	356	char * const argv[])
	357	{
c5800b25	358	ulong addr, length, ivt_offset;
15b505b0 SE	359	int rcode = 0;
15b505b0 SE	360
c5800b25	361	if (argc < 4)
15b505b0 SE	362	return CMD_RET_USAGE;
	363
	364	addr = simple_strtoul(argv[1], NULL, 16);
c5800b25 BD	365	length = simple_strtoul(argv[2], NULL, 16);
c5800b25 BD	366	ivt_offset = simple_strtoul(argv[3], NULL, 16);
15b505b0	367
c5800b25	368	rcode = authenticate_image(addr, length, ivt_offset);
9535b397 BD	369	if (rcode == 0)
	370	rcode = CMD_RET_SUCCESS;
	371	else
	372	rcode = CMD_RET_FAILURE;
c5800b25	373
15b505b0 SE	374	return rcode;
	375	}
	376
	377	U_BOOT_CMD(
	378	hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
	379	"display HAB status",
	380	""
	381	);
	382
	383	U_BOOT_CMD(
c5800b25	384	hab_auth_img, 4, 0, do_authenticate_image,
15b505b0	385	"authenticate image via HAB",
c5800b25	386	"addr length ivt_offset\n"
15b505b0	387	"addr - image hex address\n"
c5800b25	388	"length - image hex length\n"
15b505b0 SE	389	"ivt_offset - hex offset of IVT in the image"
	390	);
	391
	392
	393	#endif /* !defined(CONFIG_SPL_BUILD) */
	394
	395	static bool is_hab_enabled(void)
	396	{
	397	struct imx_sec_config_fuse_t *fuse =
	398	(struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
	399	uint32_t reg;
	400	int ret;
	401
	402	ret = fuse_read(fuse->bank, fuse->word, &reg);
	403	if (ret) {
	404	puts("\nSecure boot fuse read error\n");
	405	return ret;
	406	}
	407
	408	return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
	409	}
	410
c5800b25 BD	411	int authenticate_image(uint32_t ddr_start, uint32_t image_size,
c5800b25 BD	412	uint32_t ivt_offset)
36c1ca4d NG	413	{
	414	uint32_t load_addr = 0;
	415	size_t bytes;
c5800b25	416	uint32_t ivt_addr = 0;
9535b397	417	int result = 1;
36c1ca4d NG	418	ulong start;
	419	hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
	420	hab_rvt_entry_t *hab_rvt_entry;
	421	hab_rvt_exit_t *hab_rvt_exit;
49b6d058 BD	422	struct ivt *ivt;
49b6d058 BD	423	struct ivt_header *ivt_hdr;
36c1ca4d NG	424
	425	hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
	426	hab_rvt_entry = hab_rvt_entry_p;
	427	hab_rvt_exit = hab_rvt_exit_p;
	428
d2c61800 BD	429	if (!is_hab_enabled()) {
	430	puts("hab fuse not enabled\n");
	431	return result;
	432	}
36c1ca4d	433
d2c61800 BD	434	printf("\nAuthenticate image from DDR location 0x%x...\n",
d2c61800 BD	435	ddr_start);
36c1ca4d	436
d2c61800	437	hab_caam_clock_enable(1);
36c1ca4d	438
53c8a510 BD	439	if (hab_rvt_entry() != HAB_SUCCESS) {
	440	puts("hab entry function fail\n");
	441	goto hab_caam_clock_disable;
	442	}
d2c61800	443
c5800b25 BD	444	/* Calculate IVT address header */
c5800b25 BD	445	ivt_addr = ddr_start + ivt_offset;
49b6d058 BD	446	ivt = (struct ivt *)ivt_addr;
	447	ivt_hdr = &ivt->hdr;
	448
	449	/* Verify IVT header bugging out on error */
	450	if (verify_ivt_header(ivt_hdr))
	451	goto hab_caam_clock_disable;
	452
e59eb9e0 BD	453	/* Verify IVT body */
	454	if (ivt->self != ivt_addr) {
	455	printf("ivt->self 0x%08x pointer is 0x%08x\n",
	456	ivt->self, ivt_addr);
	457	goto hab_caam_clock_disable;
	458	}
	459
53c8a510	460	start = ddr_start;
c5800b25	461	bytes = image_size;
36c1ca4d	462	#ifdef DEBUG
c5800b25	463	printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr);
53c8a510	464	puts("Dumping IVT\n");
c5800b25	465	print_buffer(ivt_addr, (void *)(ivt_addr), 4, 0x8, 0);
53c8a510 BD	466
53c8a510 BD	467	puts("Dumping CSF Header\n");
c5800b25 BD	468	print_buffer(ivt_addr + IVT_SIZE, (void *)(ivt_addr + IVT_SIZE), 4,
c5800b25 BD	469	0x10, 0);
36c1ca4d	470
15b505b0	471	#if !defined(CONFIG_SPL_BUILD)
53c8a510	472	get_hab_status();
15b505b0	473	#endif
36c1ca4d	474
53c8a510 BD	475	puts("\nCalling authenticate_image in ROM\n");
	476	printf("\tivt_offset = 0x%x\n", ivt_offset);
	477	printf("\tstart = 0x%08lx\n", start);
	478	printf("\tbytes = 0x%x\n", bytes);
36c1ca4d	479	#endif
53c8a510 BD	480	/*
	481	* If the MMU is enabled, we have to notify the ROM
	482	* code, or it won't flush the caches when needed.
	483	* This is done, by setting the "pu_irom_mmu_enabled"
	484	* word to 1. You can find its address by looking in
	485	* the ROM map. This is critical for
	486	* authenticate_image(). If MMU is enabled, without
	487	* setting this bit, authentication will fail and may
	488	* crash.
	489	*/
	490	/* Check MMU enabled */
	491	if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
	492	if (is_mx6dq()) {
	493	/*
	494	* This won't work on Rev 1.0.0 of
	495	* i.MX6Q/D, since their ROM doesn't
	496	* do cache flushes. don't think any
	497	* exist, so we ignore them.
	498	*/
	499	if (!is_mx6dqp())
	500	writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
	501	} else if (is_mx6sdl()) {
	502	writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
	503	} else if (is_mx6sl()) {
	504	writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
d2c61800	505	}
53c8a510	506	}
36c1ca4d	507
53c8a510 BD	508	load_addr = (uint32_t)hab_rvt_authenticate_image(
	509	HAB_CID_UBOOT,
	510	ivt_offset, (void **)&start,
	511	(size_t *)&bytes, NULL);
	512	if (hab_rvt_exit() != HAB_SUCCESS) {
	513	puts("hab exit function fail\n");
	514	load_addr = 0;
d2c61800	515	}
36c1ca4d	516
53c8a510	517	hab_caam_clock_disable:
d2c61800	518	hab_caam_clock_enable(0);
36c1ca4d	519
15b505b0	520	#if !defined(CONFIG_SPL_BUILD)
d2c61800	521	get_hab_status();
15b505b0	522	#endif
d2c61800	523	if (load_addr != 0)
9535b397	524	result = 0;
36c1ca4d NG	525
	526	return result;
	527	}