[people/ms/u-boot.git] / arch / arm / mach-imx / sata.c

/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <asm/mach-imx/iomux-v3.h>
#include <asm/arch/iomux.h>
#include <asm/io.h>
#include <asm/arch/clock.h>
#include <asm/arch/sys_proto.h>

int setup_sata(void)
{
	struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR;
	int ret;

	if (!is_mx6dq() && !is_mx6dqp())
		return 1;

	ret = enable_sata_clock();
	if (ret)
		return ret;

	clrsetbits_le32(&iomuxc_regs->gpr[13],
			IOMUXC_GPR13_SATA_MASK,
			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
			|IOMUXC_GPR13_SATA_SPEED_3G
			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
			|IOMUXC_GPR13_SATA_PHY_1_SLOW);

	return 0;
}
Commit	Line	Data
164d9846 GP	1	/*
	2	* Copyright 2011 Freescale Semiconductor, Inc.
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
552a848e	7	#include <asm/mach-imx/iomux-v3.h>
164d9846 GP	8	#include <asm/arch/iomux.h>
164d9846 GP	9	#include <asm/io.h>
f5514e47	10	#include <asm/arch/clock.h>
22452fd8	11	#include <asm/arch/sys_proto.h>
164d9846 GP	12
	13	int setup_sata(void)
	14	{
0a11d6f2	15	struct iomuxc const iomuxc_regs = (struct iomuxc )IOMUXC_BASE_ADDR;
22452fd8	16	int ret;
164d9846	17
aff37561	18	if (!is_mx6dq() && !is_mx6dqp())
22452fd8 TH	19	return 1;
	20
	21	ret = enable_sata_clock();
164d9846 GP	22	if (ret)
	23	return ret;
	24
	25	clrsetbits_le32(&iomuxc_regs->gpr[13],
	26	IOMUXC_GPR13_SATA_MASK,
	27	IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
	28	\|IOMUXC_GPR13_SATA_PHY_7_SATA2M
	29	\|IOMUXC_GPR13_SATA_SPEED_3G
	30	\|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
	31	\|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
	32	\|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
	33	\|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
	34	\|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
	35	\|IOMUXC_GPR13_SATA_PHY_1_SLOW);
	36
	37	return 0;
	38	}