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c67bee14 SB |
1 | /* |
2 | * (C) Copyright 2000-2003 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. | |
6 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) | |
7 | * | |
1a459660 | 8 | * SPDX-License-Identifier: GPL-2.0+ |
c67bee14 SB |
9 | */ |
10 | ||
11 | #include <common.h> | |
12 | #include <asm/arch/imx-regs.h> | |
e4d34492 | 13 | #include <asm/arch/clock.h> |
c67bee14 | 14 | |
29565326 JR |
15 | #ifdef CONFIG_FSL_ESDHC |
16 | DECLARE_GLOBAL_DATA_PTR; | |
17 | #endif | |
18 | ||
c67bee14 SB |
19 | int get_clocks(void) |
20 | { | |
c67bee14 | 21 | #ifdef CONFIG_FSL_ESDHC |
5c23712d | 22 | #ifdef CONFIG_FSL_USDHC |
32384656 | 23 | #if CONFIG_SYS_FSL_ESDHC_ADDR == USDHC2_BASE_ADDR |
e9adeca3 | 24 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); |
32384656 | 25 | #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC3_BASE_ADDR |
e9adeca3 | 26 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); |
32384656 | 27 | #elif CONFIG_SYS_FSL_ESDHC_ADDR == USDHC4_BASE_ADDR |
e9adeca3 | 28 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); |
32384656 | 29 | #else |
e9adeca3 | 30 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); |
32384656 BT |
31 | #endif |
32 | #else | |
33 | #if CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC2_BASE_ADDR | |
e9adeca3 | 34 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); |
32384656 | 35 | #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC3_BASE_ADDR |
e9adeca3 | 36 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); |
32384656 | 37 | #elif CONFIG_SYS_FSL_ESDHC_ADDR == MMC_SDHC4_BASE_ADDR |
e9adeca3 | 38 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); |
5c23712d | 39 | #else |
e9adeca3 | 40 | gd->arch.sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); |
32384656 | 41 | #endif |
5c23712d | 42 | #endif |
c67bee14 SB |
43 | #endif |
44 | return 0; | |
45 | } |