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| Commit | Line | Data |
|---|---|---|
| ee8f0cb3 NI |
1 | /* |
| 2 | * arch/arm/mach-rmobile/include/mach/r8a7795.h | |
| 3 | * This file defines registers and value for r8a7795. | |
| 4 | * | |
| 5 | * Copyright (C) 2015 Renesas Electronics Corporation | |
| 6 | * | |
| 7 | * SPDX-License-Identifier: GPL-2.0+ | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __ASM_ARCH_R8A7795_H | |
| 11 | #define __ASM_ARCH_R8A7795_H | |
| 12 | ||
| 13 | #include "rcar-gen3-base.h" | |
| 14 | ||
| 15 | /* Module stop control/status register bits */ | |
| 16 | #define MSTP0_BITS 0x00640800 | |
| 17 | #define MSTP1_BITS 0xF3EE9390 | |
| 18 | #define MSTP2_BITS 0x340FAFDC | |
| 19 | #define MSTP3_BITS 0xD80C7CDF | |
| 20 | #define MSTP4_BITS 0x80000184 | |
| 21 | #define MSTP5_BITS 0x40BFFF46 | |
| 22 | #define MSTP6_BITS 0xE5FBEECF | |
| 23 | #define MSTP7_BITS 0x39FFFF0E | |
| 24 | #define MSTP8_BITS 0x01F19FF4 | |
| 25 | #define MSTP9_BITS 0xFFDFFFFF | |
| 26 | #define MSTP10_BITS 0xFFFEFFE0 | |
| 27 | #define MSTP11_BITS 0x00000000 | |
| 28 | ||
| 29 | /* SDHI */ | |
| 30 | #define CONFIG_SYS_SH_SDHI0_BASE 0xEE100000 | |
| 31 | #define CONFIG_SYS_SH_SDHI1_BASE 0xEE120000 | |
| 32 | #define CONFIG_SYS_SH_SDHI2_BASE 0xEE140000 /* either MMC0 */ | |
| 33 | #define CONFIG_SYS_SH_SDHI3_BASE 0xEE160000 /* either MMC1 */ | |
| 34 | #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 4 | |
| 35 | ||
| 36 | #endif /* __ASM_ARCH_R8A7795_H */ |