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Commit | Line | Data |
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ee8f0cb3 NI |
1 | /* |
2 | * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7795.c | |
3 | * This file is r8a7795 processor support - PFC hardware block. | |
4 | * | |
0dfc2392 | 5 | * Copyright (C) 2015-2016 Renesas Electronics Corporation |
ee8f0cb3 NI |
6 | * |
7 | * SPDX-License-Identifier: GPL-2.0+ | |
8 | */ | |
9 | ||
10 | #include <common.h> | |
11 | #include <sh_pfc.h> | |
12 | #include <asm/gpio.h> | |
13 | ||
14 | #define CPU_32_PORT(fn, pfx, sfx) \ | |
15 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ | |
16 | PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \ | |
17 | PORT_1(fn, pfx##31, sfx) | |
18 | ||
19 | #define CPU_32_PORT1(fn, pfx, sfx) \ | |
20 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ | |
21 | PORT_10(fn, pfx##2, sfx) | |
22 | ||
23 | #define CPU_32_PORT2(fn, pfx, sfx) \ | |
24 | PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \ | |
25 | PORT_10(fn, pfx##2, sfx) | |
26 | ||
0dfc2392 MV |
27 | #define CPU_32_PORT_29(fn, pfx, sfx) \ |
28 | PORT_10(fn, pfx, sfx), \ | |
29 | PORT_10(fn, pfx##1, sfx), \ | |
30 | PORT_1(fn, pfx##20, sfx), \ | |
31 | PORT_1(fn, pfx##21, sfx), \ | |
32 | PORT_1(fn, pfx##22, sfx), \ | |
33 | PORT_1(fn, pfx##23, sfx), \ | |
34 | PORT_1(fn, pfx##24, sfx), \ | |
35 | PORT_1(fn, pfx##25, sfx), \ | |
36 | PORT_1(fn, pfx##26, sfx), \ | |
37 | PORT_1(fn, pfx##27, sfx), \ | |
38 | PORT_1(fn, pfx##28, sfx) | |
39 | ||
ee8f0cb3 NI |
40 | #define CPU_32_PORT_28(fn, pfx, sfx) \ |
41 | PORT_10(fn, pfx, sfx), \ | |
42 | PORT_10(fn, pfx##1, sfx), \ | |
43 | PORT_1(fn, pfx##20, sfx), \ | |
44 | PORT_1(fn, pfx##21, sfx), \ | |
45 | PORT_1(fn, pfx##22, sfx), \ | |
46 | PORT_1(fn, pfx##23, sfx), \ | |
47 | PORT_1(fn, pfx##24, sfx), \ | |
48 | PORT_1(fn, pfx##25, sfx), \ | |
49 | PORT_1(fn, pfx##26, sfx), \ | |
50 | PORT_1(fn, pfx##27, sfx) | |
51 | ||
52 | #define CPU_32_PORT_26(fn, pfx, sfx) \ | |
53 | PORT_10(fn, pfx, sfx), \ | |
54 | PORT_10(fn, pfx##1, sfx), \ | |
55 | PORT_1(fn, pfx##20, sfx), \ | |
56 | PORT_1(fn, pfx##21, sfx), \ | |
57 | PORT_1(fn, pfx##22, sfx), \ | |
58 | PORT_1(fn, pfx##23, sfx), \ | |
59 | PORT_1(fn, pfx##24, sfx), \ | |
60 | PORT_1(fn, pfx##25, sfx) | |
61 | ||
62 | #define CPU_32_PORT_18(fn, pfx, sfx) \ | |
63 | PORT_10(fn, pfx, sfx), \ | |
64 | PORT_1(fn, pfx##10, sfx), \ | |
65 | PORT_1(fn, pfx##11, sfx), \ | |
66 | PORT_1(fn, pfx##12, sfx), \ | |
67 | PORT_1(fn, pfx##13, sfx), \ | |
68 | PORT_1(fn, pfx##14, sfx), \ | |
69 | PORT_1(fn, pfx##15, sfx), \ | |
70 | PORT_1(fn, pfx##16, sfx), \ | |
71 | PORT_1(fn, pfx##17, sfx) | |
72 | ||
73 | #define CPU_32_PORT_16(fn, pfx, sfx) \ | |
74 | PORT_10(fn, pfx, sfx), \ | |
75 | PORT_1(fn, pfx##10, sfx), \ | |
76 | PORT_1(fn, pfx##11, sfx), \ | |
77 | PORT_1(fn, pfx##12, sfx), \ | |
78 | PORT_1(fn, pfx##13, sfx), \ | |
79 | PORT_1(fn, pfx##14, sfx), \ | |
80 | PORT_1(fn, pfx##15, sfx) | |
81 | ||
82 | #define CPU_32_PORT_15(fn, pfx, sfx) \ | |
83 | PORT_10(fn, pfx, sfx), \ | |
84 | PORT_1(fn, pfx##10, sfx), \ | |
85 | PORT_1(fn, pfx##11, sfx), \ | |
86 | PORT_1(fn, pfx##12, sfx), \ | |
87 | PORT_1(fn, pfx##13, sfx), \ | |
88 | PORT_1(fn, pfx##14, sfx) | |
89 | ||
90 | #define CPU_32_PORT_4(fn, pfx, sfx) \ | |
91 | PORT_1(fn, pfx##0, sfx), \ | |
92 | PORT_1(fn, pfx##1, sfx), \ | |
93 | PORT_1(fn, pfx##2, sfx), \ | |
94 | PORT_1(fn, pfx##3, sfx) | |
95 | ||
96 | ||
97 | /* --gen3-- */ | |
98 | /* GP_0_0_DATA -> GP_7_4_DATA */ | |
99 | /* except for GP0[16] - [31], | |
100 | GP1[28] - [31], | |
101 | GP2[15] - [31], | |
102 | GP3[16] - [31], | |
103 | GP4[18] - [31], | |
104 | GP5[26] - [31], | |
105 | GP7[4] - [31] */ | |
106 | ||
0dfc2392 | 107 | #define ES_CPU_ALL_PORT(fn, pfx, sfx) \ |
ee8f0cb3 NI |
108 | CPU_32_PORT_16(fn, pfx##_0_, sfx), \ |
109 | CPU_32_PORT_28(fn, pfx##_1_, sfx), \ | |
110 | CPU_32_PORT_15(fn, pfx##_2_, sfx), \ | |
111 | CPU_32_PORT_16(fn, pfx##_3_, sfx), \ | |
112 | CPU_32_PORT_18(fn, pfx##_4_, sfx), \ | |
113 | CPU_32_PORT_26(fn, pfx##_5_, sfx), \ | |
114 | CPU_32_PORT(fn, pfx##_6_, sfx), \ | |
115 | CPU_32_PORT_4(fn, pfx##_7_, sfx) | |
116 | ||
0dfc2392 MV |
117 | #define CPU_ALL_PORT(fn, pfx, sfx) \ |
118 | CPU_32_PORT_16(fn, pfx##_0_, sfx), \ | |
119 | CPU_32_PORT_29(fn, pfx##_1_, sfx), \ | |
120 | CPU_32_PORT_15(fn, pfx##_2_, sfx), \ | |
121 | CPU_32_PORT_16(fn, pfx##_3_, sfx), \ | |
122 | CPU_32_PORT_18(fn, pfx##_4_, sfx), \ | |
123 | CPU_32_PORT_26(fn, pfx##_5_, sfx), \ | |
124 | CPU_32_PORT(fn, pfx##_6_, sfx), \ | |
125 | CPU_32_PORT_4(fn, pfx##_7_, sfx) | |
126 | ||
ee8f0cb3 NI |
127 | #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA) |
128 | #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \ | |
129 | GP##pfx##_IN, GP##pfx##_OUT) | |
130 | ||
131 | #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT | |
132 | #define _GP_INDT(pfx, sfx) GP##pfx##_DATA | |
133 | ||
134 | #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str) | |
135 | #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused) | |
136 | #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused) | |
137 | ||
138 | ||
139 | #define PORT_10_REV(fn, pfx, sfx) \ | |
140 | PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \ | |
141 | PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \ | |
142 | PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \ | |
143 | PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \ | |
144 | PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx) | |
145 | ||
146 | #define CPU_32_PORT_REV(fn, pfx, sfx) \ | |
147 | PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \ | |
148 | PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \ | |
149 | PORT_10_REV(fn, pfx, sfx) | |
150 | ||
151 | #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused) | |
152 | #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused) | |
153 | ||
154 | #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn) | |
155 | #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \ | |
156 | FN_##ipsr, FN_##fn) | |
157 | ||
158 | enum { | |
159 | PINMUX_RESERVED = 0, | |
160 | ||
161 | PINMUX_DATA_BEGIN, | |
162 | GP_ALL(DATA), | |
163 | PINMUX_DATA_END, | |
164 | ||
165 | PINMUX_INPUT_BEGIN, | |
166 | GP_ALL(IN), | |
167 | PINMUX_INPUT_END, | |
168 | ||
169 | PINMUX_OUTPUT_BEGIN, | |
170 | GP_ALL(OUT), | |
171 | PINMUX_OUTPUT_END, | |
172 | ||
173 | PINMUX_FUNCTION_BEGIN, | |
174 | GP_ALL(FN), | |
175 | ||
176 | /* GPSR0 */ | |
177 | GFN_D15, | |
178 | GFN_D14, | |
179 | GFN_D13, | |
180 | GFN_D12, | |
181 | GFN_D11, | |
182 | GFN_D10, | |
183 | GFN_D9, | |
184 | GFN_D8, | |
185 | GFN_D7, | |
186 | GFN_D6, | |
187 | GFN_D5, | |
188 | GFN_D4, | |
189 | GFN_D3, | |
190 | GFN_D2, | |
191 | GFN_D1, | |
192 | GFN_D0, | |
193 | ||
194 | /* GPSR1 */ | |
0dfc2392 | 195 | GFN_CLKOUT, |
ee8f0cb3 NI |
196 | GFN_EX_WAIT0_A, |
197 | GFN_WE1x, | |
198 | GFN_WE0x, | |
199 | GFN_RD_WRx, | |
200 | GFN_RDx, | |
201 | GFN_BSx, | |
202 | GFN_CS1x_A26, | |
203 | GFN_CS0x, | |
204 | GFN_A19, | |
205 | GFN_A18, | |
206 | GFN_A17, | |
207 | GFN_A16, | |
208 | GFN_A15, | |
209 | GFN_A14, | |
210 | GFN_A13, | |
211 | GFN_A12, | |
212 | GFN_A11, | |
213 | GFN_A10, | |
214 | GFN_A9, | |
215 | GFN_A8, | |
216 | GFN_A7, | |
217 | GFN_A6, | |
218 | GFN_A5, | |
219 | GFN_A4, | |
220 | GFN_A3, | |
221 | GFN_A2, | |
222 | GFN_A1, | |
223 | GFN_A0, | |
224 | ||
225 | /* GPSR2 */ | |
226 | GFN_AVB_AVTP_CAPTURE_A, | |
227 | GFN_AVB_AVTP_MATCH_A, | |
228 | GFN_AVB_LINK, | |
229 | GFN_AVB_PHY_INT, | |
230 | GFN_AVB_MAGIC, | |
231 | GFN_AVB_MDC, | |
232 | GFN_PWM2_A, | |
233 | GFN_PWM1_A, | |
234 | GFN_PWM0, | |
235 | GFN_IRQ5, | |
236 | GFN_IRQ4, | |
237 | GFN_IRQ3, | |
238 | GFN_IRQ2, | |
239 | GFN_IRQ1, | |
240 | GFN_IRQ0, | |
241 | ||
242 | /* GPSR3 */ | |
243 | GFN_SD1_WP, | |
244 | GFN_SD1_CD, | |
245 | GFN_SD0_WP, | |
246 | GFN_SD0_CD, | |
247 | GFN_SD1_DAT3, | |
248 | GFN_SD1_DAT2, | |
249 | GFN_SD1_DAT1, | |
250 | GFN_SD1_DAT0, | |
251 | GFN_SD1_CMD, | |
252 | GFN_SD1_CLK, | |
253 | GFN_SD0_DAT3, | |
254 | GFN_SD0_DAT2, | |
255 | GFN_SD0_DAT1, | |
256 | GFN_SD0_DAT0, | |
257 | GFN_SD0_CMD, | |
258 | GFN_SD0_CLK, | |
259 | ||
260 | /* GPSR4 */ | |
0dfc2392 | 261 | GFN_SD3_DS, |
ee8f0cb3 NI |
262 | GFN_SD3_DAT7, |
263 | GFN_SD3_DAT6, | |
264 | GFN_SD3_DAT5, | |
265 | GFN_SD3_DAT4, | |
0dfc2392 MV |
266 | GFN_SD3_DAT3, |
267 | GFN_SD3_DAT2, | |
268 | GFN_SD3_DAT1, | |
269 | GFN_SD3_DAT0, | |
270 | GFN_SD3_CMD, | |
271 | GFN_SD3_CLK, | |
ee8f0cb3 NI |
272 | GFN_SD2_DS, |
273 | GFN_SD2_DAT3, | |
274 | GFN_SD2_DAT2, | |
275 | GFN_SD2_DAT1, | |
276 | GFN_SD2_DAT0, | |
0dfc2392 | 277 | GFN_SD2_CMD, |
ee8f0cb3 NI |
278 | GFN_SD2_CLK, |
279 | ||
280 | /* GPSR5 */ | |
281 | GFN_MLB_DAT, | |
282 | GFN_MLB_SIG, | |
283 | GFN_MLB_CLK, | |
284 | FN_MSIOF0_RXD, | |
285 | GFN_MSIOF0_SS2, | |
286 | FN_MSIOF0_TXD, | |
287 | GFN_MSIOF0_SS1, | |
288 | GFN_MSIOF0_SYNC, | |
289 | FN_MSIOF0_SCK, | |
290 | GFN_HRTS0x, | |
291 | GFN_HCTS0x, | |
292 | GFN_HTX0, | |
293 | GFN_HRX0, | |
294 | GFN_HSCK0, | |
295 | GFN_RX2_A, | |
296 | GFN_TX2_A, | |
297 | GFN_SCK2, | |
298 | GFN_RTS1x_TANS, | |
299 | GFN_CTS1x, | |
300 | GFN_TX1_A, | |
301 | GFN_RX1_A, | |
302 | GFN_RTS0x_TANS, | |
303 | GFN_CTS0x, | |
304 | GFN_TX0, | |
305 | GFN_RX0, | |
306 | GFN_SCK0, | |
307 | ||
308 | /* GPSR6 */ | |
0dfc2392 MV |
309 | GFN_USB3_OVC, |
310 | GFN_USB3_PWEN, | |
ee8f0cb3 NI |
311 | GFN_USB30_OVC, |
312 | GFN_USB30_PWEN, | |
313 | GFN_USB1_OVC, | |
314 | GFN_USB1_PWEN, | |
315 | GFN_USB0_OVC, | |
316 | GFN_USB0_PWEN, | |
317 | GFN_AUDIO_CLKB_B, | |
318 | GFN_AUDIO_CLKA_A, | |
319 | GFN_SSI_SDATA9_A, | |
320 | GFN_SSI_SDATA8, | |
321 | GFN_SSI_SDATA7, | |
322 | GFN_SSI_WS78, | |
323 | GFN_SSI_SCK78, | |
324 | GFN_SSI_SDATA6, | |
325 | GFN_SSI_WS6, | |
326 | GFN_SSI_SCK6, | |
327 | FN_SSI_SDATA5, | |
328 | FN_SSI_WS5, | |
329 | FN_SSI_SCK5, | |
330 | GFN_SSI_SDATA4, | |
331 | GFN_SSI_WS4, | |
332 | GFN_SSI_SCK4, | |
333 | GFN_SSI_SDATA3, | |
334 | GFN_SSI_WS34, | |
335 | GFN_SSI_SCK34, | |
336 | GFN_SSI_SDATA2_A, | |
337 | GFN_SSI_SDATA1_A, | |
338 | GFN_SSI_SDATA0, | |
0dfc2392 MV |
339 | GFN_SSI_WS01239, |
340 | GFN_SSI_SCK01239, | |
ee8f0cb3 NI |
341 | |
342 | /* GPSR7 */ | |
343 | FN_HDMI1_CEC, | |
344 | FN_HDMI0_CEC, | |
345 | FN_AVS2, | |
346 | FN_AVS1, | |
347 | ||
348 | /* IPSR0 */ | |
349 | IFN_AVB_MDC, | |
350 | FN_MSIOF2_SS2_C, | |
351 | IFN_AVB_MAGIC, | |
0dfc2392 | 352 | FN_MSIOF2_SS1_C, |
ee8f0cb3 NI |
353 | FN_SCK4_A, |
354 | IFN_AVB_PHY_INT, | |
355 | FN_MSIOF2_SYNC_C, | |
356 | FN_RX4_A, | |
357 | IFN_AVB_LINK, | |
358 | FN_MSIOF2_SCK_C, | |
359 | FN_TX4_A, | |
360 | IFN_AVB_AVTP_MATCH_A, | |
361 | FN_MSIOF2_RXD_C, | |
362 | FN_CTS4x_A, | |
0dfc2392 | 363 | FN_FSCLKST2x_A, |
ee8f0cb3 NI |
364 | IFN_AVB_AVTP_CAPTURE_A, |
365 | FN_MSIOF2_TXD_C, | |
366 | FN_RTS4x_TANS_A, | |
367 | IFN_IRQ0, | |
368 | FN_QPOLB, | |
369 | FN_DU_CDE, | |
370 | FN_VI4_DATA0_B, | |
371 | FN_CAN0_TX_B, | |
372 | FN_CANFD0_TX_B, | |
0dfc2392 | 373 | FN_MSIOF3_SS2_E, |
ee8f0cb3 NI |
374 | IFN_IRQ1, |
375 | FN_QPOLA, | |
376 | FN_DU_DISP, | |
377 | FN_VI4_DATA1_B, | |
378 | FN_CAN0_RX_B, | |
379 | FN_CANFD0_RX_B, | |
0dfc2392 | 380 | FN_MSIOF3_SS1_E, |
ee8f0cb3 NI |
381 | |
382 | /* IPSR1 */ | |
383 | IFN_IRQ2, | |
384 | FN_QCPV_QDE, | |
385 | FN_DU_EXODDF_DU_ODDF_DISP_CDE, | |
386 | FN_VI4_DATA2_B, | |
0dfc2392 | 387 | FN_MSIOF3_SYNC_E, |
ee8f0cb3 NI |
388 | FN_PWM3_B, |
389 | IFN_IRQ3, | |
390 | FN_QSTVB_QVE, | |
ee8f0cb3 NI |
391 | FN_DU_DOTCLKOUT1, |
392 | FN_VI4_DATA3_B, | |
0dfc2392 | 393 | FN_MSIOF3_SCK_E, |
ee8f0cb3 NI |
394 | FN_PWM4_B, |
395 | IFN_IRQ4, | |
396 | FN_QSTH_QHS, | |
ee8f0cb3 NI |
397 | FN_DU_EXHSYNC_DU_HSYNC, |
398 | FN_VI4_DATA4_B, | |
0dfc2392 | 399 | FN_MSIOF3_RXD_E, |
ee8f0cb3 NI |
400 | FN_PWM5_B, |
401 | IFN_IRQ5, | |
402 | FN_QSTB_QHE, | |
ee8f0cb3 NI |
403 | FN_DU_EXVSYNC_DU_VSYNC, |
404 | FN_VI4_DATA5_B, | |
0dfc2392 MV |
405 | FN_FSCLKST2x_B, |
406 | FN_MSIOF3_TXD_E, | |
ee8f0cb3 NI |
407 | FN_PWM6_B, |
408 | IFN_PWM0, | |
409 | FN_AVB_AVTP_PPS, | |
ee8f0cb3 NI |
410 | FN_VI4_DATA6_B, |
411 | FN_IECLK_B, | |
412 | IFN_PWM1_A, | |
ee8f0cb3 NI |
413 | FN_HRX3_D, |
414 | FN_VI4_DATA7_B, | |
415 | FN_IERX_B, | |
416 | IFN_PWM2_A, | |
ee8f0cb3 NI |
417 | FN_HTX3_D, |
418 | FN_IETX_B, | |
419 | IFN_A0, | |
420 | FN_LCDOUT16, | |
421 | FN_MSIOF3_SYNC_B, | |
422 | FN_VI4_DATA8, | |
423 | FN_DU_DB0, | |
424 | FN_PWM3_A, | |
425 | ||
426 | /* IPSR2 */ | |
427 | IFN_A1, | |
428 | FN_LCDOUT17, | |
429 | FN_MSIOF3_TXD_B, | |
430 | FN_VI4_DATA9, | |
431 | FN_DU_DB1, | |
432 | FN_PWM4_A, | |
433 | IFN_A2, | |
434 | FN_LCDOUT18, | |
435 | FN_MSIOF3_SCK_B, | |
436 | FN_VI4_DATA10, | |
437 | FN_DU_DB2, | |
438 | FN_PWM5_A, | |
439 | IFN_A3, | |
440 | FN_LCDOUT19, | |
441 | FN_MSIOF3_RXD_B, | |
442 | FN_VI4_DATA11, | |
443 | FN_DU_DB3, | |
444 | FN_PWM6_A, | |
445 | IFN_A4, | |
446 | FN_LCDOUT20, | |
447 | FN_MSIOF3_SS1_B, | |
448 | FN_VI4_DATA12, | |
449 | FN_VI5_DATA12, | |
450 | FN_DU_DB4, | |
451 | IFN_A5, | |
452 | FN_LCDOUT21, | |
453 | FN_MSIOF3_SS2_B, | |
454 | FN_SCK4_B, | |
455 | FN_VI4_DATA13, | |
456 | FN_VI5_DATA13, | |
457 | FN_DU_DB5, | |
458 | IFN_A6, | |
459 | FN_LCDOUT22, | |
460 | FN_MSIOF2_SS1_A, | |
461 | FN_RX4_B, | |
462 | FN_VI4_DATA14, | |
463 | FN_VI5_DATA14, | |
464 | FN_DU_DB6, | |
465 | IFN_A7, | |
466 | FN_LCDOUT23, | |
467 | FN_MSIOF2_SS2_A, | |
468 | FN_TX4_B, | |
469 | FN_VI4_DATA15, | |
470 | FN_V15_DATA15, | |
471 | FN_DU_DB7, | |
472 | IFN_A8, | |
473 | FN_RX3_B, | |
474 | FN_MSIOF2_SYNC_A, | |
475 | FN_HRX4_B, | |
476 | FN_SDA6_A, | |
477 | FN_AVB_AVTP_MATCH_B, | |
478 | FN_PWM1_B, | |
479 | ||
480 | /* IPSR3 */ | |
481 | IFN_A9, | |
482 | FN_MSIOF2_SCK_A, | |
483 | FN_CTS4x_B, | |
484 | FN_VI5_VSYNCx, | |
485 | IFN_A10, | |
486 | FN_MSIOF2_RXD_A, | |
487 | FN_RTS4n_TANS_B, | |
488 | FN_VI5_HSYNCx, | |
489 | IFN_A11, | |
490 | FN_TX3_B, | |
491 | FN_MSIOF2_TXD_A, | |
492 | FN_HTX4_B, | |
493 | FN_HSCK4, | |
494 | FN_VI5_FIELD, | |
495 | FN_SCL6_A, | |
496 | FN_AVB_AVTP_CAPTURE_B, | |
497 | FN_PWM2_B, | |
ee8f0cb3 NI |
498 | IFN_A12, |
499 | FN_LCDOUT12, | |
500 | FN_MSIOF3_SCK_C, | |
501 | FN_HRX4_A, | |
502 | FN_VI5_DATA8, | |
503 | FN_DU_DG4, | |
504 | IFN_A13, | |
505 | FN_LCDOUT13, | |
506 | FN_MSIOF3_SYNC_C, | |
507 | FN_HTX4_A, | |
508 | FN_VI5_DATA9, | |
509 | FN_DU_DG5, | |
510 | IFN_A14, | |
511 | FN_LCDOUT14, | |
512 | FN_MSIOF3_RXD_C, | |
513 | FN_HCTS4x, | |
514 | FN_VI5_DATA10, | |
515 | FN_DU_DG6, | |
516 | IFN_A15, | |
517 | FN_LCDOUT15, | |
518 | FN_MSIOF3_TXD_C, | |
519 | FN_HRTS4x, | |
520 | FN_VI5_DATA11, | |
521 | FN_DU_DG7, | |
522 | IFN_A16, | |
523 | FN_LCDOUT8, | |
524 | FN_VI4_FIELD, | |
525 | FN_DU_DG0, | |
526 | ||
527 | /* IPSR4 */ | |
528 | IFN_A17, | |
529 | FN_LCDOUT9, | |
530 | FN_VI4_VSYNCx, | |
531 | FN_DU_DG1, | |
532 | IFN_A18, | |
533 | FN_LCDOUT10, | |
534 | FN_VI4_HSYNCx, | |
535 | FN_DU_DG2, | |
536 | IFN_A19, | |
537 | FN_LCDOUT11, | |
538 | FN_VI4_CLKENB, | |
539 | FN_DU_DG3, | |
540 | IFN_CS0x, | |
541 | FN_VI5_CLKENB, | |
542 | IFN_CS1x_A26, | |
543 | FN_VI5_CLK, | |
544 | FN_EX_WAIT0_B, | |
545 | IFN_BSx, | |
546 | FN_QSTVA_QVS, | |
547 | FN_MSIOF3_SCK_D, | |
548 | FN_SCK3, | |
549 | FN_HSCK3, | |
550 | FN_CAN1_TX, | |
551 | FN_CANFD1_TX, | |
552 | FN_IETX_A, | |
553 | IFN_RDx, | |
554 | FN_MSIOF3_SYNC_D, | |
555 | FN_RX3_A, | |
556 | FN_HRX3_A, | |
557 | FN_CAN0_TX_A, | |
558 | FN_CANFD0_TX_A, | |
559 | IFN_RD_WRx, | |
560 | FN_MSIOF3_RXD_D, | |
561 | FN_TX3_A, | |
562 | FN_HTX3_A, | |
563 | FN_CAN0_RX_A, | |
564 | FN_CANFD0_RX_A, | |
565 | ||
566 | /* IPSR5 */ | |
567 | IFN_WE0x, | |
568 | FN_MSIIOF3_TXD_D, | |
569 | FN_CTS3x, | |
570 | FN_HCTS3x, | |
571 | FN_SCL6_B, | |
572 | FN_CAN_CLK, | |
573 | FN_IECLK_A, | |
574 | IFN_WE1x, | |
575 | FN_MSIOF3_SS1_D, | |
576 | FN_RTS3x_TANS, | |
577 | FN_HRTS3x, | |
578 | FN_SDA6_B, | |
579 | FN_CAN1_RX, | |
580 | FN_CANFD1_RX, | |
581 | FN_IERX_A, | |
582 | IFN_EX_WAIT0_A, | |
583 | FN_QCLK, | |
584 | FN_VI4_CLK, | |
585 | FN_DU_DOTCLKOUT0, | |
586 | IFN_D0, | |
587 | FN_MSIOF2_SS1_B, | |
588 | FN_MSIOF3_SCK_A, | |
589 | FN_VI4_DATA16, | |
590 | FN_VI5_DATA0, | |
591 | IFN_D1, | |
592 | FN_MSIOF2_SS2_B, | |
593 | FN_MSIOF3_SYNC_A, | |
594 | FN_VI4_DATA17, | |
595 | FN_VI5_DATA1, | |
596 | IFN_D2, | |
597 | FN_MSIOF3_RXD_A, | |
598 | FN_VI4_DATA18, | |
599 | FN_VI5_DATA2, | |
600 | IFN_D3, | |
601 | FN_MSIOF3_TXD_A, | |
602 | FN_VI4_DATA19, | |
603 | FN_VI5_DATA3, | |
604 | IFN_D4, | |
605 | FN_MSIOF2_SCK_B, | |
606 | FN_VI4_DATA20, | |
607 | FN_VI5_DATA4, | |
608 | ||
609 | /* IPSR6 */ | |
610 | IFN_D5, | |
611 | FN_MSIOF2_SYNC_B, | |
612 | FN_VI4_DATA21, | |
613 | FN_VI5_DATA5, | |
614 | IFN_D6, | |
615 | FN_MSIOF2_RXD_B, | |
616 | FN_VI4_DATA22, | |
617 | FN_VI5_DATA6, | |
618 | IFN_D7, | |
619 | FN_MSIOF2_TXD_B, | |
620 | FN_VI4_DATA23, | |
621 | FN_VI5_DATA7, | |
622 | IFN_D8, | |
623 | FN_LCDOUT0, | |
624 | FN_MSIOF2_SCK_D, | |
625 | FN_SCK4_C, | |
626 | FN_VI4_DATA0_A, | |
627 | FN_DU_DR0, | |
628 | IFN_D9, | |
629 | FN_LCDOUT1, | |
630 | FN_MSIOF2_SYNC_D, | |
631 | FN_VI4_DATA1_A, | |
632 | FN_DU_DR1, | |
633 | IFN_D10, | |
634 | FN_LCDOUT2, | |
635 | FN_MSIOF2_RXD_D, | |
636 | FN_HRX3_B, | |
637 | FN_VI4_DATA2_A, | |
638 | FN_CTS4x_C, | |
639 | FN_DU_DR2, | |
640 | IFN_D11, | |
641 | FN_LCDOUT3, | |
642 | FN_MSIOF2_TXD_D, | |
643 | FN_HTX3_B, | |
644 | FN_VI4_DATA3_A, | |
645 | FN_RTS4x_TANS_C, | |
646 | FN_DU_DR3, | |
647 | IFN_D12, | |
648 | FN_LCDOUT4, | |
649 | FN_MSIOF2_SS1_D, | |
650 | FN_RX4_C, | |
651 | FN_VI4_DATA4_A, | |
652 | FN_DU_DR4, | |
653 | ||
654 | /* IPSR7 */ | |
655 | IFN_D13, | |
656 | FN_LCDOUT5, | |
657 | FN_MSIOF2_SS2_D, | |
658 | FN_TX4_C, | |
659 | FN_VI4_DATA5_A, | |
660 | FN_DU_DR5, | |
661 | IFN_D14, | |
662 | FN_LCDOUT6, | |
663 | FN_MSIOF3_SS1_A, | |
664 | FN_HRX3_C, | |
665 | FN_VI4_DATA6_A, | |
666 | FN_DU_DR6, | |
667 | FN_SCL6_C, | |
668 | IFN_D15, | |
669 | FN_LCDOUT7, | |
670 | FN_MSIOF3_SS2_A, | |
671 | FN_HTX3_C, | |
672 | FN_VI4_DATA7_A, | |
673 | FN_DU_DR7, | |
674 | FN_SDA6_C, | |
675 | FN_FSCLKST, | |
676 | IFN_SD0_CLK, | |
677 | FN_MSIOF1_SCK_E, | |
678 | FN_STP_OPWM_0_B, | |
679 | IFN_SD0_CMD, | |
680 | FN_MSIOF1_SYNC_E, | |
681 | FN_STP_IVCXO27_0_B, | |
682 | IFN_SD0_DAT0, | |
683 | FN_MSIOF1_RXD_E, | |
684 | FN_TS_SCK0_B, | |
685 | FN_STP_ISCLK_0_B, | |
686 | IFN_SD0_DAT1, | |
687 | FN_MSIOF1_TXD_E, | |
688 | FN_TS_SPSYNC0_B, | |
689 | FN_STP_ISSYNC_0_B, | |
690 | ||
691 | /* IPSR8 */ | |
692 | IFN_SD0_DAT2, | |
693 | FN_MSIOF1_SS1_E, | |
694 | FN_TS_SDAT0_B, | |
695 | FN_STP_ISD_0_B, | |
696 | IFN_SD0_DAT3, | |
697 | FN_MSIOF1_SS2_E, | |
698 | FN_TS_SDEN0_B, | |
699 | FN_STP_ISEN_0_B, | |
700 | IFN_SD1_CLK, | |
701 | FN_MSIOF1_SCK_G, | |
702 | FN_SIM0_CLK_A, | |
ee8f0cb3 NI |
703 | IFN_SD1_CMD, |
704 | FN_MSIOF1_SYNC_G, | |
0dfc2392 | 705 | FN_NFCEx_B, |
ee8f0cb3 NI |
706 | FN_SIM0_D_A, |
707 | FN_STP_IVCXO27_1_B, | |
ee8f0cb3 NI |
708 | IFN_SD1_DAT0, |
709 | FN_SD2_DAT4, | |
710 | FN_MSIOF1_RXD_G, | |
0dfc2392 | 711 | FN_NFWPx_B, |
ee8f0cb3 NI |
712 | FN_TS_SCK1_B, |
713 | FN_STP_ISCLK_1_B, | |
ee8f0cb3 NI |
714 | IFN_SD1_DAT1, |
715 | FN_SD2_DAT5, | |
716 | FN_MSIOF1_TXD_G, | |
0dfc2392 | 717 | FN_NFDATA14_B, |
ee8f0cb3 NI |
718 | FN_TS_SPSYNC1_B, |
719 | FN_STP_ISSYNC_1_B, | |
ee8f0cb3 NI |
720 | IFN_SD1_DAT2, |
721 | FN_SD2_DAT6, | |
722 | FN_MSIOF1_SS1_G, | |
0dfc2392 | 723 | FN_NFDATA15_B, |
ee8f0cb3 NI |
724 | FN_TS_SDAT1_B, |
725 | FN_STP_IOD_1_B, | |
726 | IFN_SD1_DAT3, | |
727 | FN_SD2_DAT7, | |
728 | FN_MSIOF1_SS2_G, | |
0dfc2392 | 729 | FN_NFRBx_B, |
ee8f0cb3 NI |
730 | FN_TS_SDEN1_B, |
731 | FN_STP_ISEN_1_B, | |
732 | ||
733 | /* IPSR9 */ | |
734 | IFN_SD2_CLK, | |
0dfc2392 MV |
735 | FN_NFDATA8, |
736 | IFN_SD2_CMD, | |
737 | FN_NFDATA9, | |
ee8f0cb3 | 738 | IFN_SD2_DAT0, |
0dfc2392 | 739 | FN_NFDATA10, |
ee8f0cb3 | 740 | IFN_SD2_DAT1, |
0dfc2392 | 741 | FN_NFDATA11, |
ee8f0cb3 | 742 | IFN_SD2_DAT2, |
0dfc2392 | 743 | FN_NFDATA12, |
ee8f0cb3 | 744 | IFN_SD2_DAT3, |
0dfc2392 | 745 | FN_NFDATA13, |
ee8f0cb3 | 746 | IFN_SD2_DS, |
0dfc2392 | 747 | FN_NFALE, |
ee8f0cb3 | 748 | FN_SATA_DEVSLP_B, |
0dfc2392 MV |
749 | IFN_SD3_CLK, |
750 | FN_NFWEx, | |
751 | ||
752 | /* IPSR10 */ | |
753 | IFN_SD3_CMD, | |
754 | FN_NFREx, | |
755 | IFN_SD3_DAT0, | |
756 | FN_NFDATA0, | |
757 | IFN_SD3_DAT1, | |
758 | FN_NFDATA1, | |
759 | IFN_SD3_DAT2, | |
760 | FN_NFDATA2, | |
761 | IFN_SD3_DAT3, | |
762 | FN_NFDATA3, | |
ee8f0cb3 NI |
763 | IFN_SD3_DAT4, |
764 | FN_SD2_CD_A, | |
0dfc2392 | 765 | FN_NFDATA4, |
ee8f0cb3 NI |
766 | IFN_SD3_DAT5, |
767 | FN_SD2_WP_A, | |
0dfc2392 | 768 | FN_NFDATA5, |
ee8f0cb3 NI |
769 | IFN_SD3_DAT6, |
770 | FN_SD3_CD, | |
0dfc2392 MV |
771 | FN_NFDATA6, |
772 | ||
773 | /* IPSR11 */ | |
ee8f0cb3 NI |
774 | IFN_SD3_DAT7, |
775 | FN_SD3_WP, | |
0dfc2392 MV |
776 | FN_NFDATA7, |
777 | IFN_SD3_DS, | |
778 | FN_NFCLE, | |
ee8f0cb3 | 779 | IFN_SD0_CD, |
0dfc2392 | 780 | FN_NFDATA14_A, |
ee8f0cb3 NI |
781 | FN_SCL2_B, |
782 | FN_SIM0_RST_A, | |
783 | IFN_SD0_WP, | |
0dfc2392 | 784 | FN_NFDATA15_A, |
ee8f0cb3 NI |
785 | FN_SDA2_B, |
786 | IFN_SD1_CD, | |
0dfc2392 | 787 | FN_NFRBx_A, |
ee8f0cb3 NI |
788 | FN_SIM0_CLK_B, |
789 | IFN_SD1_WP, | |
0dfc2392 | 790 | FN_NFCEx_A, |
ee8f0cb3 NI |
791 | FN_SIM0_D_B, |
792 | IFN_SCK0, | |
793 | FN_HSCK1_B, | |
794 | FN_MSIOF1_SS2_B, | |
795 | FN_AUDIO_CLKC_B, | |
796 | FN_SDA2_A, | |
797 | FN_SIM0_RST_B, | |
0dfc2392 | 798 | FN_STP_OPWM_0_C, |
ee8f0cb3 NI |
799 | FN_RIF0_CLK_B, |
800 | FN_ADICHS2, | |
0dfc2392 | 801 | FN_SCK5_B, |
ee8f0cb3 NI |
802 | IFN_RX0, |
803 | FN_HRX1_B, | |
804 | FN_TS_SCK0_C, | |
805 | FN_STP_ISCLK_0_C, | |
806 | FN_RIF0_D0_B, | |
807 | ||
0dfc2392 | 808 | /* IPSR12 */ |
ee8f0cb3 NI |
809 | IFN_TX0, |
810 | FN_HTX1_B, | |
811 | FN_TS_SPSYNC0_C, | |
812 | FN_STP_ISSYNC_0_C, | |
813 | FN_RIF0_D1_B, | |
814 | IFN_CTS0x, | |
815 | FN_HCTS1x_B, | |
816 | FN_MSIOF1_SYNC_B, | |
817 | FN_TS_SPSYNC1_C, | |
818 | FN_STP_ISSYNC_1_C, | |
819 | FN_RIF1_SYNC_B, | |
820 | FN_AUDIO_CLKOUT_C, | |
821 | FN_ADICS_SAMP, | |
822 | IFN_RTS0x_TANS, | |
823 | FN_HRTS1x_B, | |
824 | FN_MSIOF1_SS1_B, | |
825 | FN_AUDIO_CLKA_B, | |
826 | FN_SCL2_A, | |
827 | FN_STP_IVCXO27_1_C, | |
828 | FN_RIF0_SYNC_B, | |
829 | FN_ADICHS1, | |
830 | IFN_RX1_A, | |
831 | FN_HRX1_A, | |
832 | FN_TS_SDAT0_C, | |
0dfc2392 | 833 | FN_STP_ISD_0_C, |
ee8f0cb3 NI |
834 | FN_RIF1_CLK_C, |
835 | IFN_TX1_A, | |
836 | FN_HTX1_A, | |
837 | FN_TS_SDEN0_C, | |
838 | FN_STP_ISEN_0_C, | |
839 | FN_RIF1_D0_C, | |
840 | IFN_CTS1x, | |
841 | FN_HCTS1x_A, | |
842 | FN_MSIOF1_RXD_B, | |
843 | FN_TS_SDEN1_C, | |
844 | FN_STP_ISEN_1_C, | |
845 | FN_RIF1_D0_B, | |
846 | FN_ADIDATA, | |
847 | IFN_RTS1x_TANS, | |
848 | FN_HRTS1x_A, | |
849 | FN_MSIOF1_TXD_B, | |
850 | FN_TS_SDAT1_C, | |
851 | FN_STP_ISD_1_C, | |
852 | FN_RIF1_D1_B, | |
853 | FN_ADICHS0, | |
854 | IFN_SCK2, | |
855 | FN_SCIF_CLK_B, | |
856 | FN_MSIOF1_SCK_B, | |
857 | FN_TS_SCK1_C, | |
858 | FN_STP_ISCLK_1_C, | |
859 | FN_RIF1_CLK_B, | |
860 | FN_ADICLK, | |
861 | ||
0dfc2392 | 862 | /* IPSR13 */ |
ee8f0cb3 NI |
863 | IFN_TX2_A, |
864 | FN_SD2_CD_B, | |
865 | FN_SCL1_A, | |
ee8f0cb3 NI |
866 | FN_FMCLK_A, |
867 | FN_RIF1_D1_C, | |
0dfc2392 | 868 | FN_FSO_CFE_0x, |
ee8f0cb3 NI |
869 | IFN_RX2_A, |
870 | FN_SD2_WP_B, | |
871 | FN_SDA1_A, | |
0dfc2392 | 872 | FN_FMIN_A, |
ee8f0cb3 | 873 | FN_RIF1_SYNC_C, |
0dfc2392 | 874 | FN_FSO_CFE_1x, |
ee8f0cb3 NI |
875 | IFN_HSCK0, |
876 | FN_MSIOF1_SCK_D, | |
877 | FN_AUDIO_CLKB_A, | |
878 | FN_SSI_SDATA1_B, | |
879 | FN_TS_SCK0_D, | |
880 | FN_STP_ISCLK_0_D, | |
881 | FN_RIF0_CLK_C, | |
0dfc2392 | 882 | FN_RX5_B, |
ee8f0cb3 NI |
883 | IFN_HRX0, |
884 | FN_MSIOF1_RXD_D, | |
0dfc2392 | 885 | FN_SSI_SDATA2_B, |
ee8f0cb3 NI |
886 | FN_TS_SDEN0_D, |
887 | FN_STP_ISEN_0_D, | |
888 | FN_RIF0_D0_C, | |
ee8f0cb3 NI |
889 | IFN_HTX0, |
890 | FN_MSIOF1_TXD_D, | |
891 | FN_SSI_SDATA9_B, | |
892 | FN_TS_SDAT0_D, | |
893 | FN_STP_ISD_0_D, | |
894 | FN_RIF0_D1_C, | |
ee8f0cb3 NI |
895 | IFN_HCTS0x, |
896 | FN_RX2_B, | |
897 | FN_MSIOF1_SYNC_D, | |
898 | FN_SSI_SCK9_A, | |
899 | FN_TS_SPSYNC0_D, | |
900 | FN_STP_ISSYNC_0_D, | |
901 | FN_RIF0_SYNC_C, | |
902 | FN_AUDIO_CLKOUT1_A, | |
ee8f0cb3 NI |
903 | IFN_HRTS0x, |
904 | FN_TX2_B, | |
905 | FN_MSIOF1_SS1_D, | |
906 | FN_SSI_WS9_A, | |
907 | FN_STP_IVCXO27_0_D, | |
908 | FN_BPFCLK_A, | |
909 | FN_AUDIO_CLKOUT2_A, | |
910 | IFN_MSIOF0_SYNC, | |
911 | FN_AUDIO_CLKOUT_A, | |
0dfc2392 MV |
912 | FN_TX5_B, |
913 | FN_BPFCLK_D, | |
ee8f0cb3 | 914 | |
0dfc2392 | 915 | /* IPSR14 */ |
ee8f0cb3 | 916 | IFN_MSIOF0_SS1, |
0dfc2392 MV |
917 | FN_RX5_A, |
918 | FN_NFWPx_A, | |
ee8f0cb3 NI |
919 | FN_AUDIO_CLKA_C, |
920 | FN_SSI_SCK2_A, | |
ee8f0cb3 NI |
921 | FN_STP_IVCXO27_0_C, |
922 | FN_AUDIO_CLKOUT3_A, | |
923 | FN_TCLK1_B, | |
924 | IFN_MSIOF0_SS2, | |
0dfc2392 | 925 | FN_TX5_A, |
ee8f0cb3 NI |
926 | FN_MSIOF1_SS2_D, |
927 | FN_AUDIO_CLKC_A, | |
928 | FN_SSI_WS2_A, | |
ee8f0cb3 NI |
929 | FN_STP_OPWM_0_D, |
930 | FN_AUDIO_CLKOUT_D, | |
931 | FN_SPEEDIN_B, | |
932 | IFN_MLB_CLK, | |
933 | FN_MSIOF1_SCK_F, | |
934 | FN_SCL1_B, | |
935 | IFN_MLB_SIG, | |
936 | FN_RX1_B, | |
937 | FN_MSIOF1_SYNC_F, | |
938 | FN_SDA1_B, | |
939 | IFN_MLB_DAT, | |
940 | FN_TX1_B, | |
941 | FN_MSIOF1_RXD_F, | |
0dfc2392 | 942 | IFN_SSI_SCK01239, |
ee8f0cb3 NI |
943 | FN_MSIOF1_TXD_F, |
944 | FN_MOUT0, | |
0dfc2392 | 945 | IFN_SSI_WS01239, |
ee8f0cb3 NI |
946 | FN_MSIOF1_SS1_F, |
947 | FN_MOUT1, | |
948 | IFN_SSI_SDATA0, | |
949 | FN_MSIOF1_SS2_F, | |
950 | FN_MOUT2, | |
951 | ||
0dfc2392 | 952 | /* IPSR15 */ |
ee8f0cb3 NI |
953 | IFN_SSI_SDATA1_A, |
954 | FN_MOUT5, | |
955 | IFN_SSI_SDATA2_A, | |
956 | FN_SSI_SCK1_B, | |
957 | FN_MOUT6, | |
958 | IFN_SSI_SCK34, | |
959 | FN_MSIOF1_SS1_A, | |
960 | FN_STP_OPWM_0_A, | |
961 | IFN_SSI_WS34, | |
962 | FN_HCTS2x_A, | |
963 | FN_MSIOF1_SS2_A, | |
964 | FN_STP_IVCXO27_0_A, | |
965 | IFN_SSI_SDATA3, | |
966 | FN_HRTS2x_A, | |
967 | FN_MSIOF1_TXD_A, | |
968 | FN_TS_SCK0_A, | |
969 | FN_STP_ISCLK_0_A, | |
970 | FN_RIF0_D1_A, | |
971 | FN_RIF2_D0_A, | |
972 | IFN_SSI_SCK4, | |
973 | FN_HRX2_A, | |
974 | FN_MSIOF1_SCK_A, | |
975 | FN_TS_SDAT0_A, | |
976 | FN_STP_ISD_0_A, | |
977 | FN_RIF0_CLK_A, | |
978 | FN_RIF2_CLK_A, | |
979 | IFN_SSI_WS4, | |
980 | FN_HTX2_A, | |
981 | FN_MSIOF1_SYNC_A, | |
982 | FN_TS_SDEN0_A, | |
983 | FN_STP_ISEN_0_A, | |
984 | FN_RIF0_SYNC_A, | |
985 | FN_RIF2_SYNC_A, | |
986 | IFN_SSI_SDATA4, | |
987 | FN_HSCK2_A, | |
988 | FN_MSIOF1_RXD_A, | |
989 | FN_TS_SPSYNC0_A, | |
990 | FN_STP_ISSYNC_0_A, | |
991 | FN_RIF0_D0_A, | |
992 | FN_RIF2_D1_A, | |
993 | ||
0dfc2392 | 994 | /* IPSR16 */ |
ee8f0cb3 | 995 | IFN_SSI_SCK6, |
ee8f0cb3 | 996 | FN_SIM0_RST_D, |
ee8f0cb3 | 997 | IFN_SSI_WS6, |
ee8f0cb3 NI |
998 | FN_SIM0_D_D, |
999 | IFN_SSI_SDATA6, | |
1000 | FN_SIM0_CLK_D, | |
ee8f0cb3 NI |
1001 | FN_SATA_DEVSLP_A, |
1002 | IFN_SSI_SCK78, | |
1003 | FN_HRX2_B, | |
1004 | FN_MSIOF1_SCK_C, | |
1005 | FN_TS_SCK1_A, | |
1006 | FN_STP_ISCLK_1_A, | |
1007 | FN_RIF1_CLK_A, | |
1008 | FN_RIF3_CLK_A, | |
1009 | IFN_SSI_WS78, | |
1010 | FN_HTX2_B, | |
1011 | FN_MSIOF1_SYNC_C, | |
0dfc2392 | 1012 | FN_TS_SDAT1_A, |
ee8f0cb3 NI |
1013 | FN_STP_ISD_1_A, |
1014 | FN_RIF1_SYNC_A, | |
1015 | FN_RIF3_SYNC_A, | |
1016 | IFN_SSI_SDATA7, | |
1017 | FN_HCTS2x_B, | |
1018 | FN_MSIOF1_RXD_C, | |
1019 | FN_TS_SDEN1_A, | |
0dfc2392 | 1020 | FN_STP_ISEN_1_A, |
ee8f0cb3 NI |
1021 | FN_RIF1_D0_A, |
1022 | FN_RIF3_D0_A, | |
1023 | FN_TCLK2_A, | |
1024 | IFN_SSI_SDATA8, | |
1025 | FN_HRTS2x_B, | |
1026 | FN_MSIOF1_TXD_C, | |
1027 | FN_TS_SPSYNC1_A, | |
1028 | FN_STP_ISSYNC_1_A, | |
1029 | FN_RIF1_D1_A, | |
0dfc2392 | 1030 | FN_RIF3_D1_A, |
ee8f0cb3 NI |
1031 | IFN_SSI_SDATA9_A, |
1032 | FN_HSCK2_B, | |
1033 | FN_MSIOF1_SS1_C, | |
1034 | FN_HSCK1_A, | |
1035 | FN_SSI_WS1_B, | |
1036 | FN_SCK1, | |
1037 | FN_STP_IVCXO27_1_A, | |
0dfc2392 | 1038 | FN_SCK5_A, |
ee8f0cb3 | 1039 | |
0dfc2392 | 1040 | /* IPSR17 */ |
ee8f0cb3 NI |
1041 | IFN_AUDIO_CLKA_A, |
1042 | FN_CC5_OSCOUT, | |
1043 | IFN_AUDIO_CLKB_B, | |
1044 | FN_SCIF_CLK_A, | |
ee8f0cb3 NI |
1045 | FN_STP_IVCXO27_1_D, |
1046 | FN_REMOCON_A, | |
1047 | FN_TCLK1_A, | |
ee8f0cb3 NI |
1048 | IFN_USB0_PWEN, |
1049 | FN_SIM0_RST_C, | |
1050 | FN_TS_SCK1_D, | |
1051 | FN_STP_ISCLK_1_D, | |
1052 | FN_BPFCLK_B, | |
1053 | FN_RIF3_CLK_B, | |
0dfc2392 | 1054 | FN_HSCK2_C, |
ee8f0cb3 NI |
1055 | IFN_USB0_OVC, |
1056 | FN_SIM0_D_C, | |
1057 | FN_TS_SDAT1_D, | |
1058 | FN_STP_ISD_1_D, | |
1059 | FN_RIF3_SYNC_B, | |
0dfc2392 | 1060 | FN_HRX2_C, |
ee8f0cb3 NI |
1061 | IFN_USB1_PWEN, |
1062 | FN_SIM0_CLK_C, | |
1063 | FN_SSI_SCK1_A, | |
1064 | FN_TS_SCK0_E, | |
1065 | FN_STP_ISCLK_0_E, | |
1066 | FN_FMCLK_B, | |
1067 | FN_RIF2_CLK_B, | |
ee8f0cb3 | 1068 | FN_SPEEDIN_A, |
0dfc2392 | 1069 | FN_HTX2_C, |
ee8f0cb3 NI |
1070 | IFN_USB1_OVC, |
1071 | FN_MSIOF1_SS2_C, | |
1072 | FN_SSI_WS1_A, | |
1073 | FN_TS_SDAT0_E, | |
1074 | FN_STP_ISD_0_E, | |
1075 | FN_FMIN_B, | |
1076 | FN_RIF2_SYNC_B, | |
ee8f0cb3 | 1077 | FN_REMOCON_B, |
0dfc2392 | 1078 | FN_HCTS2x_C, |
ee8f0cb3 NI |
1079 | IFN_USB30_PWEN, |
1080 | FN_AUDIO_CLKOUT_B, | |
1081 | FN_SSI_SCK2_B, | |
1082 | FN_TS_SDEN1_D, | |
1083 | FN_STP_ISEN_1_D, | |
1084 | FN_STP_OPWM_0_E, | |
1085 | FN_RIF3_D0_B, | |
ee8f0cb3 NI |
1086 | FN_TCLK2_B, |
1087 | FN_TPU0TO0, | |
0dfc2392 MV |
1088 | FN_BPFCLK_C, |
1089 | FN_HRTS2x_C, | |
ee8f0cb3 NI |
1090 | IFN_USB30_OVC, |
1091 | FN_AUDIO_CLKOUT1_B, | |
1092 | FN_SSI_WS2_B, | |
1093 | FN_TS_SPSYNC1_D, | |
1094 | FN_STP_ISSYNC_1_D, | |
1095 | FN_STP_IVCXO27_0_E, | |
1096 | FN_RIF3_D1_B, | |
0dfc2392 | 1097 | FN_FSO_TOEx, |
ee8f0cb3 NI |
1098 | FN_TPU0TO1, |
1099 | ||
0dfc2392 MV |
1100 | /* IPSR18 */ |
1101 | IFN_USB3_PWEN, | |
ee8f0cb3 | 1102 | FN_AUDIO_CLKOUT2_B, |
0dfc2392 | 1103 | FN_SSI_SCK9_B, |
ee8f0cb3 NI |
1104 | FN_TS_SDEN0_E, |
1105 | FN_STP_ISEN_0_E, | |
1106 | FN_RIF2_D0_B, | |
1107 | FN_TPU0TO2, | |
0dfc2392 MV |
1108 | FN_FMCLK_C, |
1109 | FN_FMCLK_D, | |
1110 | IFN_USB3_OVC, | |
ee8f0cb3 NI |
1111 | FN_AUDIO_CLKOUT3_B, |
1112 | FN_SSI_WS9_B, | |
1113 | FN_TS_SPSYNC0_E, | |
1114 | FN_STP_ISSYNC_0_E, | |
1115 | FN_RIF2_D1_B, | |
1116 | FN_TPU0TO3, | |
0dfc2392 MV |
1117 | FN_FMIN_C, |
1118 | FN_FMIN_D, | |
ee8f0cb3 NI |
1119 | |
1120 | /* MOD_SEL0 */ | |
0dfc2392 | 1121 | /* sel_msiof3[3](0,1,2,3,4) */ |
ee8f0cb3 NI |
1122 | FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1, |
1123 | FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3, | |
0dfc2392 MV |
1124 | FN_SEL_MSIOF3_4, |
1125 | /* sel_msiof2[2](0,1,2,3) */ | |
ee8f0cb3 NI |
1126 | FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1, |
1127 | FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3, | |
0dfc2392 | 1128 | /* sel_msiof1[3](0,1,2,3,4,5,6) */ |
ee8f0cb3 NI |
1129 | FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1, |
1130 | FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3, | |
1131 | FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5, | |
1132 | FN_SEL_MSIOF1_6, | |
0dfc2392 | 1133 | /* sel_lbsc[1](0,1) */ |
ee8f0cb3 | 1134 | FN_SEL_LBSC_0, FN_SEL_LBSC_1, |
0dfc2392 | 1135 | /* sel_iebus[1](0,1) */ |
ee8f0cb3 | 1136 | FN_SEL_IEBUS_0, FN_SEL_IEBUS_1, |
0dfc2392 | 1137 | /* sel_i2c2[1](0,1) */ |
ee8f0cb3 | 1138 | FN_SEL_I2C2_0, FN_SEL_I2C2_1, |
0dfc2392 | 1139 | /* sel_i2c1[1](0,1) */ |
ee8f0cb3 | 1140 | FN_SEL_I2C1_0, FN_SEL_I2C1_1, |
0dfc2392 | 1141 | /* sel_hscif4[1](0,1) */ |
ee8f0cb3 | 1142 | FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1, |
0dfc2392 | 1143 | /* sel_hscif3[2](0,1,2,3) */ |
ee8f0cb3 NI |
1144 | FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1, |
1145 | FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3, | |
0dfc2392 | 1146 | /* sel_hscif1[1](0,1) */ |
ee8f0cb3 | 1147 | FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, |
0dfc2392 MV |
1148 | /* reserved[1] */ |
1149 | /* sel_hscif2[2](0,1,2) */ | |
1150 | FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, | |
1151 | FN_SEL_HSCIF2_2, | |
1152 | /* sel_etheravb[1](0,1) */ | |
ee8f0cb3 | 1153 | FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1, |
0dfc2392 | 1154 | /* sel_drif3[1](0,1) */ |
ee8f0cb3 | 1155 | FN_SEL_DRIF3_0, FN_SEL_DRIF3_1, |
0dfc2392 | 1156 | /* sel_drif2[1](0,1) */ |
ee8f0cb3 | 1157 | FN_SEL_DRIF2_0, FN_SEL_DRIF2_1, |
0dfc2392 | 1158 | /* sel_drif1[2](0,1,2) */ |
ee8f0cb3 NI |
1159 | FN_SEL_DRIF1_0, FN_SEL_DRIF1_1, |
1160 | FN_SEL_DRIF1_2, | |
0dfc2392 | 1161 | /* sel_drif0[2](0,1,2) */ |
ee8f0cb3 NI |
1162 | FN_SEL_DRIF0_0, FN_SEL_DRIF0_1, |
1163 | FN_SEL_DRIF0_2, | |
0dfc2392 | 1164 | /* sel_canfd0[1](0,1) */ |
ee8f0cb3 | 1165 | FN_SEL_CANFD_0, FN_SEL_CANFD_1, |
0dfc2392 MV |
1166 | /* sel_adg_a[2](0,1,2) */ |
1167 | FN_SEL_ADG_A_0, FN_SEL_ADG_A_1, | |
1168 | FN_SEL_ADG_A_2, | |
1169 | /* reserved[3]*/ | |
ee8f0cb3 NI |
1170 | |
1171 | /* MOD_SEL1 */ | |
0dfc2392 MV |
1172 | /* sel_tsif1[2](0,1,2,3) */ |
1173 | FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, | |
1174 | FN_SEL_TSIF1_2, FN_SEL_TSIF1_3, | |
1175 | /* sel_tsif0[3](0,1,2,3,4) */ | |
1176 | FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, | |
1177 | FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, | |
ee8f0cb3 | 1178 | FN_SEL_TSIF0_4, |
0dfc2392 MV |
1179 | /* sel_timer_tmu1[1](0,1) */ |
1180 | FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1, | |
1181 | /* sel_ssp1_1[2](0,1,2,3) */ | |
1182 | FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1, | |
1183 | FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3, | |
1184 | /* sel_ssp1_0[3](0,1,2,3,4) */ | |
1185 | FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1, | |
1186 | FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3, | |
ee8f0cb3 | 1187 | FN_SEL_SSP1_0_4, |
0dfc2392 MV |
1188 | /* sel_ssi1[1](0,1) */ |
1189 | FN_SEL_SSI_0, FN_SEL_SSI_1, | |
1190 | /* sel_speed_pulse_if[1](0,1) */ | |
1191 | FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1, | |
1192 | /* sel_simcard[2](0,1,2,3) */ | |
1193 | FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1, | |
1194 | FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3, | |
1195 | /* sel_sdhi2[1](0,1) */ | |
1196 | FN_SEL_SDHI2_0, FN_SEL_SDHI2_1, | |
1197 | /* sel_scif4[2](0,1,2) */ | |
1198 | FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, | |
ee8f0cb3 | 1199 | FN_SEL_SCIF4_2, |
0dfc2392 MV |
1200 | /* sel_scif3[1](0,1) */ |
1201 | FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, | |
1202 | /* sel_scif2[1](0,1) */ | |
1203 | FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, | |
1204 | /* sel_scif1[1](0,1) */ | |
1205 | FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, | |
1206 | /* sel_scif[1](0,1) */ | |
1207 | FN_SEL_SCIF_0, FN_SEL_SCIF_1, | |
1208 | /* sel_remocon[1](0,1) */ | |
1209 | FN_SEL_REMOCON_0, FN_SEL_REMOCON_1, | |
1210 | /* reserved[8..7] */ | |
1211 | /* sel_rcan0[1](0,1) */ | |
1212 | FN_SEL_RCAN_0, FN_SEL_RCAN_1, | |
1213 | /* sel_pwm6[1](0,1) */ | |
1214 | FN_SEL_PWM6_0, FN_SEL_PWM6_1, | |
1215 | /* sel_pwm5[1](0,1) */ | |
1216 | FN_SEL_PWM5_0, FN_SEL_PWM5_1, | |
1217 | /* sel_pwm4[1](0,1) */ | |
1218 | FN_SEL_PWM4_0, FN_SEL_PWM4_1, | |
1219 | /* sel_pwm3[1](0,1) */ | |
1220 | FN_SEL_PWM3_0, FN_SEL_PWM3_1, | |
1221 | /* sel_pwm2[1](0,1) */ | |
1222 | FN_SEL_PWM2_0, FN_SEL_PWM2_1, | |
1223 | /* sel_pwm1[1](0,1) */ | |
1224 | FN_SEL_PWM1_0, FN_SEL_PWM1_1, | |
ee8f0cb3 NI |
1225 | |
1226 | /* MOD_SEL2 */ | |
0dfc2392 MV |
1227 | /* i2c_sel_5[1](0,1) */ |
1228 | FN_I2C_SEL_5_0, FN_I2C_SEL_5_1, | |
1229 | /* i2c_sel_3[1](0,1) */ | |
1230 | FN_I2C_SEL_3_0, FN_I2C_SEL_3_1, | |
1231 | /* i2c_sel_0[1](0,1) */ | |
1232 | FN_I2C_SEL_0_0, FN_I2C_SEL_0_1, | |
1233 | /* sel_fm[2](0,1,2,3) */ | |
1234 | FN_SEL_FM_0, FN_SEL_FM_1, | |
1235 | FN_SEL_FM_2, FN_SEL_FM_3, | |
1236 | /* sel_scif5[1](0,1) */ | |
1237 | FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, | |
1238 | /* sel_i2c6[3](0,1,2) */ | |
1239 | FN_SEL_I2C6_0, FN_SEL_I2C6_1, | |
1240 | FN_SEL_I2C6_2, | |
1241 | /* sel_ndfc[1](0,1) */ | |
1242 | FN_SEL_NDFC_0, FN_SEL_NDFC_1, | |
1243 | /* sel_ssi2[1](0,1) */ | |
1244 | FN_SEL_SSI2_0, FN_SEL_SSI2_1, | |
1245 | /* sel_ssi9[1](0,1) */ | |
1246 | FN_SEL_SSI9_0, FN_SEL_SSI9_1, | |
1247 | /* sel_timer_tmu2[1](0,1) */ | |
1248 | FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1, | |
1249 | /* sel_adg_b[1](0,1) */ | |
1250 | FN_SEL_ADG_B_0, FN_SEL_ADG_B_1, | |
1251 | /* sel_adg_c[1](0,1) */ | |
1252 | FN_SEL_ADG_C_0, FN_SEL_ADG_C_1, | |
1253 | /* reserved[16..16] */ | |
1254 | /* reserved[15..8] */ | |
1255 | /* reserved[7..1] */ | |
1256 | /* sel_vin4[1](0,1) */ | |
1257 | FN_SEL_VIN4_0, FN_SEL_VIN4_1, | |
ee8f0cb3 NI |
1258 | |
1259 | PINMUX_FUNCTION_END, | |
1260 | ||
1261 | PINMUX_MARK_BEGIN, | |
1262 | ||
1263 | /* GPSR0 */ | |
1264 | D15_GMARK, | |
1265 | D14_GMARK, | |
1266 | D13_GMARK, | |
1267 | D12_GMARK, | |
1268 | D11_GMARK, | |
1269 | D10_GMARK, | |
1270 | D9_GMARK, | |
1271 | D8_GMARK, | |
1272 | D7_GMARK, | |
1273 | D6_GMARK, | |
1274 | D5_GMARK, | |
1275 | D4_GMARK, | |
1276 | D3_GMARK, | |
1277 | D2_GMARK, | |
1278 | D1_GMARK, | |
1279 | D0_GMARK, | |
1280 | ||
1281 | /* GPSR1 */ | |
0dfc2392 | 1282 | CLKOUT_GMARK, |
ee8f0cb3 NI |
1283 | EX_WAIT0_A_GMARK, |
1284 | WE1x_GMARK, | |
1285 | WE0x_GMARK, | |
1286 | RD_WRx_GMARK, | |
1287 | RDx_GMARK, | |
1288 | BSx_GMARK, | |
1289 | CS1x_A26_GMARK, | |
1290 | CS0x_GMARK, | |
1291 | A19_GMARK, | |
1292 | A18_GMARK, | |
1293 | A17_GMARK, | |
1294 | A16_GMARK, | |
1295 | A15_GMARK, | |
1296 | A14_GMARK, | |
1297 | A13_GMARK, | |
1298 | A12_GMARK, | |
1299 | A11_GMARK, | |
1300 | A10_GMARK, | |
1301 | A9_GMARK, | |
1302 | A8_GMARK, | |
1303 | A7_GMARK, | |
1304 | A6_GMARK, | |
1305 | A5_GMARK, | |
1306 | A4_GMARK, | |
1307 | A3_GMARK, | |
1308 | A2_GMARK, | |
1309 | A1_GMARK, | |
1310 | A0_GMARK, | |
1311 | ||
1312 | /* GPSR2 */ | |
1313 | AVB_AVTP_CAPTURE_A_GMARK, | |
1314 | AVB_AVTP_MATCH_A_GMARK, | |
1315 | AVB_LINK_GMARK, | |
1316 | AVB_PHY_INT_GMARK, | |
1317 | AVB_MAGIC_GMARK, | |
1318 | AVB_MDC_GMARK, | |
1319 | PWM2_A_GMARK, | |
1320 | PWM1_A_GMARK, | |
1321 | PWM0_GMARK, | |
1322 | IRQ5_GMARK, | |
1323 | IRQ4_GMARK, | |
1324 | IRQ3_GMARK, | |
1325 | IRQ2_GMARK, | |
1326 | IRQ1_GMARK, | |
1327 | IRQ0_GMARK, | |
1328 | ||
1329 | /* GPSR3 */ | |
1330 | SD1_WP_GMARK, | |
1331 | SD1_CD_GMARK, | |
1332 | SD0_WP_GMARK, | |
1333 | SD0_CD_GMARK, | |
1334 | SD1_DAT3_GMARK, | |
1335 | SD1_DAT2_GMARK, | |
1336 | SD1_DAT1_GMARK, | |
1337 | SD1_DAT0_GMARK, | |
1338 | SD1_CMD_GMARK, | |
1339 | SD1_CLK_GMARK, | |
1340 | SD0_DAT3_GMARK, | |
1341 | SD0_DAT2_GMARK, | |
1342 | SD0_DAT1_GMARK, | |
1343 | SD0_DAT0_GMARK, | |
1344 | SD0_CMD_GMARK, | |
1345 | SD0_CLK_GMARK, | |
1346 | ||
1347 | /* GPSR4 */ | |
0dfc2392 | 1348 | SD3_DS_GMARK, |
ee8f0cb3 NI |
1349 | SD3_DAT7_GMARK, |
1350 | SD3_DAT6_GMARK, | |
1351 | SD3_DAT5_GMARK, | |
1352 | SD3_DAT4_GMARK, | |
0dfc2392 MV |
1353 | SD3_DAT3_GMARK, |
1354 | SD3_DAT2_GMARK, | |
1355 | SD3_DAT1_GMARK, | |
1356 | SD3_DAT0_GMARK, | |
1357 | SD3_CMD_GMARK, | |
1358 | SD3_CLK_GMARK, | |
ee8f0cb3 NI |
1359 | SD2_DS_GMARK, |
1360 | SD2_DAT3_GMARK, | |
1361 | SD2_DAT2_GMARK, | |
1362 | SD2_DAT1_GMARK, | |
1363 | SD2_DAT0_GMARK, | |
0dfc2392 | 1364 | SD2_CMD_GMARK, |
ee8f0cb3 NI |
1365 | SD2_CLK_GMARK, |
1366 | ||
1367 | /* GPSR5 */ | |
1368 | MLB_DAT_GMARK, | |
1369 | MLB_SIG_GMARK, | |
1370 | MLB_CLK_GMARK, | |
1371 | MSIOF0_RXD_MARK, | |
1372 | MSIOF0_SS2_GMARK, | |
1373 | MSIOF0_TXD_MARK, | |
1374 | MSIOF0_SS1_GMARK, | |
1375 | MSIOF0_SYNC_GMARK, | |
1376 | MSIOF0_SCK_MARK, | |
1377 | HRTS0x_GMARK, | |
1378 | HCTS0x_GMARK, | |
1379 | HTX0_GMARK, | |
1380 | HRX0_GMARK, | |
1381 | HSCK0_GMARK, | |
1382 | RX2_A_GMARK, | |
1383 | TX2_A_GMARK, | |
1384 | SCK2_GMARK, | |
1385 | RTS1x_TANS_GMARK, | |
1386 | CTS1x_GMARK, | |
1387 | TX1_A_GMARK, | |
1388 | RX1_A_GMARK, | |
1389 | RTS0x_TANS_GMARK, | |
1390 | CTS0x_GMARK, | |
1391 | TX0_GMARK, | |
1392 | RX0_GMARK, | |
1393 | SCK0_GMARK, | |
1394 | ||
1395 | /* GPSR6 */ | |
0dfc2392 MV |
1396 | USB3_OVC_GMARK, |
1397 | USB3_PWEN_GMARK, | |
ee8f0cb3 NI |
1398 | USB30_OVC_GMARK, |
1399 | USB30_PWEN_GMARK, | |
1400 | USB1_OVC_GMARK, | |
1401 | USB1_PWEN_GMARK, | |
1402 | USB0_OVC_GMARK, | |
1403 | USB0_PWEN_GMARK, | |
1404 | AUDIO_CLKB_B_GMARK, | |
1405 | AUDIO_CLKA_A_GMARK, | |
1406 | SSI_SDATA9_A_GMARK, | |
1407 | SSI_SDATA8_GMARK, | |
1408 | SSI_SDATA7_GMARK, | |
1409 | SSI_WS78_GMARK, | |
1410 | SSI_SCK78_GMARK, | |
1411 | SSI_SDATA6_GMARK, | |
1412 | SSI_WS6_GMARK, | |
1413 | SSI_SCK6_GMARK, | |
1414 | SSI_SDATA5_MARK, | |
1415 | SSI_WS5_MARK, | |
1416 | SSI_SCK5_MARK, | |
1417 | SSI_SDATA4_GMARK, | |
1418 | SSI_WS4_GMARK, | |
1419 | SSI_SCK4_GMARK, | |
1420 | SSI_SDATA3_GMARK, | |
1421 | SSI_WS34_GMARK, | |
1422 | SSI_SCK34_GMARK, | |
1423 | SSI_SDATA2_A_GMARK, | |
1424 | SSI_SDATA1_A_GMARK, | |
1425 | SSI_SDATA0_GMARK, | |
0dfc2392 MV |
1426 | SSI_WS01239_GMARK, |
1427 | SSI_SCK01239_GMARK, | |
ee8f0cb3 NI |
1428 | |
1429 | /* GPSR7 */ | |
1430 | HDMI1_CEC_MARK, | |
1431 | HDMI0_CEC_MARK, | |
1432 | AVS2_MARK, | |
1433 | AVS1_MARK, | |
1434 | ||
1435 | /* IPSR0 */ | |
1436 | AVB_MDC_IMARK, | |
1437 | MSIOF2_SS2_C_MARK, | |
1438 | AVB_MAGIC_IMARK, | |
0dfc2392 | 1439 | MSIOF2_SS1_C_MARK, |
ee8f0cb3 NI |
1440 | SCK4_A_MARK, |
1441 | AVB_PHY_INT_IMARK, | |
1442 | MSIOF2_SYNC_C_MARK, | |
1443 | RX4_A_MARK, | |
1444 | AVB_LINK_IMARK, | |
1445 | MSIOF2_SCK_C_MARK, | |
1446 | TX4_A_MARK, | |
1447 | AVB_AVTP_MATCH_A_IMARK, | |
1448 | MSIOF2_RXD_C_MARK, | |
1449 | CTS4x_A_MARK, | |
0dfc2392 | 1450 | FSCLKST2x_A_MARK, |
ee8f0cb3 NI |
1451 | AVB_AVTP_CAPTURE_A_IMARK, |
1452 | MSIOF2_TXD_C_MARK, | |
1453 | RTS4x_TANS_A_MARK, | |
1454 | IRQ0_IMARK, | |
1455 | QPOLB_MARK, | |
1456 | DU_CDE_MARK, | |
1457 | VI4_DATA0_B_MARK, | |
1458 | CAN0_TX_B_MARK, | |
1459 | CANFD0_TX_B_MARK, | |
0dfc2392 | 1460 | MSIOF3_SS2_E_MARK, |
ee8f0cb3 NI |
1461 | IRQ1_IMARK, |
1462 | QPOLA_MARK, | |
1463 | DU_DISP_MARK, | |
1464 | VI4_DATA1_B_MARK, | |
1465 | CAN0_RX_B_MARK, | |
1466 | CANFD0_RX_B_MARK, | |
0dfc2392 | 1467 | MSIOF3_SS1_E_MARK, |
ee8f0cb3 NI |
1468 | |
1469 | /* IPSR1 */ | |
1470 | IRQ2_IMARK, | |
1471 | QCPV_QDE_MARK, | |
1472 | DU_EXODDF_DU_ODDF_DISP_CDE_MARK, | |
1473 | VI4_DATA2_B_MARK, | |
0dfc2392 | 1474 | MSIOF3_SYNC_E_MARK, |
ee8f0cb3 NI |
1475 | PWM3_B_MARK, |
1476 | IRQ3_IMARK, | |
1477 | QSTVB_QVE_MARK, | |
ee8f0cb3 NI |
1478 | DU_DOTCLKOUT1_MARK, |
1479 | VI4_DATA3_B_MARK, | |
0dfc2392 | 1480 | MSIOF3_SCK_E_MARK, |
ee8f0cb3 NI |
1481 | PWM4_B_MARK, |
1482 | IRQ4_IMARK, | |
1483 | QSTH_QHS_MARK, | |
ee8f0cb3 NI |
1484 | DU_EXHSYNC_DU_HSYNC_MARK, |
1485 | VI4_DATA4_B_MARK, | |
0dfc2392 | 1486 | MSIOF3_RXD_E_MARK, |
ee8f0cb3 NI |
1487 | PWM5_B_MARK, |
1488 | IRQ5_IMARK, | |
1489 | QSTB_QHE_MARK, | |
ee8f0cb3 NI |
1490 | DU_EXVSYNC_DU_VSYNC_MARK, |
1491 | VI4_DATA5_B_MARK, | |
0dfc2392 MV |
1492 | FSCLKST2x_B_MARK, |
1493 | MSIOF3_TXD_E_MARK, | |
ee8f0cb3 NI |
1494 | PWM6_B_MARK, |
1495 | PWM0_IMARK, | |
1496 | AVB_AVTP_PPS_MARK, | |
ee8f0cb3 NI |
1497 | VI4_DATA6_B_MARK, |
1498 | IECLK_B_MARK, | |
1499 | PWM1_A_IMARK, | |
ee8f0cb3 NI |
1500 | HRX3_D_MARK, |
1501 | VI4_DATA7_B_MARK, | |
1502 | IERX_B_MARK, | |
1503 | PWM2_A_IMARK, | |
1504 | PWMFSW0_MARK, | |
ee8f0cb3 NI |
1505 | HTX3_D_MARK, |
1506 | IETX_B_MARK, | |
1507 | A0_IMARK, | |
1508 | LCDOUT16_MARK, | |
1509 | MSIOF3_SYNC_B_MARK, | |
1510 | VI4_DATA8_MARK, | |
1511 | DU_DB0_MARK, | |
1512 | PWM3_A_MARK, | |
1513 | ||
1514 | /* IPSR2 */ | |
1515 | A1_IMARK, | |
1516 | LCDOUT17_MARK, | |
1517 | MSIOF3_TXD_B_MARK, | |
1518 | VI4_DATA9_MARK, | |
1519 | DU_DB1_MARK, | |
1520 | PWM4_A_MARK, | |
1521 | A2_IMARK, | |
1522 | LCDOUT18_MARK, | |
1523 | MSIOF3_SCK_B_MARK, | |
1524 | VI4_DATA10_MARK, | |
1525 | DU_DB2_MARK, | |
1526 | PWM5_A_MARK, | |
1527 | A3_IMARK, | |
1528 | LCDOUT19_MARK, | |
1529 | MSIOF3_RXD_B_MARK, | |
1530 | VI4_DATA11_MARK, | |
1531 | DU_DB3_MARK, | |
1532 | PWM6_A_MARK, | |
1533 | A4_IMARK, | |
1534 | LCDOUT20_MARK, | |
1535 | MSIOF3_SS1_B_MARK, | |
1536 | VI4_DATA12_MARK, | |
1537 | VI5_DATA12_MARK, | |
1538 | DU_DB4_MARK, | |
1539 | A5_IMARK, | |
1540 | LCDOUT21_MARK, | |
1541 | MSIOF3_SS2_B_MARK, | |
1542 | SCK4_B_MARK, | |
1543 | VI4_DATA13_MARK, | |
1544 | VI5_DATA13_MARK, | |
1545 | DU_DB5_MARK, | |
1546 | A6_IMARK, | |
1547 | LCDOUT22_MARK, | |
1548 | MSIOF2_SS1_A_MARK, | |
1549 | RX4_B_MARK, | |
1550 | VI4_DATA14_MARK, | |
1551 | VI5_DATA14_MARK, | |
1552 | DU_DB6_MARK, | |
1553 | A7_IMARK, | |
1554 | LCDOUT23_MARK, | |
1555 | MSIOF2_SS2_A_MARK, | |
1556 | TX4_B_MARK, | |
1557 | VI4_DATA15_MARK, | |
1558 | V15_DATA15_MARK, | |
1559 | DU_DB7_MARK, | |
1560 | A8_IMARK, | |
1561 | RX3_B_MARK, | |
1562 | MSIOF2_SYNC_A_MARK, | |
1563 | HRX4_B_MARK, | |
1564 | SDA6_A_MARK, | |
1565 | AVB_AVTP_MATCH_B_MARK, | |
1566 | PWM1_B_MARK, | |
1567 | ||
1568 | /* IPSR3 */ | |
1569 | A9_IMARK, | |
1570 | MSIOF2_SCK_A_MARK, | |
1571 | CTS4x_B_MARK, | |
1572 | VI5_VSYNCx_MARK, | |
1573 | A10_IMARK, | |
1574 | MSIOF2_RXD_A_MARK, | |
1575 | RTS4n_TANS_B_MARK, | |
1576 | VI5_HSYNCx_MARK, | |
1577 | A11_IMARK, | |
1578 | TX3_B_MARK, | |
1579 | MSIOF2_TXD_A_MARK, | |
1580 | HTX4_B_MARK, | |
1581 | HSCK4_MARK, | |
1582 | VI5_FIELD_MARK, | |
1583 | SCL6_A_MARK, | |
1584 | AVB_AVTP_CAPTURE_B_MARK, | |
1585 | PWM2_B_MARK, | |
ee8f0cb3 NI |
1586 | A12_IMARK, |
1587 | LCDOUT12_MARK, | |
1588 | MSIOF3_SCK_C_MARK, | |
1589 | HRX4_A_MARK, | |
1590 | VI5_DATA8_MARK, | |
1591 | DU_DG4_MARK, | |
1592 | A13_IMARK, | |
1593 | LCDOUT13_MARK, | |
1594 | MSIOF3_SYNC_C_MARK, | |
1595 | HTX4_A_MARK, | |
1596 | VI5_DATA9_MARK, | |
1597 | DU_DG5_MARK, | |
1598 | A14_IMARK, | |
1599 | LCDOUT14_MARK, | |
1600 | MSIOF3_RXD_C_MARK, | |
1601 | HCTS4x_MARK, | |
1602 | VI5_DATA10_MARK, | |
1603 | DU_DG6_MARK, | |
1604 | A15_IMARK, | |
1605 | LCDOUT15_MARK, | |
1606 | MSIOF3_TXD_C_MARK, | |
1607 | HRTS4x_MARK, | |
1608 | VI5_DATA11_MARK, | |
1609 | DU_DG7_MARK, | |
1610 | A16_IMARK, | |
1611 | LCDOUT8_MARK, | |
1612 | VI4_FIELD_MARK, | |
1613 | DU_DG0_MARK, | |
1614 | ||
1615 | /* IPSR4 */ | |
1616 | A17_IMARK, | |
1617 | LCDOUT9_MARK, | |
1618 | VI4_VSYNCx_MARK, | |
1619 | DU_DG1_MARK, | |
1620 | A18_IMARK, | |
1621 | LCDOUT10_MARK, | |
1622 | VI4_HSYNCx_MARK, | |
1623 | DU_DG2_MARK, | |
1624 | A19_IMARK, | |
1625 | LCDOUT11_MARK, | |
1626 | VI4_CLKENB_MARK, | |
1627 | DU_DG3_MARK, | |
1628 | CS0x_IMARK, | |
1629 | VI5_CLKENB_MARK, | |
1630 | CS1x_A26_IMARK, | |
1631 | VI5_CLK_MARK, | |
1632 | EX_WAIT0_B_MARK, | |
1633 | BSx_IMARK, | |
1634 | QSTVA_QVS_MARK, | |
1635 | MSIOF3_SCK_D_MARK, | |
1636 | SCK3_MARK, | |
1637 | HSCK3_MARK, | |
1638 | CAN1_TX_MARK, | |
1639 | CANFD1_TX_MARK, | |
1640 | IETX_A_MARK, | |
1641 | RDx_IMARK, | |
1642 | MSIOF3_SYNC_D_MARK, | |
1643 | RX3_A_MARK, | |
1644 | HRX3_A_MARK, | |
1645 | CAN0_TX_A_MARK, | |
1646 | CANFD0_TX_A_MARK, | |
1647 | RD_WRx_IMARK, | |
1648 | MSIOF3_RXD_D_MARK, | |
1649 | TX3_A_MARK, | |
1650 | HTX3_A_MARK, | |
1651 | CAN0_RX_A_MARK, | |
1652 | CANFD0_RX_A_MARK, | |
1653 | ||
1654 | /* IPSR5 */ | |
1655 | WE0x_IMARK, | |
1656 | MSIIOF3_TXD_D_MARK, | |
1657 | CTS3x_MARK, | |
1658 | HCTS3x_MARK, | |
1659 | SCL6_B_MARK, | |
1660 | CAN_CLK_MARK, | |
1661 | IECLK_A_MARK, | |
1662 | WE1x_IMARK, | |
1663 | MSIOF3_SS1_D_MARK, | |
1664 | RTS3x_TANS_MARK, | |
1665 | HRTS3x_MARK, | |
1666 | SDA6_B_MARK, | |
1667 | CAN1_RX_MARK, | |
1668 | CANFD1_RX_MARK, | |
1669 | IERX_A_MARK, | |
1670 | EX_WAIT0_A_IMARK, | |
1671 | QCLK_MARK, | |
1672 | VI4_CLK_MARK, | |
1673 | DU_DOTCLKOUT0_MARK, | |
1674 | D0_IMARK, | |
1675 | MSIOF2_SS1_B_MARK, | |
1676 | MSIOF3_SCK_A_MARK, | |
1677 | VI4_DATA16_MARK, | |
1678 | VI5_DATA0_MARK, | |
1679 | D1_IMARK, | |
1680 | MSIOF2_SS2_B_MARK, | |
1681 | MSIOF3_SYNC_A_MARK, | |
1682 | VI4_DATA17_MARK, | |
1683 | VI5_DATA1_MARK, | |
1684 | D2_IMARK, | |
1685 | MSIOF3_RXD_A_MARK, | |
1686 | VI4_DATA18_MARK, | |
1687 | VI5_DATA2_MARK, | |
1688 | D3_IMARK, | |
1689 | MSIOF3_TXD_A_MARK, | |
1690 | VI4_DATA19_MARK, | |
1691 | VI5_DATA3_MARK, | |
1692 | D4_IMARK, | |
1693 | MSIOF2_SCK_B_MARK, | |
1694 | VI4_DATA20_MARK, | |
1695 | VI5_DATA4_MARK, | |
1696 | ||
1697 | /* IPSR6 */ | |
1698 | D5_IMARK, | |
1699 | MSIOF2_SYNC_B_MARK, | |
1700 | VI4_DATA21_MARK, | |
1701 | VI5_DATA5_MARK, | |
1702 | D6_IMARK, | |
1703 | MSIOF2_RXD_B_MARK, | |
1704 | VI4_DATA22_MARK, | |
1705 | VI5_DATA6_MARK, | |
1706 | D7_IMARK, | |
1707 | MSIOF2_TXD_B_MARK, | |
1708 | VI4_DATA23_MARK, | |
1709 | VI5_DATA7_MARK, | |
1710 | D8_IMARK, | |
1711 | LCDOUT0_MARK, | |
1712 | MSIOF2_SCK_D_MARK, | |
1713 | SCK4_C_MARK, | |
1714 | VI4_DATA0_A_MARK, | |
1715 | DU_DR0_MARK, | |
1716 | D9_IMARK, | |
1717 | LCDOUT1_MARK, | |
1718 | MSIOF2_SYNC_D_MARK, | |
1719 | VI4_DATA1_A_MARK, | |
1720 | DU_DR1_MARK, | |
1721 | D10_IMARK, | |
1722 | LCDOUT2_MARK, | |
1723 | MSIOF2_RXD_D_MARK, | |
1724 | HRX3_B_MARK, | |
1725 | VI4_DATA2_A_MARK, | |
1726 | CTS4x_C_MARK, | |
1727 | DU_DR2_MARK, | |
1728 | D11_IMARK, | |
1729 | LCDOUT3_MARK, | |
1730 | MSIOF2_TXD_D_MARK, | |
1731 | HTX3_B_MARK, | |
1732 | VI4_DATA3_A_MARK, | |
1733 | RTS4x_TANS_C_MARK, | |
1734 | DU_DR3_MARK, | |
1735 | D12_IMARK, | |
1736 | LCDOUT4_MARK, | |
1737 | MSIOF2_SS1_D_MARK, | |
1738 | RX4_C_MARK, | |
1739 | VI4_DATA4_A_MARK, | |
1740 | DU_DR4_MARK, | |
1741 | ||
1742 | /* IPSR7 */ | |
1743 | D13_IMARK, | |
1744 | LCDOUT5_MARK, | |
1745 | MSIOF2_SS2_D_MARK, | |
1746 | TX4_C_MARK, | |
1747 | VI4_DATA5_A_MARK, | |
1748 | DU_DR5_MARK, | |
1749 | D14_IMARK, | |
1750 | LCDOUT6_MARK, | |
1751 | MSIOF3_SS1_A_MARK, | |
1752 | HRX3_C_MARK, | |
1753 | VI4_DATA6_A_MARK, | |
1754 | DU_DR6_MARK, | |
1755 | SCL6_C_MARK, | |
1756 | D15_IMARK, | |
1757 | LCDOUT7_MARK, | |
1758 | MSIOF3_SS2_A_MARK, | |
1759 | HTX3_C_MARK, | |
1760 | VI4_DATA7_A_MARK, | |
1761 | DU_DR7_MARK, | |
1762 | SDA6_C_MARK, | |
1763 | FSCLKST_MARK, | |
1764 | SD0_CLK_IMARK, | |
1765 | MSIOF1_SCK_E_MARK, | |
1766 | STP_OPWM_0_B_MARK, | |
1767 | SD0_CMD_IMARK, | |
1768 | MSIOF1_SYNC_E_MARK, | |
1769 | STP_IVCXO27_0_B_MARK, | |
1770 | SD0_DAT0_IMARK, | |
1771 | MSIOF1_RXD_E_MARK, | |
1772 | TS_SCK0_B_MARK, | |
1773 | STP_ISCLK_0_B_MARK, | |
1774 | SD0_DAT1_IMARK, | |
1775 | MSIOF1_TXD_E_MARK, | |
1776 | TS_SPSYNC0_B_MARK, | |
1777 | STP_ISSYNC_0_B_MARK, | |
1778 | ||
1779 | /* IPSR8 */ | |
1780 | SD0_DAT2_IMARK, | |
1781 | MSIOF1_SS1_E_MARK, | |
1782 | TS_SDAT0_B_MARK, | |
1783 | STP_ISD_0_B_MARK, | |
1784 | SD0_DAT3_IMARK, | |
1785 | MSIOF1_SS2_E_MARK, | |
1786 | TS_SDEN0_B_MARK, | |
1787 | STP_ISEN_0_B_MARK, | |
1788 | SD1_CLK_IMARK, | |
1789 | MSIOF1_SCK_G_MARK, | |
1790 | SIM0_CLK_A_MARK, | |
ee8f0cb3 NI |
1791 | SD1_CMD_IMARK, |
1792 | MSIOF1_SYNC_G_MARK, | |
0dfc2392 | 1793 | NFCEx_B_MARK, |
ee8f0cb3 NI |
1794 | SIM0_D_A_MARK, |
1795 | STP_IVCXO27_1_B_MARK, | |
ee8f0cb3 NI |
1796 | SD1_DAT0_IMARK, |
1797 | SD2_DAT4_MARK, | |
1798 | MSIOF1_RXD_G_MARK, | |
0dfc2392 | 1799 | NFWPx_B_MARK, |
ee8f0cb3 NI |
1800 | TS_SCK1_B_MARK, |
1801 | STP_ISCLK_1_B_MARK, | |
ee8f0cb3 NI |
1802 | SD1_DAT1_IMARK, |
1803 | SD2_DAT5_MARK, | |
1804 | MSIOF1_TXD_G_MARK, | |
0dfc2392 | 1805 | NFDATA14_B_MARK, |
ee8f0cb3 NI |
1806 | TS_SPSYNC1_B_MARK, |
1807 | STP_ISSYNC_1_B_MARK, | |
ee8f0cb3 NI |
1808 | SD1_DAT2_IMARK, |
1809 | SD2_DAT6_MARK, | |
1810 | MSIOF1_SS1_G_MARK, | |
0dfc2392 | 1811 | NFDATA15_B_MARK, |
ee8f0cb3 NI |
1812 | TS_SDAT1_B_MARK, |
1813 | STP_IOD_1_B_MARK, | |
1814 | SD1_DAT3_IMARK, | |
1815 | SD2_DAT7_MARK, | |
1816 | MSIOF1_SS2_G_MARK, | |
0dfc2392 | 1817 | NFRBx_B_MARK, |
ee8f0cb3 NI |
1818 | TS_SDEN1_B_MARK, |
1819 | STP_ISEN_1_B_MARK, | |
1820 | ||
1821 | /* IPSR9 */ | |
1822 | SD2_CLK_IMARK, | |
0dfc2392 MV |
1823 | NFDATA8_MARK, |
1824 | SD2_CMD_IMARK, | |
1825 | NFDATA9_MARK, | |
ee8f0cb3 | 1826 | SD2_DAT0_IMARK, |
0dfc2392 | 1827 | NFDATA10_MARK, |
ee8f0cb3 | 1828 | SD2_DAT1_IMARK, |
0dfc2392 | 1829 | NFDATA11_MARK, |
ee8f0cb3 | 1830 | SD2_DAT2_IMARK, |
0dfc2392 | 1831 | NFDATA12_MARK, |
ee8f0cb3 | 1832 | SD2_DAT3_IMARK, |
0dfc2392 | 1833 | NFDATA13_MARK, |
ee8f0cb3 | 1834 | SD2_DS_IMARK, |
0dfc2392 | 1835 | NFALE_MARK, |
ee8f0cb3 | 1836 | SATA_DEVSLP_B_MARK, |
0dfc2392 MV |
1837 | SD3_CLK_IMARK, |
1838 | NFWEx_MARK, | |
1839 | ||
1840 | /* IPSR10 */ | |
1841 | SD3_CMD_IMARK, | |
1842 | NFREx_MARK, | |
1843 | SD3_DAT0_IMARK, | |
1844 | NFDATA0_MARK, | |
1845 | SD3_DAT1_IMARK, | |
1846 | NFDATA1_MARK, | |
1847 | SD3_DAT2_IMARK, | |
1848 | NFDATA2_MARK, | |
1849 | SD3_DAT3_IMARK, | |
1850 | NFDATA3_MARK, | |
ee8f0cb3 NI |
1851 | SD3_DAT4_IMARK, |
1852 | SD2_CD_A_MARK, | |
0dfc2392 | 1853 | NFDATA4_MARK, |
ee8f0cb3 NI |
1854 | SD3_DAT5_IMARK, |
1855 | SD2_WP_A_MARK, | |
0dfc2392 | 1856 | NFDATA5_MARK, |
ee8f0cb3 NI |
1857 | SD3_DAT6_IMARK, |
1858 | SD3_CD_MARK, | |
0dfc2392 MV |
1859 | NFDATA6_MARK, |
1860 | ||
1861 | /* IPSR11 */ | |
ee8f0cb3 NI |
1862 | SD3_DAT7_IMARK, |
1863 | SD3_WP_MARK, | |
0dfc2392 MV |
1864 | NFDATA7_MARK, |
1865 | SD3_DS_IMARK, | |
1866 | NFCLE_MARK, | |
ee8f0cb3 | 1867 | SD0_CD_IMARK, |
0dfc2392 | 1868 | NFDATA14_A_MARK, |
ee8f0cb3 NI |
1869 | SCL2_B_MARK, |
1870 | SIM0_RST_A_MARK, | |
1871 | SD0_WP_IMARK, | |
0dfc2392 | 1872 | NFDATA15_A_MARK, |
ee8f0cb3 NI |
1873 | SDA2_B_MARK, |
1874 | SD1_CD_IMARK, | |
0dfc2392 | 1875 | NFRBx_A_MARK, |
ee8f0cb3 NI |
1876 | SIM0_CLK_B_MARK, |
1877 | SD1_WP_IMARK, | |
0dfc2392 | 1878 | NFCEx_A_MARK, |
ee8f0cb3 NI |
1879 | SIM0_D_B_MARK, |
1880 | SCK0_IMARK, | |
1881 | HSCK1_B_MARK, | |
1882 | MSIOF1_SS2_B_MARK, | |
1883 | AUDIO_CLKC_B_MARK, | |
1884 | SDA2_A_MARK, | |
1885 | SIM0_RST_B_MARK, | |
0dfc2392 | 1886 | STP_OPWM_0_C_MARK, |
ee8f0cb3 NI |
1887 | RIF0_CLK_B_MARK, |
1888 | ADICHS2_MARK, | |
0dfc2392 | 1889 | SCK5_B_MARK, |
ee8f0cb3 NI |
1890 | RX0_IMARK, |
1891 | HRX1_B_MARK, | |
1892 | TS_SCK0_C_MARK, | |
1893 | STP_ISCLK_0_C_MARK, | |
1894 | RIF0_D0_B_MARK, | |
1895 | ||
0dfc2392 | 1896 | /* IPSR12 */ |
ee8f0cb3 NI |
1897 | TX0_IMARK, |
1898 | HTX1_B_MARK, | |
1899 | TS_SPSYNC0_C_MARK, | |
1900 | STP_ISSYNC_0_C_MARK, | |
1901 | RIF0_D1_B_MARK, | |
1902 | CTS0x_IMARK, | |
1903 | HCTS1x_B_MARK, | |
1904 | MSIOF1_SYNC_B_MARK, | |
1905 | TS_SPSYNC1_C_MARK, | |
1906 | STP_ISSYNC_1_C_MARK, | |
1907 | RIF1_SYNC_B_MARK, | |
1908 | AUDIO_CLKOUT_C_MARK, | |
1909 | ADICS_SAMP_MARK, | |
1910 | RTS0x_TANS_IMARK, | |
1911 | HRTS1x_B_MARK, | |
1912 | MSIOF1_SS1_B_MARK, | |
1913 | AUDIO_CLKA_B_MARK, | |
1914 | SCL2_A_MARK, | |
1915 | STP_IVCXO27_1_C_MARK, | |
1916 | RIF0_SYNC_B_MARK, | |
1917 | ADICHS1_MARK, | |
1918 | RX1_A_IMARK, | |
1919 | HRX1_A_MARK, | |
1920 | TS_SDAT0_C_MARK, | |
0dfc2392 | 1921 | STP_ISD_0_C_MARK, |
ee8f0cb3 NI |
1922 | RIF1_CLK_C_MARK, |
1923 | TX1_A_IMARK, | |
1924 | HTX1_A_MARK, | |
1925 | TS_SDEN0_C_MARK, | |
1926 | STP_ISEN_0_C_MARK, | |
1927 | RIF1_D0_C_MARK, | |
1928 | CTS1x_IMARK, | |
1929 | HCTS1x_A_MARK, | |
1930 | MSIOF1_RXD_B_MARK, | |
1931 | TS_SDEN1_C_MARK, | |
1932 | STP_ISEN_1_C_MARK, | |
1933 | RIF1_D0_B_MARK, | |
1934 | ADIDATA_MARK, | |
1935 | RTS1x_TANS_IMARK, | |
1936 | HRTS1x_A_MARK, | |
1937 | MSIOF1_TXD_B_MARK, | |
1938 | TS_SDAT1_C_MARK, | |
1939 | STP_ISD_1_C_MARK, | |
1940 | RIF1_D1_B_MARK, | |
1941 | ADICHS0_MARK, | |
1942 | SCK2_IMARK, | |
1943 | SCIF_CLK_B_MARK, | |
1944 | MSIOF1_SCK_B_MARK, | |
1945 | TS_SCK1_C_MARK, | |
1946 | STP_ISCLK_1_C_MARK, | |
1947 | RIF1_CLK_B_MARK, | |
1948 | ADICLK_MARK, | |
1949 | ||
0dfc2392 | 1950 | /* IPSR13 */ |
ee8f0cb3 NI |
1951 | TX2_A_IMARK, |
1952 | SD2_CD_B_MARK, | |
1953 | SCL1_A_MARK, | |
ee8f0cb3 NI |
1954 | FMCLK_A_MARK, |
1955 | RIF1_D1_C_MARK, | |
0dfc2392 | 1956 | FSO_CFE_0x_MARK, |
ee8f0cb3 NI |
1957 | RX2_A_IMARK, |
1958 | SD2_WP_B_MARK, | |
1959 | SDA1_A_MARK, | |
0dfc2392 | 1960 | FMIN_A_MARK, |
ee8f0cb3 | 1961 | RIF1_SYNC_C_MARK, |
0dfc2392 | 1962 | FSO_CFE_1x_MARK, |
ee8f0cb3 NI |
1963 | HSCK0_IMARK, |
1964 | MSIOF1_SCK_D_MARK, | |
1965 | AUDIO_CLKB_A_MARK, | |
1966 | SSI_SDATA1_B_MARK, | |
1967 | TS_SCK0_D_MARK, | |
1968 | STP_ISCLK_0_D_MARK, | |
1969 | RIF0_CLK_C_MARK, | |
0dfc2392 | 1970 | RX5_B_MARK, |
ee8f0cb3 NI |
1971 | HRX0_IMARK, |
1972 | MSIOF1_RXD_D_MARK, | |
0dfc2392 | 1973 | SSI_SDATA2_B_MARK, |
ee8f0cb3 NI |
1974 | TS_SDEN0_D_MARK, |
1975 | STP_ISEN_0_D_MARK, | |
1976 | RIF0_D0_C_MARK, | |
ee8f0cb3 NI |
1977 | HTX0_IMARK, |
1978 | MSIOF1_TXD_D_MARK, | |
1979 | SSI_SDATA9_B_MARK, | |
1980 | TS_SDAT0_D_MARK, | |
1981 | STP_ISD_0_D_MARK, | |
1982 | RIF0_D1_C_MARK, | |
ee8f0cb3 NI |
1983 | HCTS0x_IMARK, |
1984 | RX2_B_MARK, | |
1985 | MSIOF1_SYNC_D_MARK, | |
1986 | SSI_SCK9_A_MARK, | |
1987 | TS_SPSYNC0_D_MARK, | |
1988 | STP_ISSYNC_0_D_MARK, | |
1989 | RIF0_SYNC_C_MARK, | |
1990 | AUDIO_CLKOUT1_A_MARK, | |
ee8f0cb3 NI |
1991 | HRTS0x_IMARK, |
1992 | TX2_B_MARK, | |
1993 | MSIOF1_SS1_D_MARK, | |
1994 | SSI_WS9_A_MARK, | |
1995 | STP_IVCXO27_0_D_MARK, | |
1996 | BPFCLK_A_MARK, | |
1997 | AUDIO_CLKOUT2_A_MARK, | |
1998 | MSIOF0_SYNC_IMARK, | |
1999 | AUDIO_CLKOUT_A_MARK, | |
0dfc2392 MV |
2000 | TX5_B_MARK, |
2001 | BPFCLK_D_MARK, | |
ee8f0cb3 | 2002 | |
0dfc2392 | 2003 | /* IPSR14 */ |
ee8f0cb3 | 2004 | MSIOF0_SS1_IMARK, |
0dfc2392 MV |
2005 | RX5_A_MARK, |
2006 | NFWPx_A_MARK, | |
ee8f0cb3 NI |
2007 | AUDIO_CLKA_C_MARK, |
2008 | SSI_SCK2_A_MARK, | |
ee8f0cb3 NI |
2009 | STP_IVCXO27_0_C_MARK, |
2010 | AUDIO_CLKOUT3_A_MARK, | |
2011 | TCLK1_B_MARK, | |
2012 | MSIOF0_SS2_IMARK, | |
0dfc2392 | 2013 | TX5_A_MARK, |
ee8f0cb3 NI |
2014 | MSIOF1_SS2_D_MARK, |
2015 | AUDIO_CLKC_A_MARK, | |
2016 | SSI_WS2_A_MARK, | |
ee8f0cb3 NI |
2017 | STP_OPWM_0_D_MARK, |
2018 | AUDIO_CLKOUT_D_MARK, | |
2019 | SPEEDIN_B_MARK, | |
2020 | MLB_CLK_IMARK, | |
2021 | MSIOF1_SCK_F_MARK, | |
2022 | SCL1_B_MARK, | |
2023 | MLB_SIG_IMARK, | |
2024 | RX1_B_MARK, | |
2025 | MSIOF1_SYNC_F_MARK, | |
2026 | SDA1_B_MARK, | |
2027 | MLB_DAT_IMARK, | |
2028 | TX1_B_MARK, | |
2029 | MSIOF1_RXD_F_MARK, | |
0dfc2392 | 2030 | SSI_SCK01239_IMARK, |
ee8f0cb3 NI |
2031 | MSIOF1_TXD_F_MARK, |
2032 | MOUT0_MARK, | |
0dfc2392 | 2033 | SSI_WS01239_IMARK, |
ee8f0cb3 NI |
2034 | MSIOF1_SS1_F_MARK, |
2035 | MOUT1_MARK, | |
2036 | SSI_SDATA0_IMARK, | |
2037 | MSIOF1_SS2_F_MARK, | |
2038 | MOUT2_MARK, | |
2039 | ||
0dfc2392 | 2040 | /* IPSR15 */ |
ee8f0cb3 NI |
2041 | SSI_SDATA1_A_IMARK, |
2042 | MOUT5_MARK, | |
2043 | SSI_SDATA2_A_IMARK, | |
2044 | SSI_SCK1_B_MARK, | |
2045 | MOUT6_MARK, | |
2046 | SSI_SCK34_IMARK, | |
2047 | MSIOF1_SS1_A_MARK, | |
2048 | STP_OPWM_0_A_MARK, | |
2049 | SSI_WS34_IMARK, | |
2050 | HCTS2x_A_MARK, | |
2051 | MSIOF1_SS2_A_MARK, | |
2052 | STP_IVCXO27_0_A_MARK, | |
2053 | SSI_SDATA3_IMARK, | |
2054 | HRTS2x_A_MARK, | |
2055 | MSIOF1_TXD_A_MARK, | |
2056 | TS_SCK0_A_MARK, | |
2057 | STP_ISCLK_0_A_MARK, | |
2058 | RIF0_D1_A_MARK, | |
2059 | RIF2_D0_A_MARK, | |
2060 | SSI_SCK4_IMARK, | |
2061 | HRX2_A_MARK, | |
2062 | MSIOF1_SCK_A_MARK, | |
2063 | TS_SDAT0_A_MARK, | |
2064 | STP_ISD_0_A_MARK, | |
2065 | RIF0_CLK_A_MARK, | |
2066 | RIF2_CLK_A_MARK, | |
2067 | SSI_WS4_IMARK, | |
2068 | HTX2_A_MARK, | |
2069 | MSIOF1_SYNC_A_MARK, | |
2070 | TS_SDEN0_A_MARK, | |
2071 | STP_ISEN_0_A_MARK, | |
2072 | RIF0_SYNC_A_MARK, | |
2073 | RIF2_SYNC_A_MARK, | |
2074 | SSI_SDATA4_IMARK, | |
2075 | HSCK2_A_MARK, | |
2076 | MSIOF1_RXD_A_MARK, | |
2077 | TS_SPSYNC0_A_MARK, | |
2078 | STP_ISSYNC_0_A_MARK, | |
2079 | RIF0_D0_A_MARK, | |
2080 | RIF2_D1_A_MARK, | |
2081 | ||
0dfc2392 | 2082 | /* IPSR16 */ |
ee8f0cb3 | 2083 | SSI_SCK6_IMARK, |
ee8f0cb3 | 2084 | SIM0_RST_D_MARK, |
ee8f0cb3 | 2085 | SSI_WS6_IMARK, |
ee8f0cb3 NI |
2086 | SIM0_D_D_MARK, |
2087 | SSI_SDATA6_IMARK, | |
2088 | SIM0_CLK_D_MARK, | |
ee8f0cb3 NI |
2089 | SATA_DEVSLP_A_MARK, |
2090 | SSI_SCK78_IMARK, | |
2091 | HRX2_B_MARK, | |
2092 | MSIOF1_SCK_C_MARK, | |
2093 | TS_SCK1_A_MARK, | |
2094 | STP_ISCLK_1_A_MARK, | |
2095 | RIF1_CLK_A_MARK, | |
2096 | RIF3_CLK_A_MARK, | |
2097 | SSI_WS78_IMARK, | |
2098 | HTX2_B_MARK, | |
2099 | MSIOF1_SYNC_C_MARK, | |
0dfc2392 | 2100 | TS_SDAT1_A_MARK, |
ee8f0cb3 NI |
2101 | STP_ISD_1_A_MARK, |
2102 | RIF1_SYNC_A_MARK, | |
2103 | RIF3_SYNC_A_MARK, | |
2104 | SSI_SDATA7_IMARK, | |
2105 | HCTS2x_B_MARK, | |
2106 | MSIOF1_RXD_C_MARK, | |
2107 | TS_SDEN1_A_MARK, | |
0dfc2392 | 2108 | STP_ISEN_1_A_MARK, |
ee8f0cb3 NI |
2109 | RIF1_D0_A_MARK, |
2110 | RIF3_D0_A_MARK, | |
2111 | TCLK2_A_MARK, | |
2112 | SSI_SDATA8_IMARK, | |
2113 | HRTS2x_B_MARK, | |
2114 | MSIOF1_TXD_C_MARK, | |
2115 | TS_SPSYNC1_A_MARK, | |
2116 | STP_ISSYNC_1_A_MARK, | |
2117 | RIF1_D1_A_MARK, | |
0dfc2392 | 2118 | RIF3_D1_A_MARK, |
ee8f0cb3 NI |
2119 | SSI_SDATA9_A_IMARK, |
2120 | HSCK2_B_MARK, | |
2121 | MSIOF1_SS1_C_MARK, | |
2122 | HSCK1_A_MARK, | |
2123 | SSI_WS1_B_MARK, | |
2124 | SCK1_MARK, | |
2125 | STP_IVCXO27_1_A_MARK, | |
0dfc2392 | 2126 | SCK5_A_MARK, |
ee8f0cb3 | 2127 | |
0dfc2392 | 2128 | /* IPSR17 */ |
ee8f0cb3 NI |
2129 | AUDIO_CLKA_A_IMARK, |
2130 | CC5_OSCOUT_MARK, | |
2131 | AUDIO_CLKB_B_IMARK, | |
2132 | SCIF_CLK_A_MARK, | |
ee8f0cb3 NI |
2133 | STP_IVCXO27_1_D_MARK, |
2134 | REMOCON_A_MARK, | |
2135 | TCLK1_A_MARK, | |
ee8f0cb3 NI |
2136 | USB0_PWEN_IMARK, |
2137 | SIM0_RST_C_MARK, | |
2138 | TS_SCK1_D_MARK, | |
2139 | STP_ISCLK_1_D_MARK, | |
2140 | BPFCLK_B_MARK, | |
2141 | RIF3_CLK_B_MARK, | |
0dfc2392 | 2142 | HSCK2_C_MARK, |
ee8f0cb3 NI |
2143 | USB0_OVC_IMARK, |
2144 | SIM0_D_C_MARK, | |
2145 | TS_SDAT1_D_MARK, | |
2146 | STP_ISD_1_D_MARK, | |
2147 | RIF3_SYNC_B_MARK, | |
0dfc2392 | 2148 | HRX2_C_MARK, |
ee8f0cb3 NI |
2149 | USB1_PWEN_IMARK, |
2150 | SIM0_CLK_C_MARK, | |
2151 | SSI_SCK1_A_MARK, | |
2152 | TS_SCK0_E_MARK, | |
2153 | STP_ISCLK_0_E_MARK, | |
2154 | FMCLK_B_MARK, | |
2155 | RIF2_CLK_B_MARK, | |
ee8f0cb3 | 2156 | SPEEDIN_A_MARK, |
0dfc2392 | 2157 | HTX2_C_MARK, |
ee8f0cb3 NI |
2158 | USB1_OVC_IMARK, |
2159 | MSIOF1_SS2_C_MARK, | |
2160 | SSI_WS1_A_MARK, | |
2161 | TS_SDAT0_E_MARK, | |
2162 | STP_ISD_0_E_MARK, | |
2163 | FMIN_B_MARK, | |
2164 | RIF2_SYNC_B_MARK, | |
ee8f0cb3 | 2165 | REMOCON_B_MARK, |
0dfc2392 | 2166 | HCTS2x_C_MARK, |
ee8f0cb3 NI |
2167 | USB30_PWEN_IMARK, |
2168 | AUDIO_CLKOUT_B_MARK, | |
2169 | SSI_SCK2_B_MARK, | |
2170 | TS_SDEN1_D_MARK, | |
2171 | STP_ISEN_1_D_MARK, | |
2172 | STP_OPWM_0_E_MARK, | |
2173 | RIF3_D0_B_MARK, | |
ee8f0cb3 NI |
2174 | TCLK2_B_MARK, |
2175 | TPU0TO0_MARK, | |
0dfc2392 MV |
2176 | BPFCLK_C_MARK, |
2177 | HRTS2x_C_MARK, | |
ee8f0cb3 NI |
2178 | USB30_OVC_IMARK, |
2179 | AUDIO_CLKOUT1_B_MARK, | |
2180 | SSI_WS2_B_MARK, | |
2181 | TS_SPSYNC1_D_MARK, | |
2182 | STP_ISSYNC_1_D_MARK, | |
2183 | STP_IVCXO27_0_E_MARK, | |
2184 | RIF3_D1_B_MARK, | |
0dfc2392 | 2185 | FSO_TOEx_MARK, |
ee8f0cb3 NI |
2186 | TPU0TO1_MARK, |
2187 | ||
0d0915be MV |
2188 | /* IPSR18 */ |
2189 | USB3_PWEN_IMARK, | |
2190 | AUDIO_CLKOUT2_B_MARK, | |
2191 | SSI_SCK9_B_MARK, | |
2192 | TS_SDEN0_E_MARK, | |
2193 | STP_ISEN_0_E_MARK, | |
2194 | RIF2_D0_B_MARK, | |
2195 | TPU0TO2_MARK, | |
2196 | FMCLK_C_MARK, | |
2197 | FMCLK_D_MARK, | |
2198 | ||
2199 | USB3_OVC_IMARK, | |
2200 | AUDIO_CLKOUT3_B_MARK, | |
2201 | SSI_WS9_B_MARK, | |
2202 | TS_SPSYNC0_E_MARK, | |
2203 | STP_ISSYNC_0_E_MARK, | |
2204 | RIF2_D1_B_MARK, | |
2205 | TPU0TO3_MARK, | |
2206 | FMIN_C_MARK, | |
2207 | FMIN_D_MARK, | |
2208 | ||
ee8f0cb3 NI |
2209 | PINMUX_MARK_END, |
2210 | }; | |
2211 | ||
2212 | static pinmux_enum_t pinmux_data[] = { | |
2213 | PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */ | |
2214 | ||
2215 | /* GPSR0 */ | |
2216 | PINMUX_DATA(D15_GMARK, GFN_D15), | |
2217 | PINMUX_DATA(D14_GMARK, GFN_D14), | |
2218 | PINMUX_DATA(D13_GMARK, GFN_D13), | |
2219 | PINMUX_DATA(D12_GMARK, GFN_D12), | |
2220 | PINMUX_DATA(D11_GMARK, GFN_D11), | |
2221 | PINMUX_DATA(D10_GMARK, GFN_D10), | |
2222 | PINMUX_DATA(D9_GMARK, GFN_D9), | |
2223 | PINMUX_DATA(D8_GMARK, GFN_D8), | |
2224 | PINMUX_DATA(D7_GMARK, GFN_D7), | |
2225 | PINMUX_DATA(D6_GMARK, GFN_D6), | |
2226 | PINMUX_DATA(D5_GMARK, GFN_D5), | |
2227 | PINMUX_DATA(D4_GMARK, GFN_D4), | |
2228 | PINMUX_DATA(D3_GMARK, GFN_D3), | |
2229 | PINMUX_DATA(D2_GMARK, GFN_D2), | |
2230 | PINMUX_DATA(D1_GMARK, GFN_D1), | |
2231 | PINMUX_DATA(D0_GMARK, GFN_D0), | |
2232 | ||
2233 | /* GPSR1 */ | |
0dfc2392 | 2234 | PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT), |
ee8f0cb3 NI |
2235 | PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A), |
2236 | PINMUX_DATA(WE1x_GMARK, GFN_WE1x), | |
2237 | PINMUX_DATA(WE0x_GMARK, GFN_WE0x), | |
2238 | PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx), | |
2239 | PINMUX_DATA(RDx_GMARK, GFN_RDx), | |
2240 | PINMUX_DATA(BSx_GMARK, GFN_BSx), | |
2241 | PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26), | |
2242 | PINMUX_DATA(CS0x_GMARK, GFN_CS0x), | |
2243 | PINMUX_DATA(A19_GMARK, GFN_A19), | |
2244 | PINMUX_DATA(A18_GMARK, GFN_A18), | |
2245 | PINMUX_DATA(A17_GMARK, GFN_A17), | |
2246 | PINMUX_DATA(A16_GMARK, GFN_A16), | |
2247 | PINMUX_DATA(A15_GMARK, GFN_A15), | |
2248 | PINMUX_DATA(A14_GMARK, GFN_A14), | |
2249 | PINMUX_DATA(A13_GMARK, GFN_A13), | |
2250 | PINMUX_DATA(A12_GMARK, GFN_A12), | |
2251 | PINMUX_DATA(A11_GMARK, GFN_A11), | |
2252 | PINMUX_DATA(A10_GMARK, GFN_A10), | |
2253 | PINMUX_DATA(A9_GMARK, GFN_A9), | |
2254 | PINMUX_DATA(A8_GMARK, GFN_A8), | |
2255 | PINMUX_DATA(A7_GMARK, GFN_A7), | |
2256 | PINMUX_DATA(A6_GMARK, GFN_A6), | |
2257 | PINMUX_DATA(A5_GMARK, GFN_A5), | |
2258 | PINMUX_DATA(A4_GMARK, GFN_A4), | |
2259 | PINMUX_DATA(A3_GMARK, GFN_A3), | |
2260 | PINMUX_DATA(A2_GMARK, GFN_A2), | |
2261 | PINMUX_DATA(A1_GMARK, GFN_A1), | |
2262 | PINMUX_DATA(A0_GMARK, GFN_A0), | |
2263 | ||
2264 | /* GPSR2 */ | |
2265 | PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A), | |
2266 | PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A), | |
2267 | PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK), | |
2268 | PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT), | |
2269 | PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC), | |
2270 | PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC), | |
2271 | PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A), | |
2272 | PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A), | |
2273 | PINMUX_DATA(PWM0_GMARK, GFN_PWM0), | |
2274 | PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5), | |
2275 | PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4), | |
2276 | PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3), | |
2277 | PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2), | |
2278 | PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1), | |
2279 | PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0), | |
2280 | ||
2281 | /* GPSR3 */ | |
2282 | PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP), | |
2283 | PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD), | |
2284 | PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP), | |
2285 | PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD), | |
2286 | PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3), | |
2287 | PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2), | |
2288 | PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1), | |
2289 | PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0), | |
2290 | PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD), | |
2291 | PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK), | |
2292 | PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3), | |
2293 | PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2), | |
2294 | PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1), | |
2295 | PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0), | |
2296 | PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD), | |
2297 | PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK), | |
2298 | ||
2299 | /* GPSR4 */ | |
0dfc2392 | 2300 | PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS), |
ee8f0cb3 NI |
2301 | PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7), |
2302 | PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6), | |
2303 | PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5), | |
2304 | PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4), | |
0dfc2392 MV |
2305 | PINMUX_DATA(SD3_DAT3_GMARK, GFN_SD3_DAT3), |
2306 | PINMUX_DATA(SD3_DAT2_GMARK, GFN_SD3_DAT2), | |
2307 | PINMUX_DATA(SD3_DAT1_GMARK, GFN_SD3_DAT1), | |
2308 | PINMUX_DATA(SD3_DAT0_GMARK, GFN_SD3_DAT0), | |
2309 | PINMUX_DATA(SD3_CMD_GMARK, GFN_SD3_CMD), | |
2310 | PINMUX_DATA(SD3_CLK_GMARK, GFN_SD3_CLK), | |
ee8f0cb3 NI |
2311 | PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS), |
2312 | PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3), | |
2313 | PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2), | |
2314 | PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1), | |
2315 | PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0), | |
0dfc2392 | 2316 | PINMUX_DATA(SD2_CMD_GMARK, GFN_SD2_CMD), |
ee8f0cb3 NI |
2317 | PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK), |
2318 | ||
2319 | /* GPSR5 */ | |
2320 | PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT), | |
2321 | PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG), | |
2322 | PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK), | |
2323 | PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD), | |
2324 | PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2), | |
2325 | PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD), | |
2326 | PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1), | |
2327 | PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC), | |
2328 | PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK), | |
2329 | PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x), | |
2330 | PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x), | |
2331 | PINMUX_DATA(HTX0_GMARK, GFN_HTX0), | |
2332 | PINMUX_DATA(HRX0_GMARK, GFN_HRX0), | |
2333 | PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0), | |
2334 | PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A), | |
2335 | PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A), | |
2336 | PINMUX_DATA(SCK2_GMARK, GFN_SCK2), | |
2337 | PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS), | |
2338 | PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x), | |
2339 | PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A), | |
2340 | PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A), | |
2341 | PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS), | |
2342 | PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x), | |
2343 | PINMUX_DATA(TX0_GMARK, GFN_TX0), | |
2344 | PINMUX_DATA(RX0_GMARK, GFN_RX0), | |
2345 | PINMUX_DATA(SCK0_GMARK, GFN_SCK0), | |
2346 | ||
2347 | /* GPSR6 */ | |
0dfc2392 MV |
2348 | PINMUX_DATA(USB3_OVC_GMARK, GFN_USB3_OVC), |
2349 | PINMUX_DATA(USB3_PWEN_GMARK, GFN_USB3_PWEN), | |
ee8f0cb3 NI |
2350 | PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC), |
2351 | PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN), | |
2352 | PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC), | |
2353 | PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN), | |
2354 | PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC), | |
2355 | PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN), | |
2356 | PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B), | |
2357 | PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A), | |
2358 | PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A), | |
2359 | PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8), | |
2360 | PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7), | |
2361 | PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78), | |
2362 | PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78), | |
2363 | PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6), | |
2364 | PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6), | |
2365 | PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6), | |
2366 | PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5), | |
2367 | PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5), | |
2368 | PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5), | |
2369 | PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4), | |
2370 | PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4), | |
2371 | PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4), | |
2372 | PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3), | |
2373 | PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34), | |
2374 | PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34), | |
2375 | PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A), | |
2376 | PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A), | |
2377 | PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0), | |
0dfc2392 MV |
2378 | PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239), |
2379 | PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239), | |
ee8f0cb3 NI |
2380 | |
2381 | /* GPSR7 */ | |
2382 | PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC), | |
2383 | PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC), | |
2384 | PINMUX_DATA(AVS2_MARK, FN_AVS2), | |
2385 | PINMUX_DATA(AVS1_MARK, FN_AVS1), | |
ee8f0cb3 NI |
2386 | }; |
2387 | ||
2388 | static struct pinmux_gpio pinmux_gpios[] = { | |
2389 | PINMUX_GPIO_GP_ALL(), | |
2390 | /* GPSR0 */ | |
2391 | GPIO_GFN(D15), | |
2392 | GPIO_GFN(D14), | |
2393 | GPIO_GFN(D13), | |
2394 | GPIO_GFN(D12), | |
2395 | GPIO_GFN(D11), | |
2396 | GPIO_GFN(D10), | |
2397 | GPIO_GFN(D9), | |
2398 | GPIO_GFN(D8), | |
2399 | GPIO_GFN(D7), | |
2400 | GPIO_GFN(D6), | |
2401 | GPIO_GFN(D5), | |
2402 | GPIO_GFN(D4), | |
2403 | GPIO_GFN(D3), | |
2404 | GPIO_GFN(D2), | |
2405 | GPIO_GFN(D1), | |
2406 | GPIO_GFN(D0), | |
2407 | /* GPSR1 */ | |
0dfc2392 | 2408 | GPIO_GFN(CLKOUT), |
ee8f0cb3 NI |
2409 | GPIO_GFN(EX_WAIT0_A), |
2410 | GPIO_GFN(WE1x), | |
2411 | GPIO_GFN(WE0x), | |
2412 | GPIO_GFN(RD_WRx), | |
2413 | GPIO_GFN(RDx), | |
2414 | GPIO_GFN(BSx), | |
2415 | GPIO_GFN(CS1x_A26), | |
2416 | GPIO_GFN(CS0x), | |
2417 | GPIO_GFN(A19), | |
2418 | GPIO_GFN(A18), | |
2419 | GPIO_GFN(A17), | |
2420 | GPIO_GFN(A16), | |
2421 | GPIO_GFN(A15), | |
2422 | GPIO_GFN(A14), | |
2423 | GPIO_GFN(A13), | |
2424 | GPIO_GFN(A12), | |
2425 | GPIO_GFN(A11), | |
2426 | GPIO_GFN(A10), | |
2427 | GPIO_GFN(A9), | |
2428 | GPIO_GFN(A8), | |
2429 | GPIO_GFN(A7), | |
2430 | GPIO_GFN(A6), | |
2431 | GPIO_GFN(A5), | |
2432 | GPIO_GFN(A4), | |
2433 | GPIO_GFN(A3), | |
2434 | GPIO_GFN(A2), | |
2435 | GPIO_GFN(A1), | |
2436 | GPIO_GFN(A0), | |
2437 | ||
2438 | /* GPSR2 */ | |
2439 | GPIO_GFN(AVB_AVTP_CAPTURE_A), | |
2440 | GPIO_GFN(AVB_AVTP_MATCH_A), | |
2441 | GPIO_GFN(AVB_LINK), | |
2442 | GPIO_GFN(AVB_PHY_INT), | |
2443 | GPIO_GFN(AVB_MAGIC), | |
2444 | GPIO_GFN(AVB_MDC), | |
2445 | GPIO_GFN(PWM2_A), | |
2446 | GPIO_GFN(PWM1_A), | |
2447 | GPIO_GFN(PWM0), | |
2448 | GPIO_GFN(IRQ5), | |
2449 | GPIO_GFN(IRQ4), | |
2450 | GPIO_GFN(IRQ3), | |
2451 | GPIO_GFN(IRQ2), | |
2452 | GPIO_GFN(IRQ1), | |
2453 | GPIO_GFN(IRQ0), | |
2454 | ||
2455 | /* GPSR3 */ | |
2456 | GPIO_GFN(SD1_WP), | |
2457 | GPIO_GFN(SD1_CD), | |
2458 | GPIO_GFN(SD0_WP), | |
2459 | GPIO_GFN(SD0_CD), | |
2460 | GPIO_GFN(SD1_DAT3), | |
2461 | GPIO_GFN(SD1_DAT2), | |
2462 | GPIO_GFN(SD1_DAT1), | |
2463 | GPIO_GFN(SD1_DAT0), | |
2464 | GPIO_GFN(SD1_CMD), | |
2465 | GPIO_GFN(SD1_CLK), | |
2466 | GPIO_GFN(SD0_DAT3), | |
2467 | GPIO_GFN(SD0_DAT2), | |
2468 | GPIO_GFN(SD0_DAT1), | |
2469 | GPIO_GFN(SD0_DAT0), | |
2470 | GPIO_GFN(SD0_CMD), | |
2471 | GPIO_GFN(SD0_CLK), | |
2472 | ||
2473 | /* GPSR4 */ | |
0dfc2392 | 2474 | GPIO_GFN(SD3_DS), |
ee8f0cb3 NI |
2475 | GPIO_GFN(SD3_DAT7), |
2476 | GPIO_GFN(SD3_DAT6), | |
2477 | GPIO_GFN(SD3_DAT5), | |
2478 | GPIO_GFN(SD3_DAT4), | |
0dfc2392 MV |
2479 | GPIO_GFN(SD3_DAT3), |
2480 | GPIO_GFN(SD3_DAT2), | |
2481 | GPIO_GFN(SD3_DAT1), | |
2482 | GPIO_GFN(SD3_DAT0), | |
2483 | GPIO_GFN(SD3_CMD), | |
2484 | GPIO_GFN(SD3_CLK), | |
ee8f0cb3 NI |
2485 | GPIO_GFN(SD2_DS), |
2486 | GPIO_GFN(SD2_DAT3), | |
2487 | GPIO_GFN(SD2_DAT2), | |
2488 | GPIO_GFN(SD2_DAT1), | |
2489 | GPIO_GFN(SD2_DAT0), | |
0dfc2392 | 2490 | GPIO_GFN(SD2_CMD), |
ee8f0cb3 NI |
2491 | GPIO_GFN(SD2_CLK), |
2492 | ||
2493 | /* GPSR5 */ | |
2494 | GPIO_GFN(MLB_DAT), | |
2495 | GPIO_GFN(MLB_SIG), | |
2496 | GPIO_GFN(MLB_CLK), | |
2497 | GPIO_FN(MSIOF0_RXD), | |
2498 | GPIO_GFN(MSIOF0_SS2), | |
2499 | GPIO_FN(MSIOF0_TXD), | |
2500 | GPIO_GFN(MSIOF0_SS1), | |
2501 | GPIO_GFN(MSIOF0_SYNC), | |
2502 | GPIO_FN(MSIOF0_SCK), | |
2503 | GPIO_GFN(HRTS0x), | |
2504 | GPIO_GFN(HCTS0x), | |
2505 | GPIO_GFN(HTX0), | |
2506 | GPIO_GFN(HRX0), | |
2507 | GPIO_GFN(HSCK0), | |
2508 | GPIO_GFN(RX2_A), | |
2509 | GPIO_GFN(TX2_A), | |
2510 | GPIO_GFN(SCK2), | |
2511 | GPIO_GFN(RTS1x_TANS), | |
2512 | GPIO_GFN(CTS1x), | |
2513 | GPIO_GFN(TX1_A), | |
2514 | GPIO_GFN(RX1_A), | |
2515 | GPIO_GFN(RTS0x_TANS), | |
2516 | GPIO_GFN(CTS0x), | |
2517 | GPIO_GFN(TX0), | |
2518 | GPIO_GFN(RX0), | |
2519 | GPIO_GFN(SCK0), | |
2520 | ||
2521 | /* GPSR6 */ | |
0dfc2392 MV |
2522 | GPIO_GFN(USB3_OVC), |
2523 | GPIO_GFN(USB3_PWEN), | |
ee8f0cb3 NI |
2524 | GPIO_GFN(USB30_OVC), |
2525 | GPIO_GFN(USB30_PWEN), | |
2526 | GPIO_GFN(USB1_OVC), | |
2527 | GPIO_GFN(USB1_PWEN), | |
2528 | GPIO_GFN(USB0_OVC), | |
2529 | GPIO_GFN(USB0_PWEN), | |
2530 | GPIO_GFN(AUDIO_CLKB_B), | |
2531 | GPIO_GFN(AUDIO_CLKA_A), | |
2532 | GPIO_GFN(SSI_SDATA9_A), | |
2533 | GPIO_GFN(SSI_SDATA8), | |
2534 | GPIO_GFN(SSI_SDATA7), | |
2535 | GPIO_GFN(SSI_WS78), | |
2536 | GPIO_GFN(SSI_SCK78), | |
2537 | GPIO_GFN(SSI_SDATA6), | |
2538 | GPIO_GFN(SSI_WS6), | |
2539 | GPIO_GFN(SSI_SCK6), | |
2540 | GPIO_FN(SSI_SDATA5), | |
2541 | GPIO_FN(SSI_WS5), | |
2542 | GPIO_FN(SSI_SCK5), | |
2543 | GPIO_GFN(SSI_SDATA4), | |
2544 | GPIO_GFN(SSI_WS4), | |
2545 | GPIO_GFN(SSI_SCK4), | |
2546 | GPIO_GFN(SSI_SDATA3), | |
2547 | GPIO_GFN(SSI_WS34), | |
2548 | GPIO_GFN(SSI_SCK34), | |
2549 | GPIO_GFN(SSI_SDATA2_A), | |
2550 | GPIO_GFN(SSI_SDATA1_A), | |
2551 | GPIO_GFN(SSI_SDATA0), | |
0dfc2392 MV |
2552 | GPIO_GFN(SSI_WS01239), |
2553 | GPIO_GFN(SSI_SCK01239), | |
ee8f0cb3 NI |
2554 | |
2555 | /* GPSR7 */ | |
2556 | GPIO_FN(HDMI1_CEC), | |
2557 | GPIO_FN(HDMI0_CEC), | |
2558 | GPIO_FN(AVS2), | |
2559 | GPIO_FN(AVS1), | |
2560 | ||
2561 | /* IPSR0 */ | |
2562 | GPIO_IFN(AVB_MDC), | |
2563 | GPIO_FN(MSIOF2_SS2_C), | |
2564 | GPIO_IFN(AVB_MAGIC), | |
0dfc2392 | 2565 | GPIO_FN(MSIOF2_SS1_C), |
ee8f0cb3 NI |
2566 | GPIO_FN(SCK4_A), |
2567 | GPIO_IFN(AVB_PHY_INT), | |
2568 | GPIO_FN(MSIOF2_SYNC_C), | |
2569 | GPIO_FN(RX4_A), | |
2570 | GPIO_IFN(AVB_LINK), | |
2571 | GPIO_FN(MSIOF2_SCK_C), | |
2572 | GPIO_FN(TX4_A), | |
2573 | GPIO_IFN(AVB_AVTP_MATCH_A), | |
2574 | GPIO_FN(MSIOF2_RXD_C), | |
2575 | GPIO_FN(CTS4x_A), | |
0dfc2392 | 2576 | GPIO_FN(FSCLKST2x_A), |
ee8f0cb3 NI |
2577 | GPIO_IFN(AVB_AVTP_CAPTURE_A), |
2578 | GPIO_FN(MSIOF2_TXD_C), | |
2579 | GPIO_FN(RTS4x_TANS_A), | |
2580 | GPIO_IFN(IRQ0), | |
2581 | GPIO_FN(QPOLB), | |
2582 | GPIO_FN(DU_CDE), | |
2583 | GPIO_FN(VI4_DATA0_B), | |
2584 | GPIO_FN(CAN0_TX_B), | |
2585 | GPIO_FN(CANFD0_TX_B), | |
0dfc2392 | 2586 | GPIO_FN(MSIOF3_SS2_E), |
ee8f0cb3 NI |
2587 | GPIO_IFN(IRQ1), |
2588 | GPIO_FN(QPOLA), | |
2589 | GPIO_FN(DU_DISP), | |
2590 | GPIO_FN(VI4_DATA1_B), | |
2591 | GPIO_FN(CAN0_RX_B), | |
2592 | GPIO_FN(CANFD0_RX_B), | |
0dfc2392 | 2593 | GPIO_FN(MSIOF3_SS1_E), |
ee8f0cb3 NI |
2594 | |
2595 | /* IPSR1 */ | |
2596 | GPIO_IFN(IRQ2), | |
2597 | GPIO_FN(QCPV_QDE), | |
2598 | GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE), | |
2599 | GPIO_FN(VI4_DATA2_B), | |
0dfc2392 | 2600 | GPIO_FN(MSIOF3_SYNC_E), |
ee8f0cb3 NI |
2601 | GPIO_FN(PWM3_B), |
2602 | GPIO_IFN(IRQ3), | |
2603 | GPIO_FN(QSTVB_QVE), | |
ee8f0cb3 NI |
2604 | GPIO_FN(DU_DOTCLKOUT1), |
2605 | GPIO_FN(VI4_DATA3_B), | |
0dfc2392 | 2606 | GPIO_FN(MSIOF3_SCK_E), |
ee8f0cb3 NI |
2607 | GPIO_FN(PWM4_B), |
2608 | GPIO_IFN(IRQ4), | |
2609 | GPIO_FN(QSTH_QHS), | |
ee8f0cb3 NI |
2610 | GPIO_FN(DU_EXHSYNC_DU_HSYNC), |
2611 | GPIO_FN(VI4_DATA4_B), | |
0dfc2392 | 2612 | GPIO_FN(MSIOF3_RXD_E), |
ee8f0cb3 NI |
2613 | GPIO_FN(PWM5_B), |
2614 | GPIO_IFN(IRQ5), | |
2615 | GPIO_FN(QSTB_QHE), | |
ee8f0cb3 NI |
2616 | GPIO_FN(DU_EXVSYNC_DU_VSYNC), |
2617 | GPIO_FN(VI4_DATA5_B), | |
0dfc2392 MV |
2618 | GPIO_FN(FSCLKST2x_B), |
2619 | GPIO_FN(MSIOF3_TXD_E), | |
ee8f0cb3 NI |
2620 | GPIO_FN(PWM6_B), |
2621 | GPIO_IFN(PWM0), | |
2622 | GPIO_FN(AVB_AVTP_PPS), | |
ee8f0cb3 NI |
2623 | GPIO_FN(VI4_DATA6_B), |
2624 | GPIO_FN(IECLK_B), | |
2625 | GPIO_IFN(PWM1_A), | |
ee8f0cb3 NI |
2626 | GPIO_FN(HRX3_D), |
2627 | GPIO_FN(VI4_DATA7_B), | |
2628 | GPIO_FN(IERX_B), | |
2629 | GPIO_IFN(PWM2_A), | |
ee8f0cb3 NI |
2630 | GPIO_FN(HTX3_D), |
2631 | GPIO_FN(IETX_B), | |
2632 | GPIO_IFN(A0), | |
2633 | GPIO_FN(LCDOUT16), | |
2634 | GPIO_FN(MSIOF3_SYNC_B), | |
2635 | GPIO_FN(VI4_DATA8), | |
2636 | GPIO_FN(DU_DB0), | |
2637 | GPIO_FN(PWM3_A), | |
2638 | ||
2639 | /* IPSR2 */ | |
2640 | GPIO_IFN(A1), | |
2641 | GPIO_FN(LCDOUT17), | |
2642 | GPIO_FN(MSIOF3_TXD_B), | |
2643 | GPIO_FN(VI4_DATA9), | |
2644 | GPIO_FN(DU_DB1), | |
2645 | GPIO_FN(PWM4_A), | |
2646 | GPIO_IFN(A2), | |
2647 | GPIO_FN(LCDOUT18), | |
2648 | GPIO_FN(MSIOF3_SCK_B), | |
2649 | GPIO_FN(VI4_DATA10), | |
2650 | GPIO_FN(DU_DB2), | |
2651 | GPIO_FN(PWM5_A), | |
2652 | GPIO_IFN(A3), | |
2653 | GPIO_FN(LCDOUT19), | |
2654 | GPIO_FN(MSIOF3_RXD_B), | |
2655 | GPIO_FN(VI4_DATA11), | |
2656 | GPIO_FN(DU_DB3), | |
2657 | GPIO_FN(PWM6_A), | |
2658 | GPIO_IFN(A4), | |
2659 | GPIO_FN(LCDOUT20), | |
2660 | GPIO_FN(MSIOF3_SS1_B), | |
2661 | GPIO_FN(VI4_DATA12), | |
2662 | GPIO_FN(VI5_DATA12), | |
2663 | GPIO_FN(DU_DB4), | |
2664 | GPIO_IFN(A5), | |
2665 | GPIO_FN(LCDOUT21), | |
2666 | GPIO_FN(MSIOF3_SS2_B), | |
2667 | GPIO_FN(SCK4_B), | |
2668 | GPIO_FN(VI4_DATA13), | |
2669 | GPIO_FN(VI5_DATA13), | |
2670 | GPIO_FN(DU_DB5), | |
2671 | GPIO_IFN(A6), | |
2672 | GPIO_FN(LCDOUT22), | |
2673 | GPIO_FN(MSIOF2_SS1_A), | |
2674 | GPIO_FN(RX4_B), | |
2675 | GPIO_FN(VI4_DATA14), | |
2676 | GPIO_FN(VI5_DATA14), | |
2677 | GPIO_FN(DU_DB6), | |
2678 | GPIO_IFN(A7), | |
2679 | GPIO_FN(LCDOUT23), | |
2680 | GPIO_FN(MSIOF2_SS2_A), | |
2681 | GPIO_FN(TX4_B), | |
2682 | GPIO_FN(VI4_DATA15), | |
2683 | GPIO_FN(V15_DATA15), | |
2684 | GPIO_FN(DU_DB7), | |
2685 | GPIO_IFN(A8), | |
2686 | GPIO_FN(RX3_B), | |
2687 | GPIO_FN(MSIOF2_SYNC_A), | |
2688 | GPIO_FN(HRX4_B), | |
2689 | GPIO_FN(SDA6_A), | |
2690 | GPIO_FN(AVB_AVTP_MATCH_B), | |
2691 | GPIO_FN(PWM1_B), | |
2692 | ||
2693 | /* IPSR3 */ | |
2694 | GPIO_IFN(A9), | |
2695 | GPIO_FN(MSIOF2_SCK_A), | |
2696 | GPIO_FN(CTS4x_B), | |
2697 | GPIO_FN(VI5_VSYNCx), | |
2698 | GPIO_IFN(A10), | |
2699 | GPIO_FN(MSIOF2_RXD_A), | |
2700 | GPIO_FN(RTS4n_TANS_B), | |
2701 | GPIO_FN(VI5_HSYNCx), | |
2702 | GPIO_IFN(A11), | |
2703 | GPIO_FN(TX3_B), | |
2704 | GPIO_FN(MSIOF2_TXD_A), | |
2705 | GPIO_FN(HTX4_B), | |
2706 | GPIO_FN(HSCK4), | |
2707 | GPIO_FN(VI5_FIELD), | |
2708 | GPIO_FN(SCL6_A), | |
2709 | GPIO_FN(AVB_AVTP_CAPTURE_B), | |
2710 | GPIO_FN(PWM2_B), | |
ee8f0cb3 NI |
2711 | GPIO_IFN(A12), |
2712 | GPIO_FN(LCDOUT12), | |
2713 | GPIO_FN(MSIOF3_SCK_C), | |
2714 | GPIO_FN(HRX4_A), | |
2715 | GPIO_FN(VI5_DATA8), | |
2716 | GPIO_FN(DU_DG4), | |
2717 | GPIO_IFN(A13), | |
2718 | GPIO_FN(LCDOUT13), | |
2719 | GPIO_FN(MSIOF3_SYNC_C), | |
2720 | GPIO_FN(HTX4_A), | |
2721 | GPIO_FN(VI5_DATA9), | |
2722 | GPIO_FN(DU_DG5), | |
2723 | GPIO_IFN(A14), | |
2724 | GPIO_FN(LCDOUT14), | |
2725 | GPIO_FN(MSIOF3_RXD_C), | |
2726 | GPIO_FN(HCTS4x), | |
2727 | GPIO_FN(VI5_DATA10), | |
2728 | GPIO_FN(DU_DG6), | |
2729 | GPIO_IFN(A15), | |
2730 | GPIO_FN(LCDOUT15), | |
2731 | GPIO_FN(MSIOF3_TXD_C), | |
2732 | GPIO_FN(HRTS4x), | |
2733 | GPIO_FN(VI5_DATA11), | |
2734 | GPIO_FN(DU_DG7), | |
2735 | GPIO_IFN(A16), | |
2736 | GPIO_FN(LCDOUT8), | |
2737 | GPIO_FN(VI4_FIELD), | |
2738 | GPIO_FN(DU_DG0), | |
2739 | ||
2740 | /* IPSR4 */ | |
2741 | GPIO_IFN(A17), | |
2742 | GPIO_FN(LCDOUT9), | |
2743 | GPIO_FN(VI4_VSYNCx), | |
2744 | GPIO_FN(DU_DG1), | |
2745 | GPIO_IFN(A18), | |
2746 | GPIO_FN(LCDOUT10), | |
2747 | GPIO_FN(VI4_HSYNCx), | |
2748 | GPIO_FN(DU_DG2), | |
2749 | GPIO_IFN(A19), | |
2750 | GPIO_FN(LCDOUT11), | |
2751 | GPIO_FN(VI4_CLKENB), | |
2752 | GPIO_FN(DU_DG3), | |
2753 | GPIO_IFN(CS0x), | |
2754 | GPIO_FN(VI5_CLKENB), | |
2755 | GPIO_IFN(CS1x_A26), | |
2756 | GPIO_FN(VI5_CLK), | |
2757 | GPIO_FN(EX_WAIT0_B), | |
2758 | GPIO_IFN(BSx), | |
2759 | GPIO_FN(QSTVA_QVS), | |
2760 | GPIO_FN(MSIOF3_SCK_D), | |
2761 | GPIO_FN(SCK3), | |
2762 | GPIO_FN(HSCK3), | |
2763 | GPIO_FN(CAN1_TX), | |
2764 | GPIO_FN(CANFD1_TX), | |
2765 | GPIO_FN(IETX_A), | |
2766 | GPIO_IFN(RDx), | |
2767 | GPIO_FN(MSIOF3_SYNC_D), | |
2768 | GPIO_FN(RX3_A), | |
2769 | GPIO_FN(HRX3_A), | |
2770 | GPIO_FN(CAN0_TX_A), | |
2771 | GPIO_FN(CANFD0_TX_A), | |
2772 | GPIO_IFN(RD_WRx), | |
2773 | GPIO_FN(MSIOF3_RXD_D), | |
2774 | GPIO_FN(TX3_A), | |
2775 | GPIO_FN(HTX3_A), | |
2776 | GPIO_FN(CAN0_RX_A), | |
2777 | GPIO_FN(CANFD0_RX_A), | |
2778 | ||
2779 | /* IPSR5 */ | |
2780 | GPIO_IFN(WE0x), | |
2781 | GPIO_FN(MSIIOF3_TXD_D), | |
2782 | GPIO_FN(CTS3x), | |
2783 | GPIO_FN(HCTS3x), | |
2784 | GPIO_FN(SCL6_B), | |
2785 | GPIO_FN(CAN_CLK), | |
2786 | GPIO_FN(IECLK_A), | |
2787 | GPIO_IFN(WE1x), | |
2788 | GPIO_FN(MSIOF3_SS1_D), | |
2789 | GPIO_FN(RTS3x_TANS), | |
2790 | GPIO_FN(HRTS3x), | |
2791 | GPIO_FN(SDA6_B), | |
2792 | GPIO_FN(CAN1_RX), | |
2793 | GPIO_FN(CANFD1_RX), | |
2794 | GPIO_FN(IERX_A), | |
2795 | GPIO_IFN(EX_WAIT0_A), | |
2796 | GPIO_FN(QCLK), | |
2797 | GPIO_FN(VI4_CLK), | |
2798 | GPIO_FN(DU_DOTCLKOUT0), | |
2799 | GPIO_IFN(D0), | |
2800 | GPIO_FN(MSIOF2_SS1_B), | |
2801 | GPIO_FN(MSIOF3_SCK_A), | |
2802 | GPIO_FN(VI4_DATA16), | |
2803 | GPIO_FN(VI5_DATA0), | |
2804 | GPIO_IFN(D1), | |
2805 | GPIO_FN(MSIOF2_SS2_B), | |
2806 | GPIO_FN(MSIOF3_SYNC_A), | |
2807 | GPIO_FN(VI4_DATA17), | |
2808 | GPIO_FN(VI5_DATA1), | |
2809 | GPIO_IFN(D2), | |
2810 | GPIO_FN(MSIOF3_RXD_A), | |
2811 | GPIO_FN(VI4_DATA18), | |
2812 | GPIO_FN(VI5_DATA2), | |
2813 | GPIO_IFN(D3), | |
2814 | GPIO_FN(MSIOF3_TXD_A), | |
2815 | GPIO_FN(VI4_DATA19), | |
2816 | GPIO_FN(VI5_DATA3), | |
2817 | GPIO_IFN(D4), | |
2818 | GPIO_FN(MSIOF2_SCK_B), | |
2819 | GPIO_FN(VI4_DATA20), | |
2820 | GPIO_FN(VI5_DATA4), | |
2821 | ||
2822 | /* IPSR6 */ | |
2823 | GPIO_IFN(D5), | |
2824 | GPIO_FN(MSIOF2_SYNC_B), | |
2825 | GPIO_FN(VI4_DATA21), | |
2826 | GPIO_FN(VI5_DATA5), | |
2827 | GPIO_IFN(D6), | |
2828 | GPIO_FN(MSIOF2_RXD_B), | |
2829 | GPIO_FN(VI4_DATA22), | |
2830 | GPIO_FN(VI5_DATA6), | |
2831 | GPIO_IFN(D7), | |
2832 | GPIO_FN(MSIOF2_TXD_B), | |
2833 | GPIO_FN(VI4_DATA23), | |
2834 | GPIO_FN(VI5_DATA7), | |
2835 | GPIO_IFN(D8), | |
2836 | GPIO_FN(LCDOUT0), | |
2837 | GPIO_FN(MSIOF2_SCK_D), | |
2838 | GPIO_FN(SCK4_C), | |
2839 | GPIO_FN(VI4_DATA0_A), | |
2840 | GPIO_FN(DU_DR0), | |
2841 | GPIO_IFN(D9), | |
2842 | GPIO_FN(LCDOUT1), | |
2843 | GPIO_FN(MSIOF2_SYNC_D), | |
2844 | GPIO_FN(VI4_DATA1_A), | |
2845 | GPIO_FN(DU_DR1), | |
2846 | GPIO_IFN(D10), | |
2847 | GPIO_FN(LCDOUT2), | |
2848 | GPIO_FN(MSIOF2_RXD_D), | |
2849 | GPIO_FN(HRX3_B), | |
2850 | GPIO_FN(VI4_DATA2_A), | |
2851 | GPIO_FN(CTS4x_C), | |
2852 | GPIO_FN(DU_DR2), | |
2853 | GPIO_IFN(D11), | |
2854 | GPIO_FN(LCDOUT3), | |
2855 | GPIO_FN(MSIOF2_TXD_D), | |
2856 | GPIO_FN(HTX3_B), | |
2857 | GPIO_FN(VI4_DATA3_A), | |
2858 | GPIO_FN(RTS4x_TANS_C), | |
2859 | GPIO_FN(DU_DR3), | |
2860 | GPIO_IFN(D12), | |
2861 | GPIO_FN(LCDOUT4), | |
2862 | GPIO_FN(MSIOF2_SS1_D), | |
2863 | GPIO_FN(RX4_C), | |
2864 | GPIO_FN(VI4_DATA4_A), | |
2865 | GPIO_FN(DU_DR4), | |
2866 | ||
2867 | /* IPSR7 */ | |
2868 | GPIO_IFN(D13), | |
2869 | GPIO_FN(LCDOUT5), | |
2870 | GPIO_FN(MSIOF2_SS2_D), | |
2871 | GPIO_FN(TX4_C), | |
2872 | GPIO_FN(VI4_DATA5_A), | |
2873 | GPIO_FN(DU_DR5), | |
2874 | GPIO_IFN(D14), | |
2875 | GPIO_FN(LCDOUT6), | |
2876 | GPIO_FN(MSIOF3_SS1_A), | |
2877 | GPIO_FN(HRX3_C), | |
2878 | GPIO_FN(VI4_DATA6_A), | |
2879 | GPIO_FN(DU_DR6), | |
2880 | GPIO_FN(SCL6_C), | |
2881 | GPIO_IFN(D15), | |
2882 | GPIO_FN(LCDOUT7), | |
2883 | GPIO_FN(MSIOF3_SS2_A), | |
2884 | GPIO_FN(HTX3_C), | |
2885 | GPIO_FN(VI4_DATA7_A), | |
2886 | GPIO_FN(DU_DR7), | |
2887 | GPIO_FN(SDA6_C), | |
2888 | GPIO_FN(FSCLKST), | |
2889 | GPIO_IFN(SD0_CLK), | |
2890 | GPIO_FN(MSIOF1_SCK_E), | |
2891 | GPIO_FN(STP_OPWM_0_B), | |
2892 | GPIO_IFN(SD0_CMD), | |
2893 | GPIO_FN(MSIOF1_SYNC_E), | |
2894 | GPIO_FN(STP_IVCXO27_0_B), | |
2895 | GPIO_IFN(SD0_DAT0), | |
2896 | GPIO_FN(MSIOF1_RXD_E), | |
2897 | GPIO_FN(TS_SCK0_B), | |
2898 | GPIO_FN(STP_ISCLK_0_B), | |
2899 | GPIO_IFN(SD0_DAT1), | |
2900 | GPIO_FN(MSIOF1_TXD_E), | |
2901 | GPIO_FN(TS_SPSYNC0_B), | |
2902 | GPIO_FN(STP_ISSYNC_0_B), | |
2903 | ||
2904 | /* IPSR8 */ | |
2905 | GPIO_IFN(SD0_DAT2), | |
2906 | GPIO_FN(MSIOF1_SS1_E), | |
2907 | GPIO_FN(TS_SDAT0_B), | |
2908 | GPIO_FN(STP_ISD_0_B), | |
2909 | GPIO_IFN(SD0_DAT3), | |
2910 | GPIO_FN(MSIOF1_SS2_E), | |
2911 | GPIO_FN(TS_SDEN0_B), | |
2912 | GPIO_FN(STP_ISEN_0_B), | |
2913 | GPIO_IFN(SD1_CLK), | |
2914 | GPIO_FN(MSIOF1_SCK_G), | |
2915 | GPIO_FN(SIM0_CLK_A), | |
ee8f0cb3 NI |
2916 | GPIO_IFN(SD1_CMD), |
2917 | GPIO_FN(MSIOF1_SYNC_G), | |
0dfc2392 | 2918 | GPIO_FN(NFCEx_B), |
ee8f0cb3 NI |
2919 | GPIO_FN(SIM0_D_A), |
2920 | GPIO_FN(STP_IVCXO27_1_B), | |
ee8f0cb3 NI |
2921 | GPIO_IFN(SD1_DAT0), |
2922 | GPIO_FN(SD2_DAT4), | |
2923 | GPIO_FN(MSIOF1_RXD_G), | |
0dfc2392 | 2924 | GPIO_FN(NFWPx_B), |
ee8f0cb3 NI |
2925 | GPIO_FN(TS_SCK1_B), |
2926 | GPIO_FN(STP_ISCLK_1_B), | |
ee8f0cb3 NI |
2927 | GPIO_IFN(SD1_DAT1), |
2928 | GPIO_FN(SD2_DAT5), | |
2929 | GPIO_FN(MSIOF1_TXD_G), | |
0dfc2392 | 2930 | GPIO_FN(NFDATA14_B), |
ee8f0cb3 NI |
2931 | GPIO_FN(TS_SPSYNC1_B), |
2932 | GPIO_FN(STP_ISSYNC_1_B), | |
ee8f0cb3 NI |
2933 | GPIO_IFN(SD1_DAT2), |
2934 | GPIO_FN(SD2_DAT6), | |
2935 | GPIO_FN(MSIOF1_SS1_G), | |
0dfc2392 | 2936 | GPIO_FN(NFDATA15_B), |
ee8f0cb3 NI |
2937 | GPIO_FN(TS_SDAT1_B), |
2938 | GPIO_FN(STP_IOD_1_B), | |
2939 | GPIO_IFN(SD1_DAT3), | |
2940 | GPIO_FN(SD2_DAT7), | |
2941 | GPIO_FN(MSIOF1_SS2_G), | |
0dfc2392 | 2942 | GPIO_FN(NFRBx_B), |
ee8f0cb3 NI |
2943 | GPIO_FN(TS_SDEN1_B), |
2944 | GPIO_FN(STP_ISEN_1_B), | |
2945 | ||
2946 | /* IPSR9 */ | |
2947 | GPIO_IFN(SD2_CLK), | |
0dfc2392 MV |
2948 | GPIO_FN(NFDATA8), |
2949 | GPIO_IFN(SD2_CMD), | |
2950 | GPIO_FN(NFDATA9), | |
ee8f0cb3 | 2951 | GPIO_IFN(SD2_DAT0), |
0dfc2392 | 2952 | GPIO_FN(NFDATA10), |
ee8f0cb3 | 2953 | GPIO_IFN(SD2_DAT1), |
0dfc2392 | 2954 | GPIO_FN(NFDATA11), |
ee8f0cb3 | 2955 | GPIO_IFN(SD2_DAT2), |
0dfc2392 | 2956 | GPIO_FN(NFDATA12), |
ee8f0cb3 | 2957 | GPIO_IFN(SD2_DAT3), |
0dfc2392 | 2958 | GPIO_FN(NFDATA13), |
ee8f0cb3 | 2959 | GPIO_IFN(SD2_DS), |
0dfc2392 | 2960 | GPIO_FN(NFALE), |
ee8f0cb3 | 2961 | GPIO_FN(SATA_DEVSLP_B), |
0dfc2392 MV |
2962 | GPIO_IFN(SD3_CLK), |
2963 | GPIO_FN(NFWEx), | |
2964 | ||
2965 | /* IPSR10 */ | |
2966 | GPIO_IFN(SD3_CMD), | |
2967 | GPIO_FN(NFREx), | |
2968 | GPIO_IFN(SD3_DAT0), | |
2969 | GPIO_FN(NFDATA0), | |
2970 | GPIO_IFN(SD3_DAT1), | |
2971 | GPIO_FN(NFDATA1), | |
2972 | GPIO_IFN(SD3_DAT2), | |
2973 | GPIO_FN(NFDATA2), | |
2974 | GPIO_IFN(SD3_DAT3), | |
2975 | GPIO_FN(NFDATA3), | |
ee8f0cb3 NI |
2976 | GPIO_IFN(SD3_DAT4), |
2977 | GPIO_FN(SD2_CD_A), | |
0dfc2392 | 2978 | GPIO_FN(NFDATA4), |
ee8f0cb3 NI |
2979 | GPIO_IFN(SD3_DAT5), |
2980 | GPIO_FN(SD2_WP_A), | |
0dfc2392 | 2981 | GPIO_FN(NFDATA5), |
ee8f0cb3 NI |
2982 | GPIO_IFN(SD3_DAT6), |
2983 | GPIO_FN(SD3_CD), | |
0dfc2392 MV |
2984 | GPIO_FN(NFDATA6), |
2985 | ||
2986 | /* IPSR11 */ | |
ee8f0cb3 NI |
2987 | GPIO_IFN(SD3_DAT7), |
2988 | GPIO_FN(SD3_WP), | |
0dfc2392 MV |
2989 | GPIO_FN(NFDATA7), |
2990 | GPIO_IFN(SD3_DS), | |
2991 | GPIO_FN(NFCLE), | |
ee8f0cb3 | 2992 | GPIO_IFN(SD0_CD), |
0dfc2392 | 2993 | GPIO_FN(NFDATA14_A), |
ee8f0cb3 NI |
2994 | GPIO_FN(SCL2_B), |
2995 | GPIO_FN(SIM0_RST_A), | |
2996 | GPIO_IFN(SD0_WP), | |
0dfc2392 | 2997 | GPIO_FN(NFDATA15_A), |
ee8f0cb3 NI |
2998 | GPIO_FN(SDA2_B), |
2999 | GPIO_IFN(SD1_CD), | |
0dfc2392 | 3000 | GPIO_FN(NFRBx_A), |
ee8f0cb3 NI |
3001 | GPIO_FN(SIM0_CLK_B), |
3002 | GPIO_IFN(SD1_WP), | |
0dfc2392 | 3003 | GPIO_FN(NFCEx_A), |
ee8f0cb3 NI |
3004 | GPIO_FN(SIM0_D_B), |
3005 | GPIO_IFN(SCK0), | |
3006 | GPIO_FN(HSCK1_B), | |
3007 | GPIO_FN(MSIOF1_SS2_B), | |
3008 | GPIO_FN(AUDIO_CLKC_B), | |
3009 | GPIO_FN(SDA2_A), | |
3010 | GPIO_FN(SIM0_RST_B), | |
0dfc2392 | 3011 | GPIO_FN(STP_OPWM_0_C), |
ee8f0cb3 NI |
3012 | GPIO_FN(RIF0_CLK_B), |
3013 | GPIO_FN(ADICHS2), | |
0dfc2392 | 3014 | GPIO_FN(SCK5_B), |
ee8f0cb3 NI |
3015 | GPIO_IFN(RX0), |
3016 | GPIO_FN(HRX1_B), | |
3017 | GPIO_FN(TS_SCK0_C), | |
3018 | GPIO_FN(STP_ISCLK_0_C), | |
3019 | GPIO_FN(RIF0_D0_B), | |
3020 | ||
0dfc2392 | 3021 | /* IPSR12 */ |
ee8f0cb3 NI |
3022 | GPIO_IFN(TX0), |
3023 | GPIO_FN(HTX1_B), | |
3024 | GPIO_FN(TS_SPSYNC0_C), | |
3025 | GPIO_FN(STP_ISSYNC_0_C), | |
3026 | GPIO_FN(RIF0_D1_B), | |
3027 | GPIO_IFN(CTS0x), | |
3028 | GPIO_FN(HCTS1x_B), | |
3029 | GPIO_FN(MSIOF1_SYNC_B), | |
3030 | GPIO_FN(TS_SPSYNC1_C), | |
3031 | GPIO_FN(STP_ISSYNC_1_C), | |
3032 | GPIO_FN(RIF1_SYNC_B), | |
3033 | GPIO_FN(AUDIO_CLKOUT_C), | |
3034 | GPIO_FN(ADICS_SAMP), | |
3035 | GPIO_IFN(RTS0x_TANS), | |
3036 | GPIO_FN(HRTS1x_B), | |
3037 | GPIO_FN(MSIOF1_SS1_B), | |
3038 | GPIO_FN(AUDIO_CLKA_B), | |
3039 | GPIO_FN(SCL2_A), | |
3040 | GPIO_FN(STP_IVCXO27_1_C), | |
3041 | GPIO_FN(RIF0_SYNC_B), | |
3042 | GPIO_FN(ADICHS1), | |
3043 | GPIO_IFN(RX1_A), | |
3044 | GPIO_FN(HRX1_A), | |
3045 | GPIO_FN(TS_SDAT0_C), | |
0dfc2392 | 3046 | GPIO_FN(STP_ISD_0_C), |
ee8f0cb3 NI |
3047 | GPIO_FN(RIF1_CLK_C), |
3048 | GPIO_IFN(TX1_A), | |
3049 | GPIO_FN(HTX1_A), | |
3050 | GPIO_FN(TS_SDEN0_C), | |
3051 | GPIO_FN(STP_ISEN_0_C), | |
3052 | GPIO_FN(RIF1_D0_C), | |
3053 | GPIO_IFN(CTS1x), | |
3054 | GPIO_FN(HCTS1x_A), | |
3055 | GPIO_FN(MSIOF1_RXD_B), | |
3056 | GPIO_FN(TS_SDEN1_C), | |
3057 | GPIO_FN(STP_ISEN_1_C), | |
3058 | GPIO_FN(RIF1_D0_B), | |
3059 | GPIO_FN(ADIDATA), | |
3060 | GPIO_IFN(RTS1x_TANS), | |
3061 | GPIO_FN(HRTS1x_A), | |
3062 | GPIO_FN(MSIOF1_TXD_B), | |
3063 | GPIO_FN(TS_SDAT1_C), | |
3064 | GPIO_FN(STP_ISD_1_C), | |
3065 | GPIO_FN(RIF1_D1_B), | |
3066 | GPIO_FN(ADICHS0), | |
3067 | GPIO_IFN(SCK2), | |
3068 | GPIO_FN(SCIF_CLK_B), | |
3069 | GPIO_FN(MSIOF1_SCK_B), | |
3070 | GPIO_FN(TS_SCK1_C), | |
3071 | GPIO_FN(STP_ISCLK_1_C), | |
3072 | GPIO_FN(RIF1_CLK_B), | |
3073 | GPIO_FN(ADICLK), | |
3074 | ||
0dfc2392 | 3075 | /* IPSR13 */ |
ee8f0cb3 NI |
3076 | GPIO_IFN(TX2_A), |
3077 | GPIO_FN(SD2_CD_B), | |
3078 | GPIO_FN(SCL1_A), | |
ee8f0cb3 NI |
3079 | GPIO_FN(FMCLK_A), |
3080 | GPIO_FN(RIF1_D1_C), | |
0dfc2392 | 3081 | GPIO_FN(FSO_CFE_0x), |
ee8f0cb3 NI |
3082 | GPIO_IFN(RX2_A), |
3083 | GPIO_FN(SD2_WP_B), | |
3084 | GPIO_FN(SDA1_A), | |
0dfc2392 | 3085 | GPIO_FN(FMIN_A), |
ee8f0cb3 | 3086 | GPIO_FN(RIF1_SYNC_C), |
0dfc2392 | 3087 | GPIO_FN(FSO_CFE_1x), |
ee8f0cb3 NI |
3088 | GPIO_IFN(HSCK0), |
3089 | GPIO_FN(MSIOF1_SCK_D), | |
3090 | GPIO_FN(AUDIO_CLKB_A), | |
3091 | GPIO_FN(SSI_SDATA1_B), | |
3092 | GPIO_FN(TS_SCK0_D), | |
3093 | GPIO_FN(STP_ISCLK_0_D), | |
3094 | GPIO_FN(RIF0_CLK_C), | |
0dfc2392 | 3095 | GPIO_FN(RX5_B), |
ee8f0cb3 NI |
3096 | GPIO_IFN(HRX0), |
3097 | GPIO_FN(MSIOF1_RXD_D), | |
0dfc2392 | 3098 | GPIO_FN(SSI_SDATA2_B), |
ee8f0cb3 NI |
3099 | GPIO_FN(TS_SDEN0_D), |
3100 | GPIO_FN(STP_ISEN_0_D), | |
3101 | GPIO_FN(RIF0_D0_C), | |
ee8f0cb3 NI |
3102 | GPIO_IFN(HTX0), |
3103 | GPIO_FN(MSIOF1_TXD_D), | |
3104 | GPIO_FN(SSI_SDATA9_B), | |
3105 | GPIO_FN(TS_SDAT0_D), | |
3106 | GPIO_FN(STP_ISD_0_D), | |
3107 | GPIO_FN(RIF0_D1_C), | |
ee8f0cb3 NI |
3108 | GPIO_IFN(HCTS0x), |
3109 | GPIO_FN(RX2_B), | |
3110 | GPIO_FN(MSIOF1_SYNC_D), | |
3111 | GPIO_FN(SSI_SCK9_A), | |
3112 | GPIO_FN(TS_SPSYNC0_D), | |
3113 | GPIO_FN(STP_ISSYNC_0_D), | |
3114 | GPIO_FN(RIF0_SYNC_C), | |
3115 | GPIO_FN(AUDIO_CLKOUT1_A), | |
ee8f0cb3 NI |
3116 | GPIO_IFN(HRTS0x), |
3117 | GPIO_FN(TX2_B), | |
3118 | GPIO_FN(MSIOF1_SS1_D), | |
3119 | GPIO_FN(SSI_WS9_A), | |
3120 | GPIO_FN(STP_IVCXO27_0_D), | |
3121 | GPIO_FN(BPFCLK_A), | |
3122 | GPIO_FN(AUDIO_CLKOUT2_A), | |
3123 | GPIO_IFN(MSIOF0_SYNC), | |
3124 | GPIO_FN(AUDIO_CLKOUT_A), | |
0dfc2392 MV |
3125 | GPIO_FN(TX5_B), |
3126 | GPIO_FN(BPFCLK_D), | |
ee8f0cb3 | 3127 | |
0dfc2392 | 3128 | /* IPSR14 */ |
ee8f0cb3 | 3129 | GPIO_IFN(MSIOF0_SS1), |
0dfc2392 MV |
3130 | GPIO_FN(RX5_A), |
3131 | GPIO_FN(NFWPx_A), | |
ee8f0cb3 NI |
3132 | GPIO_FN(AUDIO_CLKA_C), |
3133 | GPIO_FN(SSI_SCK2_A), | |
ee8f0cb3 NI |
3134 | GPIO_FN(STP_IVCXO27_0_C), |
3135 | GPIO_FN(AUDIO_CLKOUT3_A), | |
3136 | GPIO_FN(TCLK1_B), | |
3137 | GPIO_IFN(MSIOF0_SS2), | |
0dfc2392 | 3138 | GPIO_FN(TX5_A), |
ee8f0cb3 NI |
3139 | GPIO_FN(MSIOF1_SS2_D), |
3140 | GPIO_FN(AUDIO_CLKC_A), | |
3141 | GPIO_FN(SSI_WS2_A), | |
ee8f0cb3 NI |
3142 | GPIO_FN(STP_OPWM_0_D), |
3143 | GPIO_FN(AUDIO_CLKOUT_D), | |
3144 | GPIO_FN(SPEEDIN_B), | |
3145 | GPIO_IFN(MLB_CLK), | |
3146 | GPIO_FN(MSIOF1_SCK_F), | |
3147 | GPIO_FN(SCL1_B), | |
3148 | GPIO_IFN(MLB_SIG), | |
3149 | GPIO_FN(RX1_B), | |
3150 | GPIO_FN(MSIOF1_SYNC_F), | |
3151 | GPIO_FN(SDA1_B), | |
3152 | GPIO_IFN(MLB_DAT), | |
3153 | GPIO_FN(TX1_B), | |
3154 | GPIO_FN(MSIOF1_RXD_F), | |
0dfc2392 | 3155 | GPIO_IFN(SSI_SCK01239), |
ee8f0cb3 NI |
3156 | GPIO_FN(MSIOF1_TXD_F), |
3157 | GPIO_FN(MOUT0), | |
0dfc2392 | 3158 | GPIO_IFN(SSI_WS01239), |
ee8f0cb3 NI |
3159 | GPIO_FN(MSIOF1_SS1_F), |
3160 | GPIO_FN(MOUT1), | |
3161 | GPIO_IFN(SSI_SDATA0), | |
3162 | GPIO_FN(MSIOF1_SS2_F), | |
3163 | GPIO_FN(MOUT2), | |
3164 | ||
0dfc2392 | 3165 | /* IPSR15 */ |
ee8f0cb3 NI |
3166 | GPIO_IFN(SSI_SDATA1_A), |
3167 | GPIO_FN(MOUT5), | |
3168 | GPIO_IFN(SSI_SDATA2_A), | |
3169 | GPIO_FN(SSI_SCK1_B), | |
3170 | GPIO_FN(MOUT6), | |
3171 | GPIO_IFN(SSI_SCK34), | |
3172 | GPIO_FN(MSIOF1_SS1_A), | |
3173 | GPIO_FN(STP_OPWM_0_A), | |
3174 | GPIO_IFN(SSI_WS34), | |
3175 | GPIO_FN(HCTS2x_A), | |
3176 | GPIO_FN(MSIOF1_SS2_A), | |
3177 | GPIO_FN(STP_IVCXO27_0_A), | |
3178 | GPIO_IFN(SSI_SDATA3), | |
3179 | GPIO_FN(HRTS2x_A), | |
3180 | GPIO_FN(MSIOF1_TXD_A), | |
3181 | GPIO_FN(TS_SCK0_A), | |
3182 | GPIO_FN(STP_ISCLK_0_A), | |
3183 | GPIO_FN(RIF0_D1_A), | |
3184 | GPIO_FN(RIF2_D0_A), | |
3185 | GPIO_IFN(SSI_SCK4), | |
3186 | GPIO_FN(HRX2_A), | |
3187 | GPIO_FN(MSIOF1_SCK_A), | |
3188 | GPIO_FN(TS_SDAT0_A), | |
3189 | GPIO_FN(STP_ISD_0_A), | |
3190 | GPIO_FN(RIF0_CLK_A), | |
3191 | GPIO_FN(RIF2_CLK_A), | |
3192 | GPIO_IFN(SSI_WS4), | |
3193 | GPIO_FN(HTX2_A), | |
3194 | GPIO_FN(MSIOF1_SYNC_A), | |
3195 | GPIO_FN(TS_SDEN0_A), | |
3196 | GPIO_FN(STP_ISEN_0_A), | |
3197 | GPIO_FN(RIF0_SYNC_A), | |
3198 | GPIO_FN(RIF2_SYNC_A), | |
3199 | GPIO_IFN(SSI_SDATA4), | |
3200 | GPIO_FN(HSCK2_A), | |
3201 | GPIO_FN(MSIOF1_RXD_A), | |
3202 | GPIO_FN(TS_SPSYNC0_A), | |
3203 | GPIO_FN(STP_ISSYNC_0_A), | |
3204 | GPIO_FN(RIF0_D0_A), | |
3205 | GPIO_FN(RIF2_D1_A), | |
3206 | ||
0dfc2392 | 3207 | /* IPSR16 */ |
ee8f0cb3 | 3208 | GPIO_IFN(SSI_SCK6), |
ee8f0cb3 | 3209 | GPIO_FN(SIM0_RST_D), |
ee8f0cb3 | 3210 | GPIO_IFN(SSI_WS6), |
ee8f0cb3 NI |
3211 | GPIO_FN(SIM0_D_D), |
3212 | GPIO_IFN(SSI_SDATA6), | |
3213 | GPIO_FN(SIM0_CLK_D), | |
ee8f0cb3 NI |
3214 | GPIO_FN(SATA_DEVSLP_A), |
3215 | GPIO_IFN(SSI_SCK78), | |
3216 | GPIO_FN(HRX2_B), | |
3217 | GPIO_FN(MSIOF1_SCK_C), | |
3218 | GPIO_FN(TS_SCK1_A), | |
3219 | GPIO_FN(STP_ISCLK_1_A), | |
3220 | GPIO_FN(RIF1_CLK_A), | |
3221 | GPIO_FN(RIF3_CLK_A), | |
3222 | GPIO_IFN(SSI_WS78), | |
3223 | GPIO_FN(HTX2_B), | |
3224 | GPIO_FN(MSIOF1_SYNC_C), | |
0dfc2392 | 3225 | GPIO_FN(TS_SDAT1_A), |
ee8f0cb3 NI |
3226 | GPIO_FN(STP_ISD_1_A), |
3227 | GPIO_FN(RIF1_SYNC_A), | |
3228 | GPIO_FN(RIF3_SYNC_A), | |
3229 | GPIO_IFN(SSI_SDATA7), | |
3230 | GPIO_FN(HCTS2x_B), | |
3231 | GPIO_FN(MSIOF1_RXD_C), | |
3232 | GPIO_FN(TS_SDEN1_A), | |
0dfc2392 | 3233 | GPIO_FN(STP_ISEN_1_A), |
ee8f0cb3 NI |
3234 | GPIO_FN(RIF1_D0_A), |
3235 | GPIO_FN(RIF3_D0_A), | |
3236 | GPIO_FN(TCLK2_A), | |
3237 | GPIO_IFN(SSI_SDATA8), | |
3238 | GPIO_FN(HRTS2x_B), | |
3239 | GPIO_FN(MSIOF1_TXD_C), | |
3240 | GPIO_FN(TS_SPSYNC1_A), | |
3241 | GPIO_FN(STP_ISSYNC_1_A), | |
3242 | GPIO_FN(RIF1_D1_A), | |
0dfc2392 | 3243 | GPIO_FN(RIF3_D1_A), |
ee8f0cb3 NI |
3244 | GPIO_IFN(SSI_SDATA9_A), |
3245 | GPIO_FN(HSCK2_B), | |
3246 | GPIO_FN(MSIOF1_SS1_C), | |
3247 | GPIO_FN(HSCK1_A), | |
3248 | GPIO_FN(SSI_WS1_B), | |
3249 | GPIO_FN(SCK1), | |
3250 | GPIO_FN(STP_IVCXO27_1_A), | |
0dfc2392 | 3251 | GPIO_FN(SCK5_A), |
ee8f0cb3 | 3252 | |
0dfc2392 | 3253 | /* IPSR17 */ |
ee8f0cb3 NI |
3254 | GPIO_IFN(AUDIO_CLKA_A), |
3255 | GPIO_FN(CC5_OSCOUT), | |
3256 | GPIO_IFN(AUDIO_CLKB_B), | |
3257 | GPIO_FN(SCIF_CLK_A), | |
ee8f0cb3 NI |
3258 | GPIO_FN(STP_IVCXO27_1_D), |
3259 | GPIO_FN(REMOCON_A), | |
3260 | GPIO_FN(TCLK1_A), | |
ee8f0cb3 NI |
3261 | GPIO_IFN(USB0_PWEN), |
3262 | GPIO_FN(SIM0_RST_C), | |
3263 | GPIO_FN(TS_SCK1_D), | |
3264 | GPIO_FN(STP_ISCLK_1_D), | |
3265 | GPIO_FN(BPFCLK_B), | |
3266 | GPIO_FN(RIF3_CLK_B), | |
0dfc2392 | 3267 | GPIO_FN(HSCK2_C), |
ee8f0cb3 NI |
3268 | GPIO_IFN(USB0_OVC), |
3269 | GPIO_FN(SIM0_D_C), | |
3270 | GPIO_FN(TS_SDAT1_D), | |
3271 | GPIO_FN(STP_ISD_1_D), | |
3272 | GPIO_FN(RIF3_SYNC_B), | |
0dfc2392 | 3273 | GPIO_FN(HRX2_C), |
ee8f0cb3 NI |
3274 | GPIO_IFN(USB1_PWEN), |
3275 | GPIO_FN(SIM0_CLK_C), | |
3276 | GPIO_FN(SSI_SCK1_A), | |
3277 | GPIO_FN(TS_SCK0_E), | |
3278 | GPIO_FN(STP_ISCLK_0_E), | |
3279 | GPIO_FN(FMCLK_B), | |
3280 | GPIO_FN(RIF2_CLK_B), | |
ee8f0cb3 | 3281 | GPIO_FN(SPEEDIN_A), |
0dfc2392 | 3282 | GPIO_FN(HTX2_C), |
ee8f0cb3 NI |
3283 | GPIO_IFN(USB1_OVC), |
3284 | GPIO_FN(MSIOF1_SS2_C), | |
3285 | GPIO_FN(SSI_WS1_A), | |
3286 | GPIO_FN(TS_SDAT0_E), | |
3287 | GPIO_FN(STP_ISD_0_E), | |
3288 | GPIO_FN(FMIN_B), | |
3289 | GPIO_FN(RIF2_SYNC_B), | |
ee8f0cb3 | 3290 | GPIO_FN(REMOCON_B), |
0dfc2392 | 3291 | GPIO_FN(HCTS2x_C), |
ee8f0cb3 NI |
3292 | GPIO_IFN(USB30_PWEN), |
3293 | GPIO_FN(AUDIO_CLKOUT_B), | |
3294 | GPIO_FN(SSI_SCK2_B), | |
3295 | GPIO_FN(TS_SDEN1_D), | |
3296 | GPIO_FN(STP_ISEN_1_D), | |
3297 | GPIO_FN(STP_OPWM_0_E), | |
3298 | GPIO_FN(RIF3_D0_B), | |
ee8f0cb3 NI |
3299 | GPIO_FN(TCLK2_B), |
3300 | GPIO_FN(TPU0TO0), | |
0dfc2392 MV |
3301 | GPIO_FN(BPFCLK_C), |
3302 | GPIO_FN(HRTS2x_C), | |
ee8f0cb3 NI |
3303 | GPIO_IFN(USB30_OVC), |
3304 | GPIO_FN(AUDIO_CLKOUT1_B), | |
3305 | GPIO_FN(SSI_WS2_B), | |
3306 | GPIO_FN(TS_SPSYNC1_D), | |
3307 | GPIO_FN(STP_ISSYNC_1_D), | |
3308 | GPIO_FN(STP_IVCXO27_0_E), | |
3309 | GPIO_FN(RIF3_D1_B), | |
0dfc2392 | 3310 | GPIO_FN(FSO_TOEx), |
ee8f0cb3 | 3311 | GPIO_FN(TPU0TO1), |
0d0915be MV |
3312 | |
3313 | /* IPSR18 */ | |
3314 | GPIO_IFN(USB3_PWEN), | |
3315 | GPIO_FN(AUDIO_CLKOUT2_B), | |
3316 | GPIO_FN(SSI_SCK9_B), | |
3317 | GPIO_FN(TS_SDEN0_E), | |
3318 | GPIO_FN(STP_ISEN_0_E), | |
3319 | GPIO_FN(RIF2_D0_B), | |
3320 | GPIO_FN(TPU0TO2), | |
3321 | GPIO_FN(FMCLK_C), | |
3322 | GPIO_FN(FMCLK_D), | |
3323 | ||
3324 | GPIO_IFN(USB3_OVC), | |
3325 | GPIO_FN(AUDIO_CLKOUT3_B), | |
3326 | GPIO_FN(SSI_WS9_B), | |
3327 | GPIO_FN(TS_SPSYNC0_E), | |
3328 | GPIO_FN(STP_ISSYNC_0_E), | |
3329 | GPIO_FN(RIF2_D1_B), | |
3330 | GPIO_FN(TPU0TO3), | |
3331 | GPIO_FN(FMIN_C), | |
3332 | GPIO_FN(FMIN_D), | |
ee8f0cb3 NI |
3333 | }; |
3334 | ||
3335 | static struct pinmux_cfg_reg pinmux_config_regs[] = { | |
3336 | /* GPSR0(0xE6060100) md[3:1] controls initial value */ | |
3337 | /* md[3:1] .. 0 : 0x0000FFFF */ | |
3338 | /* .. other : 0x00000000 */ | |
3339 | { PINMUX_CFG_REG("GPSR0", 0xE6060100, 32, 1) { | |
3340 | 0, 0, | |
3341 | 0, 0, | |
3342 | 0, 0, | |
3343 | 0, 0, | |
3344 | 0, 0, | |
3345 | 0, 0, | |
3346 | 0, 0, | |
3347 | 0, 0, | |
3348 | ||
3349 | 0, 0, | |
3350 | 0, 0, | |
3351 | 0, 0, | |
3352 | 0, 0, | |
3353 | 0, 0, | |
3354 | 0, 0, | |
3355 | 0, 0, | |
3356 | 0, 0, | |
3357 | ||
3358 | GP_0_15_FN, GFN_D15, | |
3359 | GP_0_14_FN, GFN_D14, | |
3360 | GP_0_13_FN, GFN_D13, | |
3361 | GP_0_12_FN, GFN_D12, | |
3362 | GP_0_11_FN, GFN_D11, | |
3363 | GP_0_10_FN, GFN_D10, | |
3364 | GP_0_9_FN, GFN_D9, | |
3365 | GP_0_8_FN, GFN_D8, | |
3366 | GP_0_7_FN, GFN_D7, | |
3367 | GP_0_6_FN, GFN_D6, | |
3368 | GP_0_5_FN, GFN_D5, | |
3369 | GP_0_4_FN, GFN_D4, | |
3370 | GP_0_3_FN, GFN_D3, | |
3371 | GP_0_2_FN, GFN_D2, | |
3372 | GP_0_1_FN, GFN_D1, | |
3373 | GP_0_0_FN, GFN_D0 } | |
3374 | }, | |
3375 | /* GPSR1(0xE6060104) is md[3:1] controls initial value */ | |
3376 | /* md[3:1] .. 0 : 0x0EFFFFFF */ | |
3377 | /* .. other : 0x00000000 */ | |
3378 | { PINMUX_CFG_REG("GPSR1", 0xE6060104, 32, 1) { | |
3379 | 0, 0, | |
3380 | 0, 0, | |
3381 | 0, 0, | |
0dfc2392 | 3382 | GP_1_28_FN, GFN_CLKOUT, |
ee8f0cb3 NI |
3383 | GP_1_27_FN, GFN_EX_WAIT0_A, |
3384 | GP_1_26_FN, GFN_WE1x, | |
3385 | GP_1_25_FN, GFN_WE0x, | |
3386 | GP_1_24_FN, GFN_RD_WRx, | |
3387 | GP_1_23_FN, GFN_RDx, | |
3388 | GP_1_22_FN, GFN_BSx, | |
3389 | GP_1_21_FN, GFN_CS1x_A26, | |
3390 | GP_1_20_FN, GFN_CS0x, | |
3391 | GP_1_19_FN, GFN_A19, | |
3392 | GP_1_18_FN, GFN_A18, | |
3393 | GP_1_17_FN, GFN_A17, | |
3394 | GP_1_16_FN, GFN_A16, | |
3395 | GP_1_15_FN, GFN_A15, | |
3396 | GP_1_14_FN, GFN_A14, | |
3397 | GP_1_13_FN, GFN_A13, | |
3398 | GP_1_12_FN, GFN_A12, | |
3399 | GP_1_11_FN, GFN_A11, | |
3400 | GP_1_10_FN, GFN_A10, | |
3401 | GP_1_9_FN, GFN_A9, | |
3402 | GP_1_8_FN, GFN_A8, | |
3403 | GP_1_7_FN, GFN_A7, | |
3404 | GP_1_6_FN, GFN_A6, | |
3405 | GP_1_5_FN, GFN_A5, | |
3406 | GP_1_4_FN, GFN_A4, | |
3407 | GP_1_3_FN, GFN_A3, | |
3408 | GP_1_2_FN, GFN_A2, | |
3409 | GP_1_1_FN, GFN_A1, | |
3410 | GP_1_0_FN, GFN_A0 } | |
3411 | }, | |
3412 | /* GPSR2(0xE6060108) is md[3:1] controls */ | |
3413 | /* md[3:1] .. 0 : 0x000003C0 */ | |
3414 | /* .. other : 0x00000200 */ | |
3415 | { PINMUX_CFG_REG("GPSR2", 0xE6060108, 32, 1) { | |
3416 | 0, 0, | |
3417 | 0, 0, | |
3418 | 0, 0, | |
3419 | 0, 0, | |
3420 | 0, 0, | |
3421 | 0, 0, | |
3422 | 0, 0, | |
3423 | 0, 0, | |
3424 | ||
3425 | 0, 0, | |
3426 | 0, 0, | |
3427 | 0, 0, | |
3428 | 0, 0, | |
3429 | 0, 0, | |
3430 | 0, 0, | |
3431 | 0, 0, | |
3432 | 0, 0, | |
3433 | ||
3434 | 0, 0, | |
3435 | GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A, | |
3436 | GP_2_13_FN, GFN_AVB_AVTP_MATCH_A, | |
3437 | GP_2_12_FN, GFN_AVB_LINK, | |
3438 | GP_2_11_FN, GFN_AVB_PHY_INT, | |
3439 | GP_2_10_FN, GFN_AVB_MAGIC, | |
3440 | GP_2_9_FN, GFN_AVB_MDC, | |
3441 | GP_2_8_FN, GFN_PWM2_A, | |
3442 | GP_2_7_FN, GFN_PWM1_A, | |
3443 | GP_2_6_FN, GFN_PWM0, | |
3444 | GP_2_5_FN, GFN_IRQ5, | |
3445 | GP_2_4_FN, GFN_IRQ4, | |
3446 | GP_2_3_FN, GFN_IRQ3, | |
3447 | GP_2_2_FN, GFN_IRQ2, | |
3448 | GP_2_1_FN, GFN_IRQ1, | |
3449 | GP_2_0_FN, GFN_IRQ0 } | |
3450 | }, | |
3451 | ||
3452 | /* GPSR3 */ | |
3453 | { PINMUX_CFG_REG("GPSR3", 0xE606010C, 32, 1) { | |
3454 | 0, 0, | |
3455 | 0, 0, | |
3456 | 0, 0, | |
3457 | 0, 0, | |
3458 | 0, 0, | |
3459 | 0, 0, | |
3460 | 0, 0, | |
3461 | 0, 0, | |
3462 | ||
3463 | 0, 0, | |
3464 | 0, 0, | |
3465 | 0, 0, | |
3466 | 0, 0, | |
3467 | 0, 0, | |
3468 | 0, 0, | |
3469 | 0, 0, | |
3470 | 0, 0, | |
3471 | ||
3472 | GP_3_15_FN, GFN_SD1_WP, | |
3473 | GP_3_14_FN, GFN_SD1_CD, | |
3474 | GP_3_13_FN, GFN_SD0_WP, | |
3475 | GP_3_12_FN, GFN_SD0_CD, | |
3476 | GP_3_11_FN, GFN_SD1_DAT3, | |
3477 | GP_3_10_FN, GFN_SD1_DAT2, | |
3478 | GP_3_9_FN, GFN_SD1_DAT1, | |
3479 | GP_3_8_FN, GFN_SD1_DAT0, | |
3480 | GP_3_7_FN, GFN_SD1_CMD, | |
3481 | GP_3_6_FN, GFN_SD1_CLK, | |
3482 | GP_3_5_FN, GFN_SD0_DAT3, | |
3483 | GP_3_4_FN, GFN_SD0_DAT2, | |
3484 | GP_3_3_FN, GFN_SD0_DAT1, | |
3485 | GP_3_2_FN, GFN_SD0_DAT0, | |
3486 | GP_3_1_FN, GFN_SD0_CMD, | |
3487 | GP_3_0_FN, GFN_SD0_CLK } | |
3488 | }, | |
3489 | /* GPSR4 */ | |
3490 | { PINMUX_CFG_REG("GPSR4", 0xE6060110, 32, 1) { | |
3491 | 0, 0, | |
3492 | 0, 0, | |
3493 | 0, 0, | |
3494 | 0, 0, | |
3495 | 0, 0, | |
3496 | 0, 0, | |
3497 | 0, 0, | |
3498 | 0, 0, | |
3499 | ||
3500 | 0, 0, | |
3501 | 0, 0, | |
3502 | 0, 0, | |
3503 | 0, 0, | |
3504 | 0, 0, | |
3505 | 0, 0, | |
0dfc2392 | 3506 | GP_4_17_FN, GFN_SD3_DS, |
ee8f0cb3 NI |
3507 | GP_4_16_FN, GFN_SD3_DAT7, |
3508 | ||
3509 | GP_4_15_FN, GFN_SD3_DAT6, | |
3510 | GP_4_14_FN, GFN_SD3_DAT5, | |
3511 | GP_4_13_FN, GFN_SD3_DAT4, | |
0dfc2392 MV |
3512 | GP_4_12_FN, GFN_SD3_DAT3, |
3513 | GP_4_11_FN, GFN_SD3_DAT2, | |
3514 | GP_4_10_FN, GFN_SD3_DAT1, | |
3515 | GP_4_9_FN, GFN_SD3_DAT0, | |
3516 | GP_4_8_FN, GFN_SD3_CMD, | |
3517 | GP_4_7_FN, GFN_SD3_CLK, | |
ee8f0cb3 NI |
3518 | GP_4_6_FN, GFN_SD2_DS, |
3519 | GP_4_5_FN, GFN_SD2_DAT3, | |
3520 | GP_4_4_FN, GFN_SD2_DAT2, | |
3521 | GP_4_3_FN, GFN_SD2_DAT1, | |
3522 | GP_4_2_FN, GFN_SD2_DAT0, | |
0dfc2392 | 3523 | GP_4_1_FN, GFN_SD2_CMD, |
ee8f0cb3 NI |
3524 | GP_4_0_FN, GFN_SD2_CLK } |
3525 | }, | |
3526 | /* GPSR5 */ | |
3527 | { PINMUX_CFG_REG("GPSR5", 0xE6060114, 32, 1) { | |
3528 | 0, 0, | |
3529 | 0, 0, | |
3530 | 0, 0, | |
3531 | 0, 0, | |
3532 | 0, 0, | |
3533 | 0, 0, | |
3534 | GP_5_25_FN, GFN_MLB_DAT, | |
3535 | GP_5_24_FN, GFN_MLB_SIG, | |
ee8f0cb3 NI |
3536 | GP_5_23_FN, GFN_MLB_CLK, |
3537 | GP_5_22_FN, FN_MSIOF0_RXD, | |
3538 | GP_5_21_FN, GFN_MSIOF0_SS2, | |
3539 | GP_5_20_FN, FN_MSIOF0_TXD, | |
3540 | GP_5_19_FN, GFN_MSIOF0_SS1, | |
3541 | GP_5_18_FN, GFN_MSIOF0_SYNC, | |
3542 | GP_5_17_FN, FN_MSIOF0_SCK, | |
3543 | GP_5_16_FN, GFN_HRTS0x, | |
3544 | GP_5_15_FN, GFN_HCTS0x, | |
3545 | GP_5_14_FN, GFN_HTX0, | |
3546 | GP_5_13_FN, GFN_HRX0, | |
3547 | GP_5_12_FN, GFN_HSCK0, | |
3548 | GP_5_11_FN, GFN_RX2_A, | |
3549 | GP_5_10_FN, GFN_TX2_A, | |
3550 | GP_5_9_FN, GFN_SCK2, | |
3551 | GP_5_8_FN, GFN_RTS1x_TANS, | |
3552 | GP_5_7_FN, GFN_CTS1x, | |
3553 | GP_5_6_FN, GFN_TX1_A, | |
3554 | GP_5_5_FN, GFN_RX1_A, | |
3555 | GP_5_4_FN, GFN_RTS0x_TANS, | |
3556 | GP_5_3_FN, GFN_CTS0x, | |
3557 | GP_5_2_FN, GFN_TX0, | |
3558 | GP_5_1_FN, GFN_RX0, | |
3559 | GP_5_0_FN, GFN_SCK0 } | |
3560 | }, | |
3561 | /* GPSR6 */ | |
3562 | { PINMUX_CFG_REG("GPSR6", 0xE6060118, 32, 1) { | |
0dfc2392 MV |
3563 | GP_6_31_FN, GFN_USB3_OVC, |
3564 | GP_6_30_FN, GFN_USB3_PWEN, | |
ee8f0cb3 NI |
3565 | GP_6_29_FN, GFN_USB30_OVC, |
3566 | GP_6_28_FN, GFN_USB30_PWEN, | |
3567 | GP_6_27_FN, GFN_USB1_OVC, | |
3568 | GP_6_26_FN, GFN_USB1_PWEN, | |
3569 | GP_6_25_FN, GFN_USB0_OVC, | |
3570 | GP_6_24_FN, GFN_USB0_PWEN, | |
3571 | GP_6_23_FN, GFN_AUDIO_CLKB_B, | |
3572 | GP_6_22_FN, GFN_AUDIO_CLKA_A, | |
3573 | GP_6_21_FN, GFN_SSI_SDATA9_A, | |
3574 | GP_6_20_FN, GFN_SSI_SDATA8, | |
3575 | GP_6_19_FN, GFN_SSI_SDATA7, | |
3576 | GP_6_18_FN, GFN_SSI_WS78, | |
3577 | GP_6_17_FN, GFN_SSI_SCK78, | |
3578 | GP_6_16_FN, GFN_SSI_SDATA6, | |
3579 | GP_6_15_FN, GFN_SSI_WS6, | |
3580 | GP_6_14_FN, GFN_SSI_SCK6, | |
3581 | GP_6_13_FN, FN_SSI_SDATA5, | |
3582 | GP_6_12_FN, FN_SSI_WS5, | |
3583 | GP_6_11_FN, FN_SSI_SCK5, | |
3584 | GP_6_10_FN, GFN_SSI_SDATA4, | |
3585 | GP_6_9_FN, GFN_SSI_WS4, | |
3586 | GP_6_8_FN, GFN_SSI_SCK4, | |
3587 | GP_6_7_FN, GFN_SSI_SDATA3, | |
3588 | GP_6_6_FN, GFN_SSI_WS34, | |
3589 | GP_6_5_FN, GFN_SSI_SCK34, | |
3590 | GP_6_4_FN, GFN_SSI_SDATA2_A, | |
3591 | GP_6_3_FN, GFN_SSI_SDATA1_A, | |
3592 | GP_6_2_FN, GFN_SSI_SDATA0, | |
0dfc2392 MV |
3593 | GP_6_1_FN, GFN_SSI_WS01239, |
3594 | GP_6_0_FN, GFN_SSI_SCK01239 } | |
ee8f0cb3 NI |
3595 | }, |
3596 | /* GPSR7 */ | |
3597 | { PINMUX_CFG_REG("GPSR7", 0xE606011C, 32, 1) { | |
3598 | 0, 0, | |
3599 | 0, 0, | |
3600 | 0, 0, | |
3601 | 0, 0, | |
3602 | 0, 0, | |
3603 | 0, 0, | |
3604 | 0, 0, | |
3605 | 0, 0, | |
3606 | ||
3607 | 0, 0, | |
3608 | 0, 0, | |
3609 | 0, 0, | |
3610 | 0, 0, | |
3611 | 0, 0, | |
3612 | 0, 0, | |
3613 | 0, 0, | |
3614 | 0, 0, | |
3615 | ||
3616 | 0, 0, | |
3617 | 0, 0, | |
3618 | 0, 0, | |
3619 | 0, 0, | |
3620 | 0, 0, | |
3621 | 0, 0, | |
3622 | 0, 0, | |
3623 | 0, 0, | |
3624 | ||
3625 | 0, 0, | |
3626 | 0, 0, | |
3627 | 0, 0, | |
3628 | 0, 0, | |
3629 | GP_7_3_FN, FN_HDMI1_CEC, | |
3630 | GP_7_2_FN, FN_HDMI0_CEC, | |
3631 | GP_7_1_FN, FN_AVS2, | |
3632 | GP_7_0_FN, FN_AVS1 } | |
3633 | }, | |
3634 | { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32, | |
3635 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3636 | /* IPSR0_31_28 [4] */ | |
3637 | IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP, | |
0dfc2392 | 3638 | FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B, FN_MSIOF3_SS1_E, |
ee8f0cb3 NI |
3639 | 0, 0, 0, 0, |
3640 | 0, 0, 0, 0, | |
3641 | /* IPSR0_27_24 [4] */ | |
3642 | IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE, | |
0dfc2392 | 3643 | FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B, FN_MSIOF3_SS2_E, |
ee8f0cb3 NI |
3644 | 0, 0, 0, 0, |
3645 | 0, 0, 0, 0, | |
3646 | /* IPSR0_23_20 [4] */ | |
3647 | IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A, | |
3648 | 0, 0, 0, 0, | |
3649 | 0, 0, 0, 0, | |
3650 | 0, 0, 0, 0, | |
3651 | /* IPSR0_19_16 [4] */ | |
3652 | IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A, | |
0dfc2392 | 3653 | 0, FN_FSCLKST2x_A, 0, 0, |
ee8f0cb3 NI |
3654 | 0, 0, 0, 0, |
3655 | 0, 0, 0, 0, | |
3656 | /* IPSR0_15_12 [4] */ | |
3657 | IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A, | |
3658 | 0, 0, 0, 0, | |
3659 | 0, 0, 0, 0, | |
3660 | 0, 0, 0, 0, | |
3661 | /* IPSR0_11_8 [4] */ | |
3662 | IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A, | |
3663 | 0, 0, 0, 0, | |
3664 | 0, 0, 0, 0, | |
3665 | 0, 0, 0, 0, | |
3666 | /* IPSR0_7_4 [4] */ | |
0dfc2392 | 3667 | IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A, |
ee8f0cb3 NI |
3668 | 0, 0, 0, 0, |
3669 | 0, 0, 0, 0, | |
3670 | 0, 0, 0, 0, | |
3671 | /* IPSR0_3_0 [4] */ | |
3672 | IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0, | |
3673 | 0, 0, 0, 0, | |
3674 | 0, 0, 0, 0, | |
3675 | 0, 0, 0, 0, | |
3676 | } | |
3677 | }, | |
3678 | { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32, | |
3679 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3680 | /* IPSR1_31_28 [4] */ | |
3681 | IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0, | |
3682 | FN_VI4_DATA8, 0, FN_DU_DB0, 0, | |
3683 | 0, FN_PWM3_A, 0, 0, | |
3684 | 0, 0, 0, 0, | |
3685 | /* IPSR1_27_24 [4] */ | |
0dfc2392 | 3686 | IFN_PWM2_A, 0, 0, FN_HTX3_D, |
ee8f0cb3 NI |
3687 | 0, 0, 0, 0, |
3688 | 0, FN_IETX_B, 0, 0, | |
3689 | 0, 0, 0, 0, | |
3690 | /* IPSR1_23_20 [4] */ | |
0dfc2392 | 3691 | IFN_PWM1_A, 0, 0, FN_HRX3_D, |
ee8f0cb3 NI |
3692 | FN_VI4_DATA7_B, 0, 0, 0, |
3693 | 0, FN_IERX_B, 0, 0, | |
3694 | 0, 0, 0, 0, | |
3695 | /* IPSR1_19_16 [4] */ | |
0dfc2392 | 3696 | IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0, |
ee8f0cb3 NI |
3697 | FN_VI4_DATA6_B, 0, 0, 0, |
3698 | 0, FN_IECLK_B, 0, 0, | |
3699 | 0, 0, 0, 0, | |
3700 | /* IPSR1_15_12 [4] */ | |
0dfc2392 MV |
3701 | IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC, |
3702 | FN_VI4_DATA5_B, FN_FSCLKST2x_B, 0, FN_MSIOF3_TXD_E, | |
ee8f0cb3 NI |
3703 | 0, FN_PWM6_B, 0, 0, |
3704 | 0, 0, 0, 0, | |
3705 | /* IPSR1_11_8 [4] */ | |
0dfc2392 MV |
3706 | IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC, |
3707 | FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E, | |
ee8f0cb3 NI |
3708 | 0, FN_PWM5_B, 0, 0, |
3709 | 0, 0, 0, 0, | |
3710 | /* IPSR1_7_4 [4] */ | |
0dfc2392 MV |
3711 | IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1, |
3712 | FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E, | |
ee8f0cb3 NI |
3713 | 0, FN_PWM4_B, 0, 0, |
3714 | 0, 0, 0, 0, | |
3715 | /* IPSR1_3_0 [4] */ | |
3716 | IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE, | |
0dfc2392 | 3717 | FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E, |
ee8f0cb3 NI |
3718 | 0, FN_PWM3_B, 0, 0, |
3719 | 0, 0, 0, 0 | |
3720 | } | |
3721 | }, | |
3722 | { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32, | |
3723 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3724 | /* IPSR2_31_28 [4] */ | |
3725 | IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B, | |
3726 | 0, 0, 0, FN_SDA6_A, | |
3727 | FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0, | |
3728 | 0, 0, 0, 0, | |
3729 | /* IPSR2_27_24 [4] */ | |
3730 | IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B, | |
3731 | FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0, | |
3732 | 0, 0, 0, 0, | |
3733 | 0, 0, 0, 0, | |
3734 | /* IPSR2_23_20 [4] */ | |
3735 | IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B, | |
3736 | FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0, | |
3737 | 0, 0, 0, 0, | |
3738 | 0, 0, 0, 0, | |
3739 | /* IPSR2_19_16 [4] */ | |
3740 | IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B, | |
3741 | FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0, | |
3742 | 0, 0, 0, 0, | |
3743 | 0, 0, 0, 0, | |
3744 | /* IPSR2_15_12 [4] */ | |
3745 | IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0, | |
3746 | FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0, | |
3747 | 0, 0, 0, 0, | |
3748 | 0, 0, 0, 0, | |
3749 | /* IPSR2_11_8 [4] */ | |
3750 | IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0, | |
3751 | FN_VI4_DATA11, 0, FN_DU_DB3, 0, | |
3752 | 0, FN_PWM6_A, 0, 0, | |
3753 | 0, 0, 0, 0, | |
3754 | /* IPSR2_7_4 [4] */ | |
3755 | IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0, | |
3756 | FN_VI4_DATA10, 0, FN_DU_DB2, 0, | |
3757 | 0, FN_PWM5_A, 0, 0, | |
3758 | 0, 0, 0, 0, | |
3759 | /* IPSR2_3_0 [4] */ | |
3760 | IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0, | |
3761 | FN_VI4_DATA9, 0, FN_DU_DB1, 0, | |
3762 | 0, FN_PWM4_A, 0, 0, | |
3763 | 0, 0, 0, 0, | |
3764 | } | |
3765 | }, | |
3766 | { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32, | |
3767 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3768 | /* IPSR3_31_28 [4] */ | |
3769 | IFN_A16, FN_LCDOUT8, 0, 0, | |
3770 | FN_VI4_FIELD, 0, FN_DU_DG0, 0, | |
3771 | 0, 0, 0, 0, | |
3772 | 0, 0, 0, 0, | |
3773 | /* IPSR3_27_24 [4] */ | |
3774 | IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0, | |
3775 | FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0, | |
3776 | 0, 0, 0, 0, | |
3777 | 0, 0, 0, 0, | |
3778 | /* IPSR3_23_20 [4] */ | |
3779 | IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0, | |
3780 | FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0, | |
3781 | 0, 0, 0, 0, | |
3782 | 0, 0, 0, 0, | |
3783 | /* IPSR3_19_16 [4] */ | |
3784 | IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0, | |
3785 | FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0, | |
3786 | 0, 0, 0, 0, | |
3787 | 0, 0, 0, 0, | |
3788 | /* IPSR3_15_12 [4] */ | |
3789 | IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0, | |
3790 | FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0, | |
3791 | 0, 0, 0, 0, | |
3792 | 0, 0, 0, 0, | |
3793 | /* IPSR3_11_8 [4] */ | |
3794 | IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B, | |
3795 | FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A, | |
0dfc2392 | 3796 | FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, 0, 0, |
ee8f0cb3 NI |
3797 | 0, 0, 0, 0, |
3798 | /* IPSR3_7_4 [4] */ | |
3799 | IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B, | |
3800 | 0, FN_VI5_HSYNCx, 0, 0, | |
3801 | 0, 0, 0, 0, | |
3802 | 0, 0, 0, 0, | |
3803 | /* IPSR3_3_0 [4] */ | |
3804 | IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B, | |
3805 | 0, FN_VI5_VSYNCx, 0, 0, | |
3806 | 0, 0, 0, 0, | |
3807 | 0, 0, 0, 0, | |
3808 | } | |
3809 | }, | |
3810 | { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32, | |
3811 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3812 | /* IPSR4_31_28 [4] */ | |
3813 | IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A, | |
3814 | FN_HTX3_A, 0, 0, 0, | |
3815 | FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0, | |
3816 | 0, 0, 0, 0, | |
3817 | /* IPSR4_27_24 [4] */ | |
3818 | IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A, | |
3819 | FN_HRX3_A, 0, 0, 0, | |
3820 | FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0, | |
3821 | 0, 0, 0, 0, | |
3822 | /* IPSR4_23_20 [4] */ | |
3823 | IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3, | |
3824 | FN_HSCK3, 0, 0, 0, | |
3825 | FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0, | |
3826 | 0, 0, 0, 0, | |
3827 | /* IPSR4_19_16 [4] */ | |
3828 | IFN_CS1x_A26, 0, 0, 0, | |
3829 | 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B, | |
3830 | 0, 0, 0, 0, | |
3831 | 0, 0, 0, 0, | |
3832 | /* IPSR4_15_12 [4] */ | |
3833 | IFN_CS0x, 0, 0, 0, | |
3834 | 0, FN_VI5_CLKENB, 0, 0, | |
3835 | 0, 0, 0, 0, | |
3836 | 0, 0, 0, 0, | |
3837 | /* IPSR4_11_8 [4] */ | |
3838 | IFN_A19, FN_LCDOUT11, 0, 0, | |
3839 | FN_VI4_CLKENB, 0, FN_DU_DG3, 0, | |
3840 | 0, 0, 0, 0, | |
3841 | 0, 0, 0, 0, | |
3842 | /* IPSR4_7_4 [4] */ | |
3843 | IFN_A18, FN_LCDOUT10, 0, 0, | |
3844 | FN_VI4_HSYNCx, 0, FN_DU_DG2, 0, | |
3845 | 0, 0, 0, 0, | |
3846 | 0, 0, 0, 0, | |
3847 | /* IPSR4_3_0 [4] */ | |
3848 | IFN_A17, FN_LCDOUT9, 0, 0, | |
3849 | FN_VI4_VSYNCx, 0, FN_DU_DG1, 0, | |
3850 | 0, 0, 0, 0, | |
3851 | 0, 0, 0, 0, | |
3852 | } | |
3853 | }, | |
3854 | { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32, | |
3855 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3856 | /* IPSR5_31_28 [4] */ | |
3857 | IFN_D4, FN_MSIOF2_SCK_B, 0, 0, | |
3858 | FN_VI4_DATA20, FN_VI5_DATA4, 0, 0, | |
3859 | 0, 0, 0, 0, | |
3860 | 0, 0, 0, 0, | |
3861 | /* IPSR5_27_24 [4] */ | |
3862 | IFN_D3, 0, FN_MSIOF3_TXD_A, 0, | |
3863 | FN_VI4_DATA19, FN_VI5_DATA3, 0, 0, | |
3864 | 0, 0, 0, 0, | |
3865 | 0, 0, 0, 0, | |
3866 | /* IPSR5_23_20 [4] */ | |
3867 | IFN_D2, 0, FN_MSIOF3_RXD_A, 0, | |
3868 | FN_VI4_DATA18, FN_VI5_DATA2, 0, 0, | |
3869 | 0, 0, 0, 0, | |
3870 | 0, 0, 0, 0, | |
3871 | /* IPSR5_19_16 [4] */ | |
3872 | IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0, | |
3873 | FN_VI4_DATA17, FN_VI5_DATA1, 0, 0, | |
3874 | 0, 0, 0, 0, | |
3875 | 0, 0, 0, 0, | |
3876 | /* IPSR5_15_12 [4] */ | |
3877 | IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0, | |
3878 | FN_VI4_DATA16, FN_VI5_DATA0, 0, 0, | |
3879 | 0, 0, 0, 0, | |
3880 | 0, 0, 0, 0, | |
3881 | /* IPSR5_11_8 [4] */ | |
3882 | IFN_EX_WAIT0_A, FN_QCLK, 0, 0, | |
3883 | FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0, | |
3884 | 0, 0, 0, 0, | |
3885 | 0, 0, 0, 0, | |
3886 | /* IPSR5_7_4 [4] */ | |
3887 | IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS, | |
3888 | FN_HRTS3x, 0, 0, FN_SDA6_B, | |
3889 | FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0, | |
3890 | 0, 0, 0, 0, | |
3891 | /* IPSR5_3_0 [4] */ | |
3892 | IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x, | |
3893 | FN_HCTS3x, 0, 0, FN_SCL6_B, | |
3894 | FN_CAN_CLK, 0, FN_IECLK_A, 0, | |
3895 | 0, 0, 0, 0, | |
3896 | } | |
3897 | }, | |
3898 | { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32, | |
3899 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3900 | /* IPSR6_31_28 [4] */ | |
3901 | IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C, | |
3902 | FN_VI4_DATA4_A, 0, FN_DU_DR4, 0, | |
3903 | 0, 0, 0, 0, | |
3904 | 0, 0, 0, 0, | |
3905 | /* IPSR6_27_24 [4] */ | |
3906 | IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B, | |
3907 | FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0, | |
3908 | 0, 0, 0, 0, | |
3909 | 0, 0, 0, 0, | |
3910 | /* IPSR6_23_20 [4] */ | |
3911 | IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B, | |
3912 | FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0, | |
3913 | 0, 0, 0, 0, | |
3914 | 0, 0, 0, 0, | |
3915 | /* IPSR6_19_16 [4] */ | |
3916 | IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0, | |
3917 | FN_VI4_DATA1_A, 0, FN_DU_DR1, 0, | |
3918 | 0, 0, 0, 0, | |
3919 | 0, 0, 0, 0, | |
3920 | /* IPSR6_15_12 [4] */ | |
3921 | IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C, | |
3922 | FN_VI4_DATA0_A, 0, FN_DU_DR0, 0, | |
3923 | 0, 0, 0, 0, | |
3924 | 0, 0, 0, 0, | |
3925 | /* IPSR6_11_8 [4] */ | |
3926 | IFN_D7, FN_MSIOF2_TXD_B, 0, 0, | |
3927 | FN_VI4_DATA23, FN_VI5_DATA7, 0, 0, | |
3928 | 0, 0, 0, 0, | |
3929 | 0, 0, 0, 0, | |
3930 | /* IPSR6_7_4 [4] */ | |
3931 | IFN_D6, FN_MSIOF2_RXD_B, 0, 0, | |
3932 | FN_VI4_DATA22, FN_VI5_DATA6, 0, 0, | |
3933 | 0, 0, 0, 0, | |
3934 | 0, 0, 0, 0, | |
3935 | /* IPSR6_3_0 [4] */ | |
3936 | IFN_D5, FN_MSIOF2_SYNC_B, 0, 0, | |
3937 | FN_VI4_DATA21, FN_VI5_DATA5, 0, 0, | |
3938 | 0, 0, 0, 0, | |
3939 | 0, 0, 0, 0, | |
3940 | } | |
3941 | }, | |
3942 | { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32, | |
3943 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3944 | /* IPSR7_31_28 [4] */ | |
3945 | IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0, | |
3946 | 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0, | |
3947 | 0, 0, 0, 0, | |
3948 | 0, 0, 0, 0, | |
3949 | /* IPSR7_27_24 [4] */ | |
3950 | IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0, | |
3951 | 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0, | |
3952 | 0, 0, 0, 0, | |
3953 | 0, 0, 0, 0, | |
3954 | /* IPSR7_23_20 [4] */ | |
3955 | IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0, | |
3956 | 0, 0, FN_STP_IVCXO27_0_B, 0, | |
3957 | 0, 0, 0, 0, | |
3958 | 0, 0, 0, 0, | |
3959 | /* IPSR7_19_16 [4] */ | |
3960 | IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0, | |
3961 | 0, 0, FN_STP_OPWM_0_B, 0, | |
3962 | 0, 0, 0, 0, | |
3963 | 0, 0, 0, 0, | |
3964 | /* IPSR7_15_12 [4] */ | |
3965 | FN_FSCLKST, 0, 0, 0, | |
3966 | 0, 0, 0, 0, | |
3967 | 0, 0, 0, 0, | |
3968 | 0, 0, 0, 0, | |
3969 | /* IPSR7_11_8 [4] */ | |
3970 | IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C, | |
3971 | FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C, | |
3972 | 0, 0, 0, 0, | |
3973 | 0, 0, 0, 0, | |
3974 | /* IPSR7_7_4 [4] */ | |
3975 | IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C, | |
3976 | FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C, | |
3977 | 0, 0, 0, 0, | |
3978 | 0, 0, 0, 0, | |
3979 | /* IPSR7_3_0 [4] */ | |
3980 | IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C, | |
3981 | FN_VI4_DATA5_A, 0, FN_DU_DR5, 0, | |
3982 | 0, 0, 0, 0, | |
3983 | 0, 0, 0, 0, | |
3984 | } | |
3985 | }, | |
3986 | { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32, | |
3987 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
3988 | /* IPSR8_31_28 [4] */ | |
0dfc2392 | 3989 | IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G, FN_NFRBx_B, |
ee8f0cb3 NI |
3990 | 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0, |
3991 | 0, 0, 0, 0, | |
3992 | 0, 0, 0, 0, | |
3993 | /* IPSR8_27_24 [4] */ | |
0dfc2392 | 3994 | IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G, FN_NFDATA15_B, |
ee8f0cb3 NI |
3995 | 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0, |
3996 | 0, 0, 0, 0, | |
3997 | 0, 0, 0, 0, | |
3998 | /* IPSR8_23_20 [4] */ | |
0dfc2392 | 3999 | IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G, FN_NFDATA14_B, |
ee8f0cb3 NI |
4000 | 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0, |
4001 | 0, 0, 0, 0, | |
4002 | 0, 0, 0, 0, | |
4003 | /* IPSR8_19_16 [4] */ | |
0dfc2392 | 4004 | IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G, FN_NFWPx_B, |
ee8f0cb3 NI |
4005 | 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0, |
4006 | 0, 0, 0, 0, | |
4007 | 0, 0, 0, 0, | |
4008 | /* IPSR8_15_12 [4] */ | |
0dfc2392 | 4009 | IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G, FN_NFCEx_B, |
ee8f0cb3 NI |
4010 | 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0, |
4011 | 0, 0, 0, 0, | |
4012 | 0, 0, 0, 0, | |
4013 | /* IPSR8_11_8 [4] */ | |
4014 | IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0, | |
4015 | 0, FN_SIM0_CLK_A, 0, 0, | |
4016 | 0, 0, 0, 0, | |
4017 | 0, 0, 0, 0, | |
4018 | /* IPSR8_7_4 [4] */ | |
4019 | IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0, | |
4020 | 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0, | |
4021 | 0, 0, 0, 0, | |
4022 | 0, 0, 0, 0, | |
4023 | /* IPSR8_3_0 [4] */ | |
4024 | IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0, | |
4025 | 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0, | |
4026 | 0, 0, 0, 0, | |
4027 | 0, 0, 0, 0, | |
4028 | } | |
4029 | }, | |
4030 | { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32, | |
4031 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
4032 | /* IPSR9_31_28 [4] */ | |
0dfc2392 | 4033 | IFN_SD3_CLK, 0, FN_NFWEx, 0, |
ee8f0cb3 NI |
4034 | 0, 0, 0, 0, |
4035 | 0, 0, 0, 0, | |
4036 | 0, 0, 0, 0, | |
4037 | /* IPSR9_27_24 [4] */ | |
0dfc2392 | 4038 | IFN_SD2_DS, 0, FN_NFALE, 0, |
ee8f0cb3 | 4039 | 0, 0, 0, 0, |
0dfc2392 | 4040 | FN_SATA_DEVSLP_B, 0, 0, 0, |
ee8f0cb3 NI |
4041 | 0, 0, 0, 0, |
4042 | /* IPSR9_23_20 [4] */ | |
0dfc2392 MV |
4043 | IFN_SD2_DAT3, 0, FN_NFDATA13, 0, |
4044 | 0, 0, 0, 0, | |
ee8f0cb3 | 4045 | 0, 0, 0, 0, |
ee8f0cb3 NI |
4046 | 0, 0, 0, 0, |
4047 | /* IPSR9_19_16 [4] */ | |
0dfc2392 MV |
4048 | IFN_SD2_DAT2, 0, FN_NFDATA12, 0, |
4049 | 0, 0, 0, 0, | |
ee8f0cb3 | 4050 | 0, 0, 0, 0, |
ee8f0cb3 NI |
4051 | 0, 0, 0, 0, |
4052 | /* IPSR9_15_12 [4] */ | |
0dfc2392 MV |
4053 | IFN_SD2_DAT1, 0, FN_NFDATA11, 0, |
4054 | 0, 0, 0, 0, | |
ee8f0cb3 | 4055 | 0, 0, 0, 0, |
ee8f0cb3 NI |
4056 | 0, 0, 0, 0, |
4057 | /* IPSR9_11_8 [4] */ | |
0dfc2392 MV |
4058 | IFN_SD2_DAT0, 0, FN_NFDATA10, 0, |
4059 | 0, 0, 0, 0, | |
ee8f0cb3 | 4060 | 0, 0, 0, 0, |
ee8f0cb3 NI |
4061 | 0, 0, 0, 0, |
4062 | /* IPSR9_7_4 [4] */ | |
0dfc2392 MV |
4063 | IFN_SD2_CMD, 0, FN_NFDATA9, 0, |
4064 | 0, 0, 0, 0, | |
ee8f0cb3 | 4065 | 0, 0, 0, 0, |
ee8f0cb3 NI |
4066 | 0, 0, 0, 0, |
4067 | /* IPSR9_3_0 [4] */ | |
0dfc2392 MV |
4068 | IFN_SD2_CLK, 0, FN_NFDATA8, 0, |
4069 | 0, 0, 0, 0, | |
ee8f0cb3 | 4070 | 0, 0, 0, 0, |
ee8f0cb3 NI |
4071 | 0, 0, 0, 0, |
4072 | } | |
4073 | }, | |
4074 | { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32, | |
4075 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
4076 | /* IPSR10_31_28 [4] */ | |
0dfc2392 MV |
4077 | IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0, |
4078 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4079 | 0, 0, 0, 0, |
4080 | 0, 0, 0, 0, | |
4081 | /* IPSR10_27_24 [4] */ | |
0dfc2392 MV |
4082 | IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0, |
4083 | 0, 0, 0, 0, | |
4084 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4085 | 0, 0, 0, 0, |
4086 | /* IPSR10_23_20 [4] */ | |
0dfc2392 MV |
4087 | IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0, |
4088 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4089 | 0, 0, 0, 0, |
4090 | 0, 0, 0, 0, | |
4091 | /* IPSR10_19_16 [4] */ | |
0dfc2392 MV |
4092 | IFN_SD3_DAT3, 0, FN_NFDATA3, 0, |
4093 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4094 | 0, 0, 0, 0, |
4095 | 0, 0, 0, 0, | |
4096 | /* IPSR10_15_12 [4] */ | |
0dfc2392 MV |
4097 | IFN_SD3_DAT2, 0, FN_NFDATA2, 0, |
4098 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4099 | 0, 0, 0, 0, |
4100 | 0, 0, 0, 0, | |
4101 | /* IPSR10_11_8 [4] */ | |
0dfc2392 MV |
4102 | IFN_SD3_DAT1, 0, FN_NFDATA1, 0, |
4103 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4104 | 0, 0, 0, 0, |
4105 | 0, 0, 0, 0, | |
4106 | /* IPSR10_7_4 [4] */ | |
0dfc2392 | 4107 | IFN_SD3_DAT0, 0, FN_NFDATA0, 0, |
ee8f0cb3 NI |
4108 | 0, 0, 0, 0, |
4109 | 0, 0, 0, 0, | |
4110 | 0, 0, 0, 0, | |
4111 | /* IPSR10_3_0 [4] */ | |
0dfc2392 | 4112 | IFN_SD3_CMD, 0, FN_NFREx, 0, |
ee8f0cb3 NI |
4113 | 0, 0, 0, 0, |
4114 | 0, 0, 0, 0, | |
4115 | 0, 0, 0, 0, | |
4116 | } | |
4117 | }, | |
4118 | { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32, | |
4119 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
4120 | /* IPSR11_31_28 [4] */ | |
0dfc2392 MV |
4121 | IFN_RX0, FN_HRX1_B, 0, 0, |
4122 | 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B, | |
4123 | 0, 0, 0, 0, | |
4124 | 0, 0, 0, 0, | |
4125 | /* IPSR11_27_24 [4] */ | |
4126 | IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B, | |
4127 | FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C, FN_RIF0_CLK_B, | |
4128 | FN_ADICHS2, FN_SCK5_B, 0, 0, | |
4129 | 0, 0, 0, 0, | |
4130 | /* IPSR11_23_20 [4] */ | |
4131 | IFN_SD1_WP, 0, FN_NFCEx_A, 0, | |
4132 | 0, FN_SIM0_D_B, 0, 0, | |
4133 | 0, 0, 0, 0, | |
4134 | 0, 0, 0, 0, | |
4135 | /* IPSR11_19_16 [4] */ | |
4136 | IFN_SD1_CD, 0, FN_NFRBx_A, 0, | |
4137 | 0, FN_SIM0_CLK_B, 0, 0, | |
4138 | 0, 0, 0, 0, | |
4139 | 0, 0, 0, 0, | |
4140 | /* IPSR11_15_12 [4] */ | |
4141 | IFN_SD0_WP, 0, FN_NFDATA15_A, 0, | |
4142 | FN_SDA2_B, 0, 0, 0, | |
4143 | 0, 0, 0, 0, | |
4144 | 0, 0, 0, 0, | |
4145 | /* IPSR11_11_8 [4] */ | |
4146 | IFN_SD0_CD, 0, FN_NFDATA14_A, 0, | |
4147 | FN_SCL2_B, FN_SIM0_RST_A, 0, 0, | |
4148 | 0, 0, 0, 0, | |
4149 | 0, 0, 0, 0, | |
4150 | /* IPSR11_7_4 [4] */ | |
4151 | IFN_SD3_DS, 0, FN_NFCLE, 0, | |
4152 | 0, 0, 0, 0, | |
4153 | 0, 0, 0, 0, | |
4154 | 0, 0, 0, 0, | |
4155 | /* IPSR11_3_0 [4] */ | |
4156 | IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0, | |
4157 | 0, 0, 0, 0, | |
4158 | 0, 0, 0, 0, | |
4159 | 0, 0, 0, 0, | |
4160 | } | |
4161 | }, | |
4162 | { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32, | |
4163 | 4, 4, 4, 4, 4, 4, 4, 4) { | |
4164 | /* IPSR12_31_28 [4] */ | |
ee8f0cb3 NI |
4165 | IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0, |
4166 | 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B, | |
4167 | 0, FN_ADICLK, 0, 0, | |
4168 | 0, 0, 0, 0, | |
0dfc2392 | 4169 | /* IPSR12_27_24 [4] */ |
ee8f0cb3 NI |
4170 | IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0, |
4171 | 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B, | |
4172 | 0, FN_ADICHS0, 0, 0, | |
4173 | 0, 0, 0, 0, | |
0dfc2392 | 4174 | /* IPSR12_23_20 [4] */ |
ee8f0cb3 NI |
4175 | IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0, |
4176 | 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B, | |
4177 | 0, FN_ADIDATA, 0, 0, | |
0dfc2392 MV |
4178 | 0, 0, 0, 0, |
4179 | /* IPSR12_19_16 [4] */ | |
ee8f0cb3 NI |
4180 | IFN_TX1_A, FN_HTX1_A, 0, 0, |
4181 | 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C, | |
4182 | 0, 0, 0, 0, | |
4183 | 0, 0, 0, 0, | |
0dfc2392 | 4184 | /* IPSR12_15_12 [4] */ |
ee8f0cb3 | 4185 | IFN_RX1_A, FN_HRX1_A, 0, 0, |
0dfc2392 | 4186 | 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C, |
ee8f0cb3 NI |
4187 | 0, 0, 0, 0, |
4188 | 0, 0, 0, 0, | |
0dfc2392 | 4189 | /* IPSR12_11_8 [4] */ |
ee8f0cb3 NI |
4190 | IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B, |
4191 | FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B, | |
4192 | 0, FN_ADICHS1, 0, 0, | |
4193 | 0, 0, 0, 0, | |
0dfc2392 | 4194 | /* IPSR12_7_4 [4] */ |
ee8f0cb3 NI |
4195 | IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0, |
4196 | 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B, | |
4197 | FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0, | |
4198 | 0, 0, 0, 0, | |
0dfc2392 | 4199 | /* IPSR12_3_0 [4] */ |
ee8f0cb3 NI |
4200 | IFN_TX0, FN_HTX1_B, 0, 0, |
4201 | 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B, | |
4202 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4203 | } |
4204 | }, | |
0dfc2392 | 4205 | { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32, |
ee8f0cb3 | 4206 | 4, 4, 4, 4, 4, 4, 4, 4) { |
0dfc2392 | 4207 | /* IPSR13_31_28 [4] */ |
ee8f0cb3 NI |
4208 | IFN_MSIOF0_SYNC, 0, 0, 0, |
4209 | 0, 0, 0, 0, | |
0dfc2392 MV |
4210 | FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0, |
4211 | 0, FN_BPFCLK_D, 0, 0, | |
4212 | /* IPSR13_27_24 [4] */ | |
ee8f0cb3 NI |
4213 | IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0, |
4214 | FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A, | |
4215 | FN_AUDIO_CLKOUT2_A, 0, 0, 0, | |
4216 | 0, 0, 0, 0, | |
0dfc2392 | 4217 | /* IPSR13_23_20 [4] */ |
ee8f0cb3 | 4218 | IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0, |
0dfc2392 MV |
4219 | FN_SSI_SCK9_A, FN_TS_SPSYNC0_D, |
4220 | FN_STP_ISSYNC_0_D, FN_RIF0_SYNC_C, | |
4221 | FN_AUDIO_CLKOUT1_A, 0, 0, 0, | |
ee8f0cb3 | 4222 | 0, 0, 0, 0, |
0dfc2392 | 4223 | /* IPSR13_19_16 [4] */ |
ee8f0cb3 NI |
4224 | IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0, |
4225 | FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C, | |
ee8f0cb3 | 4226 | 0, 0, 0, 0, |
0dfc2392 MV |
4227 | 0, 0, 0, 0, |
4228 | /* IPSR13_15_12 [4] */ | |
ee8f0cb3 | 4229 | IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0, |
0dfc2392 | 4230 | FN_SSI_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C, |
ee8f0cb3 | 4231 | 0, 0, 0, 0, |
0dfc2392 MV |
4232 | 0, 0, 0, 0, |
4233 | /* IPSR13_11_8 [4] */ | |
ee8f0cb3 NI |
4234 | IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A, |
4235 | FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C, | |
0dfc2392 | 4236 | 0, 0, FN_RX5_B, 0, |
ee8f0cb3 | 4237 | 0, 0, 0, 0, |
0dfc2392 | 4238 | /* IPSR13_7_4 [4] */ |
ee8f0cb3 | 4239 | IFN_RX2_A, 0, 0, FN_SD2_WP_B, |
0dfc2392 MV |
4240 | FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C, |
4241 | 0, FN_FSO_CFE_1x, 0, 0, | |
ee8f0cb3 | 4242 | 0, 0, 0, 0, |
0dfc2392 | 4243 | /* IPSR13_3_0 [4] */ |
ee8f0cb3 | 4244 | IFN_TX2_A, 0, 0, FN_SD2_CD_B, |
0dfc2392 MV |
4245 | FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C, |
4246 | 0, FN_FSO_CFE_0x, 0, 0, | |
ee8f0cb3 NI |
4247 | } |
4248 | }, | |
0dfc2392 | 4249 | { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32, |
ee8f0cb3 | 4250 | 4, 4, 4, 4, 4, 4, 4, 4) { |
0dfc2392 | 4251 | /* IPSR14_31_28 [4] */ |
ee8f0cb3 NI |
4252 | IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0, |
4253 | 0, 0, 0, FN_MOUT2, | |
4254 | 0, 0, 0, 0, | |
4255 | 0, 0, 0, 0, | |
0dfc2392 MV |
4256 | /* IPSR14_27_24 [4] */ |
4257 | IFN_SSI_WS01239, 0, FN_MSIOF1_SS1_F, 0, | |
4258 | 0, 0, 0, 0, FN_MOUT1, | |
ee8f0cb3 NI |
4259 | 0, 0, 0, 0, |
4260 | 0, 0, 0, 0, | |
0dfc2392 MV |
4261 | /* IPSR14_23_20 [4] */ |
4262 | IFN_SSI_SCK01239, 0, FN_MSIOF1_TXD_F, 0, | |
ee8f0cb3 NI |
4263 | 0, 0, 0, FN_MOUT0, |
4264 | 0, 0, 0, 0, | |
4265 | 0, 0, 0, 0, | |
0dfc2392 | 4266 | /* IPSR14_19_16 [4] */ |
ee8f0cb3 NI |
4267 | IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0, |
4268 | 0, 0, 0, 0, | |
4269 | 0, 0, 0, 0, | |
4270 | 0, 0, 0, 0, | |
0dfc2392 | 4271 | /* IPSR14_15_12 [4] */ |
ee8f0cb3 NI |
4272 | IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0, |
4273 | FN_SDA1_B, 0, 0, 0, | |
4274 | 0, 0, 0, 0, | |
4275 | 0, 0, 0, 0, | |
0dfc2392 | 4276 | /* IPSR14_11_8 [4] */ |
ee8f0cb3 NI |
4277 | IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0, |
4278 | FN_SCL1_B, 0, 0, 0, | |
4279 | 0, 0, 0, 0, | |
4280 | 0, 0, 0, 0, | |
0dfc2392 MV |
4281 | /* IPSR14_7_4 [4] */ |
4282 | IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A, | |
4283 | FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0, | |
ee8f0cb3 | 4284 | FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0, |
0dfc2392 MV |
4285 | 0, 0, 0, 0, |
4286 | /* IPSR14_3_0 [4] */ | |
4287 | IFN_MSIOF0_SS1, FN_RX5_A, FN_NFWPx_A, FN_AUDIO_CLKA_C, | |
4288 | FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0, | |
ee8f0cb3 NI |
4289 | FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0, |
4290 | 0, 0, 0, 0, | |
4291 | } | |
4292 | }, | |
0dfc2392 | 4293 | { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32, |
ee8f0cb3 | 4294 | 4, 4, 4, 4, 4, 4, 4, 4) { |
0dfc2392 | 4295 | /* IPSR15_31_28 [4] */ |
ee8f0cb3 NI |
4296 | IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0, |
4297 | 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A, | |
4298 | FN_RIF2_D1_A, 0, 0, 0, | |
4299 | 0, 0, 0, 0, | |
0dfc2392 | 4300 | /* IPSR15_27_24 [4] */ |
ee8f0cb3 NI |
4301 | IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0, |
4302 | 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A, | |
4303 | FN_RIF2_SYNC_A, 0, 0, 0, | |
4304 | 0, 0, 0, 0, | |
0dfc2392 | 4305 | /* IPSR15_23_20 [4] */ |
ee8f0cb3 NI |
4306 | IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0, |
4307 | 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A, | |
4308 | FN_RIF2_CLK_A, 0, 0, 0, | |
4309 | 0, 0, 0, 0, | |
0dfc2392 | 4310 | /* IPSR15_19_16 [4] */ |
ee8f0cb3 NI |
4311 | IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0, |
4312 | 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A, | |
4313 | FN_RIF2_D0_A, 0, 0, 0, | |
4314 | 0, 0, 0, 0, | |
0dfc2392 | 4315 | /* IPSR15_15_12 [4] */ |
ee8f0cb3 NI |
4316 | IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0, |
4317 | 0, 0, FN_STP_IVCXO27_0_A, 0, | |
4318 | 0, 0, 0, 0, | |
4319 | 0, 0, 0, 0, | |
0dfc2392 | 4320 | /* IPSR15_11_8 [4] */ |
ee8f0cb3 NI |
4321 | IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0, |
4322 | 0, 0, FN_STP_OPWM_0_A, 0, | |
4323 | 0, 0, 0, 0, | |
4324 | 0, 0, 0, 0, | |
0dfc2392 | 4325 | /* IPSR15_7_4 [4] */ |
ee8f0cb3 NI |
4326 | IFN_SSI_SDATA2_A, 0, 0, 0, |
4327 | FN_SSI_SCK1_B, 0, 0, FN_MOUT6, | |
4328 | 0, 0, 0, 0, | |
4329 | 0, 0, 0, 0, | |
0dfc2392 | 4330 | /* IPSR15_3_0 [4] */ |
ee8f0cb3 NI |
4331 | IFN_SSI_SDATA1_A, 0, 0, 0, |
4332 | 0, 0, 0, FN_MOUT5, | |
4333 | 0, 0, 0, 0, | |
4334 | 0, 0, 0, 0, | |
4335 | } | |
4336 | }, | |
0dfc2392 | 4337 | { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32, |
ee8f0cb3 | 4338 | 4, 4, 4, 4, 4, 4, 4, 4) { |
0dfc2392 | 4339 | /* IPSR16_31_28 [4] */ |
ee8f0cb3 | 4340 | IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A, |
0dfc2392 | 4341 | FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5_A, |
ee8f0cb3 NI |
4342 | 0, 0, 0, 0, |
4343 | 0, 0, 0, 0, | |
0dfc2392 | 4344 | /* IPSR16_27_24 [4] */ |
ee8f0cb3 NI |
4345 | IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0, |
4346 | 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A, | |
0dfc2392 | 4347 | FN_RIF3_D1_A, 0, 0, 0, |
ee8f0cb3 | 4348 | 0, 0, 0, 0, |
0dfc2392 | 4349 | /* IPSR16_23_20 [4] */ |
ee8f0cb3 | 4350 | IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0, |
0dfc2392 | 4351 | 0, FN_TS_SDEN1_A, FN_STP_ISEN_1_A, FN_RIF1_D0_A, |
ee8f0cb3 | 4352 | FN_RIF3_D0_A, 0, FN_TCLK2_A, 0, |
0dfc2392 MV |
4353 | 0, 0, 0, 0, |
4354 | /* IPSR16_19_16 [4] */ | |
ee8f0cb3 | 4355 | IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0, |
0dfc2392 | 4356 | 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A, |
ee8f0cb3 NI |
4357 | FN_RIF3_SYNC_A, 0, 0, 0, |
4358 | 0, 0, 0, 0, | |
0dfc2392 | 4359 | /* IPSR16_15_12 [4] */ |
ee8f0cb3 NI |
4360 | IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0, |
4361 | 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A, | |
4362 | FN_RIF3_CLK_A, 0, 0, 0, | |
4363 | 0, 0, 0, 0, | |
0dfc2392 | 4364 | /* IPSR16_11_8 [4] */ |
ee8f0cb3 | 4365 | IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D, |
0dfc2392 | 4366 | 0, 0, 0, 0, |
ee8f0cb3 NI |
4367 | FN_SATA_DEVSLP_A, 0, 0, 0, |
4368 | 0, 0, 0, 0, | |
0dfc2392 MV |
4369 | /* IPSR16_7_4 [4] */ |
4370 | IFN_SSI_WS6, 0, 0, FN_SIM0_D_D, | |
ee8f0cb3 NI |
4371 | 0, 0, 0, 0, |
4372 | 0, 0, 0, 0, | |
4373 | 0, 0, 0, 0, | |
0dfc2392 MV |
4374 | /* IPSR16_3_0 [4] */ |
4375 | IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D, | |
4376 | 0, 0, 0, 0, | |
ee8f0cb3 NI |
4377 | 0, 0, 0, 0, |
4378 | 0, 0, 0, 0, | |
4379 | } | |
ee8f0cb3 | 4380 | }, |
0dfc2392 | 4381 | { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32, |
ee8f0cb3 | 4382 | 4, 4, 4, 4, 4, 4, 4, 4) { |
0dfc2392 MV |
4383 | /* IPSR17_31_28 [4] */ |
4384 | IFN_USB30_OVC, 0, 0, FN_AUDIO_CLKOUT1_B, | |
4385 | FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D, FN_STP_IVCXO27_0_E, | |
4386 | FN_RIF3_D1_B, 0, FN_FSO_TOEx, FN_TPU0TO1, | |
ee8f0cb3 | 4387 | 0, 0, 0, 0, |
0dfc2392 | 4388 | /* IPSR17_27_24 [4] */ |
ee8f0cb3 NI |
4389 | IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B, |
4390 | FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E, | |
0dfc2392 MV |
4391 | FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0, |
4392 | FN_BPFCLK_C, FN_HRTS2x_C, 0, 0, | |
4393 | /* IPSR17_23_20 [4] */ | |
ee8f0cb3 NI |
4394 | IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0, |
4395 | FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B, | |
0dfc2392 MV |
4396 | FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0, |
4397 | 0, FN_HCTS2x_C, 0, 0, | |
4398 | /* IPSR17_19_16 [4] */ | |
ee8f0cb3 NI |
4399 | IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C, |
4400 | FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B, | |
0dfc2392 MV |
4401 | FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0, |
4402 | 0, FN_HTX2_C, 0, 0, | |
4403 | /* IPSR17_15_12 [4] */ | |
ee8f0cb3 NI |
4404 | IFN_USB0_OVC, 0, 0, FN_SIM0_D_C, |
4405 | 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0, | |
0dfc2392 MV |
4406 | FN_RIF3_SYNC_B, 0, 0, 0, |
4407 | 0, FN_HRX2_C, 0, 0, | |
4408 | /* IPSR17_11_8 [4] */ | |
ee8f0cb3 NI |
4409 | IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C, |
4410 | 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B, | |
0dfc2392 MV |
4411 | FN_RIF3_CLK_B, 0, 0, 0, |
4412 | 0, FN_HSCK2_C, 0, 0, | |
4413 | /* IPSR17_7_4 [4] */ | |
ee8f0cb3 | 4414 | IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0, |
0dfc2392 MV |
4415 | 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A, |
4416 | 0, 0, FN_TCLK1_A, 0, | |
ee8f0cb3 | 4417 | 0, 0, 0, 0, |
0dfc2392 | 4418 | /* IPSR17_3_0 [4] */ |
ee8f0cb3 NI |
4419 | IFN_AUDIO_CLKA_A, 0, 0, 0, |
4420 | 0, 0, 0, 0, | |
4421 | 0, 0, 0, FN_CC5_OSCOUT, | |
4422 | 0, 0, 0, 0, | |
4423 | } | |
4424 | }, | |
0dfc2392 | 4425 | { PINMUX_CFG_REG_VAR("IPSR18", 0xE6060248, 32, |
ee8f0cb3 NI |
4426 | 1, 1, 1, 1, 1, 1, 1, 1, |
4427 | 1, 1, 1, 1, 1, 1, 1, 1, | |
4428 | 1, 1, 1, 1, 1, 1, 1, 1, | |
4429 | 4, 4) { | |
4430 | /* reserved [31..24] */ | |
4431 | 0, 0, | |
4432 | 0, 0, | |
4433 | 0, 0, | |
4434 | 0, 0, | |
4435 | 0, 0, | |
4436 | 0, 0, | |
4437 | 0, 0, | |
4438 | 0, 0, | |
4439 | /* reserved [23..16] */ | |
4440 | 0, 0, | |
4441 | 0, 0, | |
4442 | 0, 0, | |
4443 | 0, 0, | |
4444 | 0, 0, | |
4445 | 0, 0, | |
4446 | 0, 0, | |
4447 | 0, 0, | |
4448 | /* reserved [15..8] */ | |
4449 | 0, 0, | |
4450 | 0, 0, | |
4451 | 0, 0, | |
4452 | 0, 0, | |
4453 | 0, 0, | |
4454 | 0, 0, | |
4455 | 0, 0, | |
4456 | 0, 0, | |
0dfc2392 MV |
4457 | /* IPSR18_7_4 [4] */ |
4458 | IFN_USB3_OVC, 0, 0, FN_AUDIO_CLKOUT3_B, | |
ee8f0cb3 NI |
4459 | FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0, |
4460 | FN_RIF2_D1_B, 0, 0, FN_TPU0TO3, | |
0dfc2392 MV |
4461 | FN_FMIN_C, FN_FMIN_D, 0, 0, |
4462 | /* IPSR18_3_0 [4] */ | |
4463 | IFN_USB3_PWEN, 0, 0, FN_AUDIO_CLKOUT2_B, | |
4464 | FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0, | |
ee8f0cb3 | 4465 | FN_RIF2_D0_B, 0, 0, FN_TPU0TO2, |
0dfc2392 | 4466 | FN_FMCLK_C, FN_FMCLK_D, 0, 0, |
ee8f0cb3 NI |
4467 | } |
4468 | }, | |
4469 | { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32, | |
0dfc2392 MV |
4470 | 3, 2, 3, 1, 1, 1, 1, 1, 2, 1, |
4471 | 1, 2, 1, 1, 1, 2, 2, 1, 2, 1, 1, 1) { | |
4472 | /* MOD_SEL0 */ | |
4473 | /* sel_msiof3[3](0,1,2,3,4) */ | |
ee8f0cb3 NI |
4474 | FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1, |
4475 | FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3, | |
0dfc2392 MV |
4476 | FN_SEL_MSIOF3_4, 0, |
4477 | 0, 0, | |
4478 | /* sel_msiof2[2](0,1,2,3) */ | |
ee8f0cb3 NI |
4479 | FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1, |
4480 | FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3, | |
0dfc2392 | 4481 | /* sel_msiof1[3](0,1,2,3,4,5,6) */ |
ee8f0cb3 NI |
4482 | FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1, |
4483 | FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3, | |
4484 | FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5, | |
4485 | FN_SEL_MSIOF1_6, 0, | |
0dfc2392 | 4486 | /* sel_lbsc[1](0,1) */ |
ee8f0cb3 | 4487 | FN_SEL_LBSC_0, FN_SEL_LBSC_1, |
0dfc2392 | 4488 | /* sel_iebus[1](0,1) */ |
ee8f0cb3 | 4489 | FN_SEL_IEBUS_0, FN_SEL_IEBUS_1, |
0dfc2392 | 4490 | /* sel_i2c2[1](0,1) */ |
ee8f0cb3 | 4491 | FN_SEL_I2C2_0, FN_SEL_I2C2_1, |
0dfc2392 | 4492 | /* sel_i2c1[1](0,1) */ |
ee8f0cb3 | 4493 | FN_SEL_I2C1_0, FN_SEL_I2C1_1, |
0dfc2392 | 4494 | /* sel_hscif4[1](0,1) */ |
ee8f0cb3 | 4495 | FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1, |
0dfc2392 | 4496 | /* sel_hscif3[2](0,1,2,3) */ |
ee8f0cb3 NI |
4497 | FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1, |
4498 | FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3, | |
0dfc2392 | 4499 | /* sel_hscif1[1](0,1) */ |
ee8f0cb3 | 4500 | FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1, |
0dfc2392 MV |
4501 | /* reserved[1] */ |
4502 | 0, 0, | |
4503 | /* sel_hscif2[2](0,1,2) */ | |
4504 | FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1, | |
4505 | FN_SEL_HSCIF2_2, 0, | |
4506 | /* sel_etheravb[1](0,1) */ | |
ee8f0cb3 | 4507 | FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1, |
0dfc2392 | 4508 | /* sel_drif3[1](0,1) */ |
ee8f0cb3 | 4509 | FN_SEL_DRIF3_0, FN_SEL_DRIF3_1, |
0dfc2392 | 4510 | /* sel_drif2[1](0,1) */ |
ee8f0cb3 | 4511 | FN_SEL_DRIF2_0, FN_SEL_DRIF2_1, |
0dfc2392 | 4512 | /* sel_drif1[2](0,1,2) */ |
ee8f0cb3 NI |
4513 | FN_SEL_DRIF1_0, FN_SEL_DRIF1_1, |
4514 | FN_SEL_DRIF1_2, 0, | |
0dfc2392 | 4515 | /* sel_drif0[2](0,1,2) */ |
ee8f0cb3 NI |
4516 | FN_SEL_DRIF0_0, FN_SEL_DRIF0_1, |
4517 | FN_SEL_DRIF0_2, 0, | |
0dfc2392 | 4518 | /* sel_canfd0[1](0,1) */ |
ee8f0cb3 | 4519 | FN_SEL_CANFD_0, FN_SEL_CANFD_1, |
0dfc2392 MV |
4520 | /* sel_adg_a[2](0,1,2) */ |
4521 | FN_SEL_ADG_A_0, FN_SEL_ADG_A_1, | |
4522 | FN_SEL_ADG_A_2, 0, | |
4523 | /* reserved[3]*/ | |
4524 | 0, 0, | |
4525 | 0, 0, | |
4526 | 0, 0, | |
ee8f0cb3 NI |
4527 | } |
4528 | }, | |
4529 | { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32, | |
4530 | 2, 3, 1, 2, | |
4531 | 3, 1, 1, 2, 1, | |
0dfc2392 MV |
4532 | 2, 1, 1, 1, 1, 1, 1, |
4533 | 1, 1, 1, 1, 1, 1, 1, 1) { | |
4534 | /* sel_tsif1[2](0,1,2,3) */ | |
4535 | FN_SEL_TSIF1_0, FN_SEL_TSIF1_1, | |
4536 | FN_SEL_TSIF1_2, FN_SEL_TSIF1_3, | |
4537 | /* sel_tsif0[3](0,1,2,3,4) */ | |
4538 | FN_SEL_TSIF0_0, FN_SEL_TSIF0_1, | |
4539 | FN_SEL_TSIF0_2, FN_SEL_TSIF0_3, | |
4540 | FN_SEL_TSIF0_4, 0, | |
4541 | 0, 0, | |
4542 | /* sel_timer_tmu1[1](0,1) */ | |
4543 | FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1, | |
4544 | /* sel_ssp1_1[2](0,1,2,3) */ | |
4545 | FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1, | |
4546 | FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3, | |
4547 | /* sel_ssp1_0[3](0,1,2,3,4) */ | |
4548 | FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1, | |
4549 | FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3, | |
4550 | FN_SEL_SSP1_0_4, 0, | |
4551 | 0, 0, | |
4552 | /* sel_ssi1[1](0,1) */ | |
4553 | FN_SEL_SSI_0, FN_SEL_SSI_1, | |
4554 | /* sel_speed_pulse_if[1](0,1) */ | |
4555 | FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1, | |
4556 | /* sel_simcard[2](0,1,2,3) */ | |
4557 | FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1, | |
4558 | FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3, | |
4559 | /* sel_sdhi2[1](0,1) */ | |
4560 | FN_SEL_SDHI2_0, FN_SEL_SDHI2_1, | |
4561 | /* sel_scif4[2](0,1,2) */ | |
4562 | FN_SEL_SCIF4_0, FN_SEL_SCIF4_1, | |
4563 | FN_SEL_SCIF4_2, 0, | |
4564 | /* sel_scif3[1](0,1) */ | |
4565 | FN_SEL_SCIF3_0, FN_SEL_SCIF3_1, | |
4566 | /* sel_scif2[1](0,1) */ | |
4567 | FN_SEL_SCIF2_0, FN_SEL_SCIF2_1, | |
4568 | /* sel_scif1[1](0,1) */ | |
4569 | FN_SEL_SCIF1_0, FN_SEL_SCIF1_1, | |
4570 | /* sel_scif[1](0,1) */ | |
4571 | FN_SEL_SCIF_0, FN_SEL_SCIF_1, | |
4572 | /* sel_remocon[1](0,1) */ | |
4573 | FN_SEL_REMOCON_0, FN_SEL_REMOCON_1, | |
4574 | /* reserved[8..7] */ | |
4575 | 0, 0, | |
4576 | 0, 0, | |
4577 | /* sel_rcan0[1](0,1) */ | |
4578 | FN_SEL_RCAN_0, FN_SEL_RCAN_1, | |
4579 | /* sel_pwm6[1](0,1) */ | |
4580 | FN_SEL_PWM6_0, FN_SEL_PWM6_1, | |
4581 | /* sel_pwm5[1](0,1) */ | |
4582 | FN_SEL_PWM5_0, FN_SEL_PWM5_1, | |
4583 | /* sel_pwm4[1](0,1) */ | |
4584 | FN_SEL_PWM4_0, FN_SEL_PWM4_1, | |
4585 | /* sel_pwm3[1](0,1) */ | |
4586 | FN_SEL_PWM3_0, FN_SEL_PWM3_1, | |
4587 | /* sel_pwm2[1](0,1) */ | |
4588 | FN_SEL_PWM2_0, FN_SEL_PWM2_1, | |
4589 | /* sel_pwm1[1](0,1) */ | |
4590 | FN_SEL_PWM1_0, FN_SEL_PWM1_1, | |
ee8f0cb3 NI |
4591 | } |
4592 | }, | |
4593 | { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32, | |
0dfc2392 MV |
4594 | 1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1, |
4595 | 1, 1, 1, 1, 1, 1, 1, 1, | |
4596 | 1, 1, 1, 1, 1, 1, 1, 1) { | |
4597 | /* i2c_sel_5[1](0,1) */ | |
4598 | FN_I2C_SEL_5_0, FN_I2C_SEL_5_1, | |
4599 | /* i2c_sel_3[1](0,1) */ | |
4600 | FN_I2C_SEL_3_0, FN_I2C_SEL_3_1, | |
4601 | /* i2c_sel_0[1](0,1) */ | |
4602 | FN_I2C_SEL_0_0, FN_I2C_SEL_0_1, | |
4603 | /* sel_fm[2](0,1,2,3) */ | |
4604 | FN_SEL_FM_0, FN_SEL_FM_1, | |
4605 | FN_SEL_FM_2, FN_SEL_FM_3, | |
4606 | /* sel_scif5[1](0,1) */ | |
4607 | FN_SEL_SCIF5_0, FN_SEL_SCIF5_1, | |
4608 | /* sel_i2c6[3](0,1,2) */ | |
4609 | FN_SEL_I2C6_0, FN_SEL_I2C6_1, | |
4610 | FN_SEL_I2C6_2, 0, | |
4611 | /* sel_ndfc[1](0,1) */ | |
4612 | FN_SEL_NDFC_0, FN_SEL_NDFC_1, | |
4613 | /* sel_ssi2[1](0,1) */ | |
4614 | FN_SEL_SSI2_0, FN_SEL_SSI2_1, | |
4615 | /* sel_ssi9[1](0,1) */ | |
4616 | FN_SEL_SSI9_0, FN_SEL_SSI9_1, | |
4617 | /* sel_timer_tmu2[1](0,1) */ | |
4618 | FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1, | |
4619 | /* sel_adg_b[1](0,1) */ | |
4620 | FN_SEL_ADG_B_0, FN_SEL_ADG_B_1, | |
4621 | /* sel_adg_c[1](0,1) */ | |
4622 | FN_SEL_ADG_C_0, FN_SEL_ADG_C_1, | |
4623 | /* reserved[16..16] */ | |
4624 | 0, 0, | |
4625 | /* reserved[15..8] */ | |
4626 | 0, 0, | |
4627 | 0, 0, | |
4628 | 0, 0, | |
4629 | 0, 0, | |
4630 | 0, 0, | |
4631 | 0, 0, | |
4632 | 0, 0, | |
4633 | 0, 0, | |
4634 | /* reserved[7..1] */ | |
4635 | 0, 0, | |
4636 | 0, 0, | |
4637 | 0, 0, | |
4638 | 0, 0, | |
4639 | 0, 0, | |
4640 | 0, 0, | |
4641 | 0, 0, | |
4642 | /* sel_vin4[1](0,1) */ | |
4643 | FN_SEL_VIN4_0, FN_SEL_VIN4_1, | |
ee8f0cb3 NI |
4644 | } |
4645 | }, | |
ee8f0cb3 NI |
4646 | { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) { |
4647 | 0, 0, | |
4648 | 0, 0, | |
4649 | 0, 0, | |
4650 | 0, 0, | |
4651 | 0, 0, | |
4652 | 0, 0, | |
4653 | 0, 0, | |
4654 | 0, 0, | |
4655 | ||
4656 | 0, 0, | |
4657 | 0, 0, | |
4658 | 0, 0, | |
4659 | 0, 0, | |
4660 | 0, 0, | |
4661 | 0, 0, | |
4662 | 0, 0, | |
4663 | 0, 0, | |
4664 | ||
4665 | GP_0_15_IN, GP_0_15_OUT, | |
4666 | GP_0_14_IN, GP_0_14_OUT, | |
4667 | GP_0_13_IN, GP_0_13_OUT, | |
4668 | GP_0_12_IN, GP_0_12_OUT, | |
4669 | GP_0_11_IN, GP_0_11_OUT, | |
4670 | GP_0_10_IN, GP_0_10_OUT, | |
4671 | GP_0_9_IN, GP_0_9_OUT, | |
4672 | GP_0_8_IN, GP_0_8_OUT, | |
4673 | GP_0_7_IN, GP_0_7_OUT, | |
4674 | GP_0_6_IN, GP_0_6_OUT, | |
4675 | GP_0_5_IN, GP_0_5_OUT, | |
4676 | GP_0_4_IN, GP_0_4_OUT, | |
4677 | GP_0_3_IN, GP_0_3_OUT, | |
4678 | GP_0_2_IN, GP_0_2_OUT, | |
4679 | GP_0_1_IN, GP_0_1_OUT, | |
4680 | GP_0_0_IN, GP_0_0_OUT, | |
4681 | } | |
4682 | }, | |
4683 | { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) { | |
4684 | 0, 0, | |
4685 | 0, 0, | |
4686 | 0, 0, | |
0dfc2392 | 4687 | GP_1_28_IN, GP_1_28_OUT, |
ee8f0cb3 NI |
4688 | GP_1_27_IN, GP_1_27_OUT, |
4689 | GP_1_26_IN, GP_1_26_OUT, | |
4690 | GP_1_25_IN, GP_1_25_OUT, | |
4691 | GP_1_24_IN, GP_1_24_OUT, | |
4692 | GP_1_23_IN, GP_1_23_OUT, | |
4693 | GP_1_22_IN, GP_1_22_OUT, | |
4694 | GP_1_21_IN, GP_1_21_OUT, | |
4695 | GP_1_20_IN, GP_1_20_OUT, | |
4696 | GP_1_19_IN, GP_1_19_OUT, | |
4697 | GP_1_18_IN, GP_1_18_OUT, | |
4698 | GP_1_17_IN, GP_1_17_OUT, | |
4699 | GP_1_16_IN, GP_1_16_OUT, | |
4700 | GP_1_15_IN, GP_1_15_OUT, | |
4701 | GP_1_14_IN, GP_1_14_OUT, | |
4702 | GP_1_13_IN, GP_1_13_OUT, | |
4703 | GP_1_12_IN, GP_1_12_OUT, | |
4704 | GP_1_11_IN, GP_1_11_OUT, | |
4705 | GP_1_10_IN, GP_1_10_OUT, | |
4706 | GP_1_9_IN, GP_1_9_OUT, | |
4707 | GP_1_8_IN, GP_1_8_OUT, | |
4708 | GP_1_7_IN, GP_1_7_OUT, | |
4709 | GP_1_6_IN, GP_1_6_OUT, | |
4710 | GP_1_5_IN, GP_1_5_OUT, | |
4711 | GP_1_4_IN, GP_1_4_OUT, | |
4712 | GP_1_3_IN, GP_1_3_OUT, | |
4713 | GP_1_2_IN, GP_1_2_OUT, | |
4714 | GP_1_1_IN, GP_1_1_OUT, | |
4715 | GP_1_0_IN, GP_1_0_OUT, | |
4716 | } | |
4717 | }, | |
4718 | { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) { | |
4719 | 0, 0, | |
4720 | 0, 0, | |
4721 | 0, 0, | |
4722 | 0, 0, | |
4723 | 0, 0, | |
4724 | 0, 0, | |
4725 | 0, 0, | |
4726 | 0, 0, | |
4727 | ||
4728 | 0, 0, | |
4729 | 0, 0, | |
4730 | 0, 0, | |
4731 | 0, 0, | |
4732 | 0, 0, | |
4733 | 0, 0, | |
4734 | 0, 0, | |
4735 | 0, 0, | |
4736 | ||
4737 | 0, 0, | |
4738 | GP_2_14_IN, GP_2_14_OUT, | |
4739 | GP_2_13_IN, GP_2_13_OUT, | |
4740 | GP_2_12_IN, GP_2_12_OUT, | |
4741 | GP_2_11_IN, GP_2_11_OUT, | |
4742 | GP_2_10_IN, GP_2_10_OUT, | |
4743 | GP_2_9_IN, GP_2_9_OUT, | |
4744 | GP_2_8_IN, GP_2_8_OUT, | |
4745 | GP_2_7_IN, GP_2_7_OUT, | |
4746 | GP_2_6_IN, GP_2_6_OUT, | |
4747 | GP_2_5_IN, GP_2_5_OUT, | |
4748 | GP_2_4_IN, GP_2_4_OUT, | |
4749 | GP_2_3_IN, GP_2_3_OUT, | |
4750 | GP_2_2_IN, GP_2_2_OUT, | |
4751 | GP_2_1_IN, GP_2_1_OUT, | |
4752 | GP_2_0_IN, GP_2_0_OUT, | |
4753 | } | |
4754 | }, | |
4755 | { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) { | |
4756 | 0, 0, | |
4757 | 0, 0, | |
4758 | 0, 0, | |
4759 | 0, 0, | |
4760 | 0, 0, | |
4761 | 0, 0, | |
4762 | 0, 0, | |
4763 | 0, 0, | |
4764 | ||
4765 | 0, 0, | |
4766 | 0, 0, | |
4767 | 0, 0, | |
4768 | 0, 0, | |
4769 | 0, 0, | |
4770 | 0, 0, | |
4771 | 0, 0, | |
4772 | 0, 0, | |
4773 | ||
4774 | GP_3_15_IN, GP_3_15_OUT, | |
4775 | GP_3_14_IN, GP_3_14_OUT, | |
4776 | GP_3_13_IN, GP_3_13_OUT, | |
4777 | GP_3_12_IN, GP_3_12_OUT, | |
4778 | GP_3_11_IN, GP_3_11_OUT, | |
4779 | GP_3_10_IN, GP_3_10_OUT, | |
4780 | GP_3_9_IN, GP_3_9_OUT, | |
4781 | GP_3_8_IN, GP_3_8_OUT, | |
4782 | GP_3_7_IN, GP_3_7_OUT, | |
4783 | GP_3_6_IN, GP_3_6_OUT, | |
4784 | GP_3_5_IN, GP_3_5_OUT, | |
4785 | GP_3_4_IN, GP_3_4_OUT, | |
4786 | GP_3_3_IN, GP_3_3_OUT, | |
4787 | GP_3_2_IN, GP_3_2_OUT, | |
4788 | GP_3_1_IN, GP_3_1_OUT, | |
4789 | GP_3_0_IN, GP_3_0_OUT, | |
4790 | } | |
4791 | }, | |
4792 | { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) { | |
4793 | 0, 0, | |
4794 | 0, 0, | |
4795 | 0, 0, | |
4796 | 0, 0, | |
4797 | 0, 0, | |
4798 | 0, 0, | |
4799 | 0, 0, | |
4800 | 0, 0, | |
4801 | ||
4802 | 0, 0, | |
4803 | 0, 0, | |
4804 | 0, 0, | |
4805 | 0, 0, | |
4806 | 0, 0, | |
4807 | 0, 0, | |
4808 | GP_4_17_IN, GP_4_17_OUT, | |
4809 | GP_4_16_IN, GP_4_16_OUT, | |
4810 | ||
4811 | GP_4_15_IN, GP_4_15_OUT, | |
4812 | GP_4_14_IN, GP_4_14_OUT, | |
4813 | GP_4_13_IN, GP_4_13_OUT, | |
4814 | GP_4_12_IN, GP_4_12_OUT, | |
4815 | GP_4_11_IN, GP_4_11_OUT, | |
4816 | GP_4_10_IN, GP_4_10_OUT, | |
4817 | GP_4_9_IN, GP_4_9_OUT, | |
4818 | GP_4_8_IN, GP_4_8_OUT, | |
4819 | GP_4_7_IN, GP_4_7_OUT, | |
4820 | GP_4_6_IN, GP_4_6_OUT, | |
4821 | GP_4_5_IN, GP_4_5_OUT, | |
4822 | GP_4_4_IN, GP_4_4_OUT, | |
4823 | GP_4_3_IN, GP_4_3_OUT, | |
4824 | GP_4_2_IN, GP_4_2_OUT, | |
4825 | GP_4_1_IN, GP_4_1_OUT, | |
4826 | GP_4_0_IN, GP_4_0_OUT, | |
4827 | } | |
4828 | }, | |
4829 | { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) { | |
4830 | 0, 0, | |
4831 | 0, 0, | |
4832 | 0, 0, | |
4833 | 0, 0, | |
4834 | 0, 0, | |
4835 | 0, 0, | |
4836 | GP_5_25_IN, GP_5_25_OUT, | |
4837 | GP_5_24_IN, GP_5_24_OUT, | |
4838 | ||
4839 | GP_5_23_IN, GP_5_23_OUT, | |
4840 | GP_5_22_IN, GP_5_22_OUT, | |
4841 | GP_5_21_IN, GP_5_21_OUT, | |
4842 | GP_5_20_IN, GP_5_20_OUT, | |
4843 | GP_5_19_IN, GP_5_19_OUT, | |
4844 | GP_5_18_IN, GP_5_18_OUT, | |
4845 | GP_5_17_IN, GP_5_17_OUT, | |
4846 | GP_5_16_IN, GP_5_16_OUT, | |
4847 | ||
4848 | GP_5_15_IN, GP_5_15_OUT, | |
4849 | GP_5_14_IN, GP_5_14_OUT, | |
4850 | GP_5_13_IN, GP_5_13_OUT, | |
4851 | GP_5_12_IN, GP_5_12_OUT, | |
4852 | GP_5_11_IN, GP_5_11_OUT, | |
4853 | GP_5_10_IN, GP_5_10_OUT, | |
4854 | GP_5_9_IN, GP_5_9_OUT, | |
4855 | GP_5_8_IN, GP_5_8_OUT, | |
4856 | GP_5_7_IN, GP_5_7_OUT, | |
4857 | GP_5_6_IN, GP_5_6_OUT, | |
4858 | GP_5_5_IN, GP_5_5_OUT, | |
4859 | GP_5_4_IN, GP_5_4_OUT, | |
4860 | GP_5_3_IN, GP_5_3_OUT, | |
4861 | GP_5_2_IN, GP_5_2_OUT, | |
4862 | GP_5_1_IN, GP_5_1_OUT, | |
4863 | GP_5_0_IN, GP_5_0_OUT, | |
4864 | } | |
4865 | }, | |
4866 | { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) { | |
4867 | GP_INOUTSEL(6) | |
4868 | } | |
4869 | }, | |
4870 | { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) { | |
4871 | 0, 0, | |
4872 | 0, 0, | |
4873 | 0, 0, | |
4874 | 0, 0, | |
4875 | 0, 0, | |
4876 | 0, 0, | |
4877 | 0, 0, | |
4878 | 0, 0, | |
4879 | ||
4880 | 0, 0, | |
4881 | 0, 0, | |
4882 | 0, 0, | |
4883 | 0, 0, | |
4884 | 0, 0, | |
4885 | 0, 0, | |
4886 | 0, 0, | |
4887 | 0, 0, | |
4888 | ||
4889 | 0, 0, | |
4890 | 0, 0, | |
4891 | 0, 0, | |
4892 | 0, 0, | |
4893 | 0, 0, | |
4894 | 0, 0, | |
4895 | 0, 0, | |
4896 | 0, 0, | |
4897 | ||
4898 | 0, 0, | |
4899 | 0, 0, | |
4900 | 0, 0, | |
4901 | 0, 0, | |
4902 | GP_6_3_IN, GP_6_3_OUT, | |
4903 | GP_6_2_IN, GP_6_2_OUT, | |
4904 | GP_6_1_IN, GP_6_1_OUT, | |
4905 | GP_6_0_IN, GP_6_0_OUT, | |
4906 | } | |
4907 | }, | |
4908 | { }, | |
4909 | }; | |
4910 | ||
4911 | static struct pinmux_data_reg pinmux_data_regs[] = { | |
4912 | /* use OUTDT registers? */ | |
4913 | { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) { | |
4914 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4915 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4916 | GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA, | |
4917 | GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA, | |
4918 | GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA, | |
4919 | GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA } | |
4920 | }, | |
4921 | { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) { | |
0dfc2392 | 4922 | 0, 0, 0, GP_1_28_DATA, |
ee8f0cb3 NI |
4923 | GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA, |
4924 | GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA, | |
4925 | GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA, | |
4926 | GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA, | |
4927 | GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA, | |
4928 | GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA, | |
4929 | GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA } | |
4930 | }, | |
4931 | { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) { | |
4932 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4933 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4934 | 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA, | |
4935 | GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA, | |
4936 | GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA, | |
4937 | GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA } | |
4938 | }, | |
4939 | { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) { | |
4940 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4941 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4942 | GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA, | |
4943 | GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA, | |
4944 | GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA, | |
4945 | GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA } | |
4946 | }, | |
4947 | { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) { | |
4948 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4949 | 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA, | |
4950 | GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA, | |
4951 | GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA, | |
4952 | GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA, | |
4953 | GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA } | |
4954 | }, | |
4955 | { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) { | |
4956 | 0, 0, 0, 0, | |
4957 | 0, 0, GP_5_25_DATA, GP_5_24_DATA, | |
4958 | GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA, | |
4959 | GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA, | |
4960 | GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA, | |
4961 | GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA, | |
4962 | GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA, | |
4963 | GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA } | |
4964 | }, | |
4965 | { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) { | |
4966 | GP_INDT(6) } | |
4967 | }, | |
4968 | { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) { | |
4969 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4970 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4971 | 0, 0, 0, 0, 0, 0, 0, 0, | |
4972 | 0, 0, 0, 0, | |
4973 | GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA } | |
4974 | }, | |
0dfc2392 | 4975 | { }, |
ee8f0cb3 NI |
4976 | }; |
4977 | ||
0dfc2392 | 4978 | |
ee8f0cb3 NI |
4979 | static struct pinmux_info r8a7795_pinmux_info = { |
4980 | .name = "r8a7795_pfc", | |
4981 | ||
4982 | .unlock_reg = 0xe6060000, /* PMMR */ | |
4983 | ||
4984 | .reserved_id = PINMUX_RESERVED, | |
4985 | .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END }, | |
4986 | .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END }, | |
4987 | .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END }, | |
4988 | .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END }, | |
4989 | .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END }, | |
4990 | ||
4991 | .first_gpio = GPIO_GP_0_0, | |
0dfc2392 | 4992 | .last_gpio = GPIO_FN_FMIN_D, |
ee8f0cb3 NI |
4993 | |
4994 | .gpios = pinmux_gpios, | |
4995 | .cfg_regs = pinmux_config_regs, | |
4996 | .data_regs = pinmux_data_regs, | |
4997 | ||
4998 | .gpio_data = pinmux_data, | |
4999 | .gpio_data_size = ARRAY_SIZE(pinmux_data), | |
5000 | }; | |
5001 | ||
5002 | void r8a7795_pinmux_init(void) | |
5003 | { | |
5004 | register_pinmux(&r8a7795_pinmux_info); | |
5005 | } |