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168eef7a KY |
1 | /* |
2 | * (C) Copyright 2017 Rockchip Electronics Co., Ltd. | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | #include <common.h> | |
7 | #include <clk.h> | |
8 | #include <dm.h> | |
9 | #include <ram.h> | |
c964a0dc | 10 | #include <syscon.h> |
168eef7a KY |
11 | #include <asm/io.h> |
12 | #include <asm/arch/clock.h> | |
13 | #include <asm/arch/periph.h> | |
14 | #include <asm/arch/grf_rk322x.h> | |
15 | #include <asm/arch/boot_mode.h> | |
16 | ||
17 | DECLARE_GLOBAL_DATA_PTR; | |
18 | ||
19 | #define GRF_BASE 0x11000000 | |
20 | ||
21 | static void setup_boot_mode(void) | |
22 | { | |
23 | struct rk322x_grf *const grf = (void *)GRF_BASE; | |
24 | int boot_mode = readl(&grf->os_reg[4]); | |
25 | ||
26 | debug("boot mode %x.\n", boot_mode); | |
27 | ||
28 | /* Clear boot mode */ | |
29 | writel(BOOT_NORMAL, &grf->os_reg[4]); | |
30 | ||
31 | switch (boot_mode) { | |
32 | case BOOT_FASTBOOT: | |
33 | printf("enter fastboot!\n"); | |
382bee57 | 34 | env_set("preboot", "setenv preboot; fastboot usb0"); |
168eef7a KY |
35 | break; |
36 | case BOOT_UMS: | |
37 | printf("enter UMS!\n"); | |
382bee57 | 38 | env_set("preboot", "setenv preboot; ums mmc 0"); |
168eef7a KY |
39 | break; |
40 | } | |
41 | } | |
42 | ||
43 | __weak int rk_board_late_init(void) | |
44 | { | |
45 | return 0; | |
46 | } | |
47 | ||
48 | int board_late_init(void) | |
49 | { | |
50 | setup_boot_mode(); | |
51 | ||
52 | return rk_board_late_init(); | |
53 | } | |
54 | ||
55 | int board_init(void) | |
56 | { | |
57 | #include <asm/arch/grf_rk322x.h> | |
58 | /* Enable early UART2 channel 1 on the RK322x */ | |
59 | #define GRF_BASE 0x11000000 | |
60 | struct rk322x_grf * const grf = (void *)GRF_BASE; | |
61 | ||
62 | rk_clrsetreg(&grf->gpio1b_iomux, | |
63 | GPIO1B1_MASK | GPIO1B2_MASK, | |
64 | GPIO1B2_UART21_SIN << GPIO1B2_SHIFT | | |
65 | GPIO1B1_UART21_SOUT << GPIO1B1_SHIFT); | |
66 | /* Set channel C as UART2 input */ | |
67 | rk_clrsetreg(&grf->con_iomux, | |
68 | CON_IOMUX_UART2SEL_MASK, | |
69 | CON_IOMUX_UART2SEL_21 << CON_IOMUX_UART2SEL_SHIFT); | |
70 | ||
71 | return 0; | |
72 | } | |
73 | ||
74 | int dram_init_banksize(void) | |
75 | { | |
44c5ba55 | 76 | gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; |
168eef7a | 77 | gd->bd->bi_dram[0].size = 0x8400000; |
44c5ba55 KY |
78 | /* Reserve 0x200000 for OPTEE */ |
79 | gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE | |
80 | + gd->bd->bi_dram[0].size + 0x200000; | |
81 | gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start | |
82 | + gd->ram_size - gd->bd->bi_dram[1].start; | |
168eef7a KY |
83 | |
84 | return 0; | |
85 | } | |
86 | ||
87 | #ifndef CONFIG_SYS_DCACHE_OFF | |
88 | void enable_caches(void) | |
89 | { | |
90 | /* Enable D-cache. I-cache is already enabled in start.S */ | |
91 | dcache_enable(); | |
92 | } | |
93 | #endif | |
94 | ||
95 | #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) | |
96 | #include <usb.h> | |
97 | #include <usb/dwc2_udc.h> | |
98 | ||
99 | static struct dwc2_plat_otg_data rk322x_otg_data = { | |
100 | .rx_fifo_sz = 512, | |
101 | .np_tx_fifo_sz = 16, | |
102 | .tx_fifo_sz = 128, | |
103 | }; | |
104 | ||
105 | int board_usb_init(int index, enum usb_init_type init) | |
106 | { | |
107 | int node; | |
108 | const char *mode; | |
109 | bool matched = false; | |
110 | const void *blob = gd->fdt_blob; | |
111 | ||
112 | /* find the usb_otg node */ | |
113 | node = fdt_node_offset_by_compatible(blob, -1, | |
114 | "rockchip,rk3288-usb"); | |
115 | ||
116 | while (node > 0) { | |
117 | mode = fdt_getprop(blob, node, "dr_mode", NULL); | |
118 | if (mode && strcmp(mode, "otg") == 0) { | |
119 | matched = true; | |
120 | break; | |
121 | } | |
122 | ||
123 | node = fdt_node_offset_by_compatible(blob, node, | |
124 | "rockchip,rk3288-usb"); | |
125 | } | |
126 | if (!matched) { | |
127 | debug("Not found usb_otg device\n"); | |
128 | return -ENODEV; | |
129 | } | |
130 | rk322x_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg"); | |
131 | ||
132 | return dwc2_udc_probe(&rk322x_otg_data); | |
133 | } | |
134 | ||
135 | int board_usb_cleanup(int index, enum usb_init_type init) | |
136 | { | |
137 | return 0; | |
138 | } | |
139 | #endif | |
c964a0dc KY |
140 | |
141 | #if defined(CONFIG_USB_FUNCTION_FASTBOOT) | |
142 | int fb_set_reboot_flag(void) | |
143 | { | |
144 | struct rk322x_grf *grf; | |
145 | ||
146 | printf("Setting reboot to fastboot flag ...\n"); | |
147 | grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); | |
148 | /* Set boot mode to fastboot */ | |
149 | writel(BOOT_FASTBOOT, &grf->os_reg[0]); | |
150 | ||
151 | return 0; | |
152 | } | |
153 | #endif |