projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 7865f4b0 MY |
1 | if ARCH_SOCFPGA |
| 2 | ||
| cd9b7317 MV |
3 | config TARGET_SOCFPGA_ARRIA5 |
| 4 | bool | |
| 5 | ||
| 6 | config TARGET_SOCFPGA_CYCLONE5 | |
| 7 | bool | |
| 8 | ||
| 7865f4b0 MY |
9 | choice |
| 10 | prompt "Altera SOCFPGA board select" | |
| a26cd049 | 11 | optional |
| 7865f4b0 | 12 | |
| cd9b7317 MV |
13 | config TARGET_SOCFPGA_ARRIA5_SOCDK |
| 14 | bool "Altera SOCFPGA SoCDK (Arria V)" | |
| 15 | select TARGET_SOCFPGA_ARRIA5 | |
| 7865f4b0 | 16 | |
| cd9b7317 MV |
17 | config TARGET_SOCFPGA_CYCLONE5_SOCDK |
| 18 | bool "Altera SOCFPGA SoCDK (Cyclone V)" | |
| 19 | select TARGET_SOCFPGA_CYCLONE5 | |
| 7865f4b0 | 20 | |
| d88995a8 MV |
21 | config TARGET_SOCFPGA_DENX_MCVEVK |
| 22 | bool "DENX MCVEVK (Cyclone V)" | |
| 23 | select TARGET_SOCFPGA_CYCLONE5 | |
| 24 | ||
| ae9996c8 SR |
25 | config TARGET_SOCFPGA_SR1500 |
| 26 | bool "SR1500 (Cyclone V)" | |
| 27 | select TARGET_SOCFPGA_CYCLONE5 | |
| 28 | ||
| 856b30da MV |
29 | config TARGET_SOCFPGA_EBV_SOCRATES |
| 30 | bool "EBV SoCrates (Cyclone V)" | |
| 31 | select TARGET_SOCFPGA_CYCLONE5 | |
| 32 | ||
| 55c7a765 DN |
33 | config TARGET_SOCFPGA_TERASIC_DE0_NANO |
| 34 | bool "Terasic DE0-Nano-Atlas (Cyclone V)" | |
| 35 | select TARGET_SOCFPGA_CYCLONE5 | |
| 36 | ||
| 952caa28 MV |
37 | config TARGET_SOCFPGA_TERASIC_SOCKIT |
| 38 | bool "Terasic SoCkit (Cyclone V)" | |
| 39 | select TARGET_SOCFPGA_CYCLONE5 | |
| 40 | ||
| 7865f4b0 MY |
41 | endchoice |
| 42 | ||
| 43 | config SYS_BOARD | |
| f0892401 MV |
44 | default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK |
| 45 | default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK | |
| 55c7a765 | 46 | default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO |
| d88995a8 | 47 | default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK |
| 952caa28 | 48 | default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT |
| 856b30da | 49 | default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES |
| ae9996c8 | 50 | default "sr1500" if TARGET_SOCFPGA_SR1500 |
| 7865f4b0 MY |
51 | |
| 52 | config SYS_VENDOR | |
| cd9b7317 MV |
53 | default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK |
| 54 | default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK | |
| d88995a8 | 55 | default "denx" if TARGET_SOCFPGA_DENX_MCVEVK |
| 856b30da | 56 | default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES |
| 55c7a765 | 57 | default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO |
| 952caa28 | 58 | default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT |
| 7865f4b0 MY |
59 | |
| 60 | config SYS_SOC | |
| 61 | default "socfpga" | |
| 62 | ||
| 63 | config SYS_CONFIG_NAME | |
| 3cbc7b87 DN |
64 | default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK |
| 65 | default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK | |
| 55c7a765 | 66 | default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO |
| d88995a8 | 67 | default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK |
| 952caa28 | 68 | default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT |
| 856b30da | 69 | default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES |
| ae9996c8 | 70 | default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500 |
| 7865f4b0 MY |
71 | |
| 72 | endif |