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ARM: uniphier: remove IRQ settings
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84ccd791 1/*
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2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
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9#include <common.h>
10#include <libfdt.h>
11#include <linux/io.h>
12
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13#include "init.h"
14#include "micro-support-card.h"
b78ffc53 15#include "sg-regs.h"
107b3fb4 16#include "soc-info.h"
84ccd791 17
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18DECLARE_GLOBAL_DATA_PTR;
19
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20#ifdef CONFIG_ARCH_UNIPHIER_LD11
21static void uniphier_ld11_misc_init(void)
5ac9dfbe 22{
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23 sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
24 sg_set_iectrl(149);
25 sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
26 sg_set_iectrl(153);
5ac9dfbe 27}
b61664e2 28#endif
5ac9dfbe 29
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30#ifdef CONFIG_ARCH_UNIPHIER_LD20
31static void uniphier_ld20_misc_init(void)
84ccd791 32{
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33 sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
34 sg_set_iectrl(149);
35 sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
36 sg_set_iectrl(153);
37
38 /* ES1 errata: increase VDD09 supply to suppress VBO noise */
39 if (uniphier_get_soc_revision() == 1) {
40 writel(0x00000003, 0x6184e004);
41 writel(0x00000100, 0x6184e040);
42 writel(0x0000b500, 0x6184e024);
43 writel(0x00000001, 0x6184e000);
44 }
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45}
46#endif
47
48struct uniphier_initdata {
e27d6c7d 49 unsigned int soc_id;
26b09c02 50 void (*sbc_init)(void);
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51 void (*pll_init)(void);
52 void (*clk_init)(void);
53 void (*misc_init)(void);
54};
84ccd791 55
7a37bd64 56static const struct uniphier_initdata uniphier_initdata[] = {
ea65c980 57#if defined(CONFIG_ARCH_UNIPHIER_LD4)
b61664e2 58 {
e27d6c7d 59 .soc_id = UNIPHIER_LD4_ID,
26b09c02 60 .sbc_init = uniphier_ld4_sbc_init,
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61 .pll_init = uniphier_ld4_pll_init,
62 .clk_init = uniphier_ld4_clk_init,
63 },
323d1f9d 64#endif
ea65c980 65#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
b61664e2 66 {
e27d6c7d 67 .soc_id = UNIPHIER_PRO4_ID,
26b09c02 68 .sbc_init = uniphier_sbc_init_savepin,
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69 .pll_init = uniphier_pro4_pll_init,
70 .clk_init = uniphier_pro4_clk_init,
71 },
323d1f9d 72#endif
ea65c980 73#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
b61664e2 74 {
e27d6c7d 75 .soc_id = UNIPHIER_SLD8_ID,
26b09c02 76 .sbc_init = uniphier_ld4_sbc_init,
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77 .pll_init = uniphier_ld4_pll_init,
78 .clk_init = uniphier_ld4_clk_init,
79 },
28f40d4a 80#endif
ea65c980 81#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
b61664e2 82 {
e27d6c7d 83 .soc_id = UNIPHIER_PRO5_ID,
26b09c02 84 .sbc_init = uniphier_sbc_init_savepin,
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85 .clk_init = uniphier_pro5_clk_init,
86 },
019df879 87#endif
ea65c980 88#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
b61664e2 89 {
e27d6c7d 90 .soc_id = UNIPHIER_PXS2_ID,
26b09c02 91 .sbc_init = uniphier_pxs2_sbc_init,
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92 .clk_init = uniphier_pxs2_clk_init,
93 },
019df879 94#endif
ea65c980 95#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
b61664e2 96 {
e27d6c7d 97 .soc_id = UNIPHIER_LD6B_ID,
26b09c02 98 .sbc_init = uniphier_pxs2_sbc_init,
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99 .clk_init = uniphier_pxs2_clk_init,
100 },
9d0c2ceb 101#endif
667dbcd0 102#if defined(CONFIG_ARCH_UNIPHIER_LD11)
b61664e2 103 {
e27d6c7d 104 .soc_id = UNIPHIER_LD11_ID,
26b09c02 105 .sbc_init = uniphier_ld11_sbc_init,
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106 .pll_init = uniphier_ld11_pll_init,
107 .clk_init = uniphier_ld11_clk_init,
108 .misc_init = uniphier_ld11_misc_init,
109 },
667dbcd0 110#endif
9d0c2ceb 111#if defined(CONFIG_ARCH_UNIPHIER_LD20)
b61664e2 112 {
e27d6c7d 113 .soc_id = UNIPHIER_LD20_ID,
26b09c02 114 .sbc_init = uniphier_ld11_sbc_init,
b61664e2 115 .pll_init = uniphier_ld20_pll_init,
c21f5854 116 .clk_init = uniphier_ld20_clk_init,
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117 .misc_init = uniphier_ld20_misc_init,
118 },
323d1f9d 119#endif
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120#if defined(CONFIG_ARCH_UNIPHIER_PXS3)
121 {
122 .soc_id = UNIPHIER_PXS3_ID,
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123 .sbc_init = uniphier_pxs2_sbc_init,
124 .pll_init = uniphier_pxs3_pll_init,
81afa9c9 125 .clk_init = uniphier_pxs3_clk_init,
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126 },
127#endif
b61664e2 128};
ee8ef5af 129UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
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130
131int board_init(void)
132{
7a37bd64 133 const struct uniphier_initdata *initdata;
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134
135 led_puts("U0");
136
ee8ef5af 137 initdata = uniphier_get_initdata();
b61664e2 138 if (!initdata) {
ee8ef5af 139 pr_err("unsupported SoC\n");
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140 return -EINVAL;
141 }
142
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143 initdata->sbc_init();
144
145 support_card_init();
146
147 led_puts("U0");
148
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149 if (initdata->pll_init)
150 initdata->pll_init();
e64a6b11 151
e0daca7d 152 led_puts("U1");
198a97a6 153
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154 if (initdata->clk_init)
155 initdata->clk_init();
b2916712 156
e0daca7d 157 led_puts("U2");
b2916712 158
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159 if (initdata->misc_init)
160 initdata->misc_init();
161
e0daca7d 162 led_puts("U3");
b61664e2 163
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164 support_card_late_init();
165
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166 led_puts("Uboo");
167
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168 return 0;
169}