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Commit | Line | Data |
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5894ca00 | 1 | /* |
f6e7f07c | 2 | * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
5894ca00 MY |
3 | * |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
7 | #include <common.h> | |
8 | #include <spl.h> | |
8ea4f49a | 9 | #include <libfdt.h> |
5894ca00 | 10 | #include <nand.h> |
f6e7f07c | 11 | #include <linux/io.h> |
5894ca00 MY |
12 | #include <../drivers/mtd/nand/denali.h> |
13 | ||
fec48163 MY |
14 | #include "boot-mode/boot-device.h" |
15 | ||
5894ca00 MY |
16 | static void nand_denali_wp_disable(void) |
17 | { | |
18 | #ifdef CONFIG_NAND_DENALI | |
19 | /* | |
20 | * Since the boot rom enables the write protection for NAND boot mode, | |
21 | * it must be disabled somewhere for "nand write", "nand erase", etc. | |
22 | * The workaround is here to not disturb the Denali NAND controller | |
23 | * driver just for a really SoC-specific thing. | |
24 | */ | |
25 | void __iomem *denali_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE; | |
26 | ||
27 | writel(WRITE_PROTECT__FLAG, denali_reg + WRITE_PROTECT); | |
28 | #endif | |
29 | } | |
30 | ||
881aa5a7 MY |
31 | #define VENDOR_PREFIX "socionext," |
32 | #define DTB_FILE_PREFIX "uniphier-" | |
33 | ||
34 | static int uniphier_set_fdt_file(void) | |
8ea4f49a MY |
35 | { |
36 | DECLARE_GLOBAL_DATA_PTR; | |
881aa5a7 MY |
37 | const char *compat; |
38 | char dtb_name[256]; | |
39 | int buf_len = 256; | |
40 | int ret; | |
41 | ||
42 | ret = fdt_get_string(gd->fdt_blob, 0, "compatible", &compat); | |
43 | if (ret) | |
44 | return -EINVAL; | |
45 | ||
46 | if (strncmp(compat, VENDOR_PREFIX, strlen(VENDOR_PREFIX))) | |
47 | return -EINVAL; | |
48 | ||
49 | compat += strlen(VENDOR_PREFIX); | |
50 | ||
51 | strncat(dtb_name, DTB_FILE_PREFIX, buf_len); | |
52 | buf_len -= strlen(DTB_FILE_PREFIX); | |
53 | ||
54 | strncat(dtb_name, compat, buf_len); | |
55 | buf_len -= strlen(compat); | |
56 | ||
57 | strncat(dtb_name, ".dtb", buf_len); | |
58 | ||
80630dad | 59 | return setenv("fdt_file", dtb_name); |
8ea4f49a MY |
60 | } |
61 | ||
5894ca00 MY |
62 | int board_late_init(void) |
63 | { | |
64 | puts("MODE: "); | |
65 | ||
fec48163 | 66 | switch (spl_boot_device_raw()) { |
5894ca00 MY |
67 | case BOOT_DEVICE_MMC1: |
68 | printf("eMMC Boot\n"); | |
69 | setenv("bootmode", "emmcboot"); | |
5894ca00 MY |
70 | break; |
71 | case BOOT_DEVICE_NAND: | |
72 | printf("NAND Boot\n"); | |
73 | setenv("bootmode", "nandboot"); | |
74 | nand_denali_wp_disable(); | |
75 | break; | |
76 | case BOOT_DEVICE_NOR: | |
77 | printf("NOR Boot\n"); | |
78 | setenv("bootmode", "norboot"); | |
5894ca00 | 79 | break; |
fec48163 MY |
80 | case BOOT_DEVICE_USB: |
81 | printf("USB Boot\n"); | |
82 | setenv("bootmode", "usbboot"); | |
83 | break; | |
5894ca00 | 84 | default: |
d90b9745 MY |
85 | printf("Unknown\n"); |
86 | break; | |
5894ca00 MY |
87 | } |
88 | ||
881aa5a7 MY |
89 | if (uniphier_set_fdt_file()) |
90 | printf("fdt_file environment was not set correctly\n"); | |
8ea4f49a | 91 | |
5894ca00 MY |
92 | return 0; |
93 | } |