projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| ea6de4ac | 1 | /* |
| f6e7f07c | 2 | * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| ea6de4ac MY |
3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ | |
| 5 | */ | |
| 6 | ||
| 7 | #include <common.h> | |
| f6e7f07c | 8 | #include <linux/io.h> |
| ea6de4ac MY |
9 | #include <mach/sbc-regs.h> |
| 10 | #include <mach/sg-regs.h> | |
| 11 | ||
| 12 | void sbc_init(void) | |
| 13 | { | |
| 14 | u32 tmp; | |
| 15 | ||
| 16 | /* system bus output enable */ | |
| 17 | tmp = readl(PC0CTRL); | |
| 18 | tmp &= 0xfffffcff; | |
| 19 | writel(tmp, PC0CTRL); | |
| 20 | ||
| 21 | /* XECS1: sub/boot memory (boot swap = off/on) */ | |
| 22 | writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL10); | |
| 23 | writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL11); | |
| 24 | writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL12); | |
| 25 | writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL14); | |
| 26 | ||
| 27 | /* XECS0: boot/sub memory (boot swap = off/on) */ | |
| 28 | writel(SBCTRL0_SAVEPIN_MEM_VALUE, SBCTRL00); | |
| 29 | writel(SBCTRL1_SAVEPIN_MEM_VALUE, SBCTRL01); | |
| 30 | writel(SBCTRL2_SAVEPIN_MEM_VALUE, SBCTRL02); | |
| 31 | writel(SBCTRL4_SAVEPIN_MEM_VALUE, SBCTRL04); | |
| 32 | ||
| 33 | /* XECS3: peripherals */ | |
| 34 | writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL30); | |
| 35 | writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL31); | |
| 36 | writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL32); | |
| 37 | writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL34); | |
| 38 | ||
| 39 | /* base address regsiters */ | |
| 40 | writel(0x0000bc01, SBBASE0); | |
| 41 | writel(0x0400bc01, SBBASE1); | |
| 42 | writel(0x0800bf01, SBBASE3); | |
| 43 | ||
| 44 | /* enable access to sub memory when boot swap is on */ | |
| 45 | if (boot_is_swapped()) | |
| 46 | sg_set_pinsel(155, 1); /* PORT24 -> XECS0 */ | |
| 47 | ||
| 48 | sg_set_pinsel(156, 1); /* PORT25 -> XECS3 */ | |
| 49 | } |