[people/ms/u-boot.git] / arch / arm / mach-uniphier / support_card.c

/*
 * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <linux/io.h>
#include <mach/board.h>

#define MICRO_SUPPORT_CARD_RESET	\
				((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034)
#define MICRO_SUPPORT_CARD_REVISION	\
				((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0)
/*
 * 0: reset deassert, 1: reset
 *
 * bit[0]: LAN, I2C, LED
 * bit[1]: UART
 */
void support_card_reset_deassert(void)
{
	writel(0, MICRO_SUPPORT_CARD_RESET);
}

void support_card_reset(void)
{
	writel(3, MICRO_SUPPORT_CARD_RESET);
}

static int support_card_show_revision(void)
{
	u32 revision;

	revision = readl(MICRO_SUPPORT_CARD_REVISION);
	printf("(CPLD version %d.%d)\n", revision >> 4, revision & 0xf);
	return 0;
}

int check_support_card(void)
{
	printf("SC:    Micro Support Card ");
	return support_card_show_revision();
}

void support_card_init(void)
{
	/*
	 * After power on, we need to keep the LAN controller in reset state
	 * for a while. (200 usec)
	 * Fortunately, enough wait time is already inserted in pll_init()
	 * function. So we do not have to wait here.
	 */
	support_card_reset_deassert();
}

#if defined(CONFIG_SMC911X)
#include <netdev.h>

int board_eth_init(bd_t *bis)
{
	return smc911x_initialize(0, CONFIG_SMC911X_BASE);
}
#endif

#if !defined(CONFIG_SYS_NO_FLASH)

#include <mtd/cfi_flash.h>
#include <mach/sbc-regs.h>

struct memory_bank {
	phys_addr_t base;
	unsigned long size;
};

static int mem_is_flash(const struct memory_bank *mem)
{
	const int loop = 128;
	u32 *scratch_addr;
	u32 saved_value;
	int ret = 1;
	int i;

	/* just in case, use the tail of the memory bank */
	scratch_addr = map_physmem(mem->base + mem->size - sizeof(u32) * loop,
				   sizeof(u32) * loop, MAP_NOCACHE);

	for (i = 0; i < loop; i++, scratch_addr++) {
		saved_value = readl(scratch_addr);
		writel(~saved_value, scratch_addr);
		if (readl(scratch_addr) != saved_value) {
			/* We assume no memory or SRAM here. */
			writel(saved_value, scratch_addr);
			ret = 0;
			break;
		}
	}

	unmap_physmem(scratch_addr, MAP_NOCACHE);

	return ret;
}

/* {address, size} */
static const struct memory_bank memory_banks[] = {
	{0x02000000, 0x01f00000},
};

static const struct memory_bank
*flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];

phys_addr_t cfi_flash_bank_addr(int i)
{
	return flash_banks_list[i]->base;
}

unsigned long cfi_flash_bank_size(int i)
{
	return flash_banks_list[i]->size;
}

static void detect_num_flash_banks(void)
{
	const struct memory_bank *memory_bank, *end;

	cfi_flash_num_flash_banks = 0;

	memory_bank = memory_banks;
	end = memory_bank + ARRAY_SIZE(memory_banks);

	for (; memory_bank < end; memory_bank++) {
		if (cfi_flash_num_flash_banks >=
		    CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
			break;

		if (mem_is_flash(memory_bank)) {
			flash_banks_list[cfi_flash_num_flash_banks] =
								memory_bank;

			debug("flash bank found: base = 0x%lx, size = 0x%lx\n",
			      memory_bank->base, memory_bank->size);
			cfi_flash_num_flash_banks++;
		}
	}

	debug("number of flash banks: %d\n", cfi_flash_num_flash_banks);
}
#else /* CONFIG_SYS_NO_FLASH */
void detect_num_flash_banks(void)
{
};
#endif /* CONFIG_SYS_NO_FLASH */

void support_card_late_init(void)
{
	detect_num_flash_banks();
}
Commit	Line	Data
5894ca00	1	/*
f6e7f07c	2	* Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
5894ca00 MY	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
f6e7f07c	8	#include <linux/io.h>
a86ac954	9	#include <mach/board.h>
5894ca00	10
9879842c	11	#define MICRO_SUPPORT_CARD_RESET \
5894ca00	12	((CONFIG_SUPPORT_CARD_BASE) + 0x000D0034)
9879842c	13	#define MICRO_SUPPORT_CARD_REVISION \
5894ca00 MY	14	((CONFIG_SUPPORT_CARD_BASE) + 0x000D00E0)
	15	/*
	16	* 0: reset deassert, 1: reset
	17	*
	18	* bit[0]: LAN, I2C, LED
	19	* bit[1]: UART
	20	*/
	21	void support_card_reset_deassert(void)
	22	{
9879842c	23	writel(0, MICRO_SUPPORT_CARD_RESET);
5894ca00 MY	24	}
	25
	26	void support_card_reset(void)
	27	{
9879842c	28	writel(3, MICRO_SUPPORT_CARD_RESET);
5894ca00 MY	29	}
	30
	31	static int support_card_show_revision(void)
	32	{
	33	u32 revision;
	34
9879842c MY	35	revision = readl(MICRO_SUPPORT_CARD_REVISION);
9879842c MY	36	printf("(CPLD version %d.%d)\n", revision >> 4, revision & 0xf);
5894ca00 MY	37	return 0;
5894ca00 MY	38	}
5894ca00	39
7a3620b2 MY	40	int check_support_card(void)
	41	{
	42	printf("SC: Micro Support Card ");
	43	return support_card_show_revision();
	44	}
	45
5894ca00 MY	46	void support_card_init(void)
	47	{
	48	/*
	49	* After power on, we need to keep the LAN controller in reset state
	50	* for a while. (200 usec)
4d13b1b7	51	* Fortunately, enough wait time is already inserted in pll_init()
5894ca00 MY	52	* function. So we do not have to wait here.
	53	*/
	54	support_card_reset_deassert();
	55	}
	56
5894ca00 MY	57	#if defined(CONFIG_SMC911X)
	58	#include <netdev.h>
	59
	60	int board_eth_init(bd_t *bis)
	61	{
	62	return smc911x_initialize(0, CONFIG_SMC911X_BASE);
	63	}
	64	#endif
	65
	66	#if !defined(CONFIG_SYS_NO_FLASH)
	67
	68	#include <mtd/cfi_flash.h>
a86ac954	69	#include <mach/sbc-regs.h>
5894ca00	70
7a3620b2 MY	71	struct memory_bank {
	72	phys_addr_t base;
	73	unsigned long size;
	74	};
5894ca00	75
7a3620b2	76	static int mem_is_flash(const struct memory_bank *mem)
5894ca00 MY	77	{
	78	const int loop = 128;
	79	u32 *scratch_addr;
	80	u32 saved_value;
	81	int ret = 1;
	82	int i;
	83
7a3620b2 MY	84	/* just in case, use the tail of the memory bank */
	85	scratch_addr = map_physmem(mem->base + mem->size - sizeof(u32) * loop,
	86	sizeof(u32) * loop, MAP_NOCACHE);
5894ca00 MY	87
	88	for (i = 0; i < loop; i++, scratch_addr++) {
	89	saved_value = readl(scratch_addr);
	90	writel(~saved_value, scratch_addr);
	91	if (readl(scratch_addr) != saved_value) {
	92	/* We assume no memory or SRAM here. */
	93	writel(saved_value, scratch_addr);
	94	ret = 0;
	95	break;
	96	}
	97	}
	98
	99	unmap_physmem(scratch_addr, MAP_NOCACHE);
	100
	101	return ret;
	102	}
	103
9879842c MY	104	/* {address, size} */
9879842c MY	105	static const struct memory_bank memory_banks[] = {
7a3620b2 MY	106	{0x02000000, 0x01f00000},
	107	};
	108
7a3620b2 MY	109	static const struct memory_bank
	110	*flash_banks_list[CONFIG_SYS_MAX_FLASH_BANKS_DETECT];
	111
	112	phys_addr_t cfi_flash_bank_addr(int i)
5894ca00	113	{
7a3620b2 MY	114	return flash_banks_list[i]->base;
7a3620b2 MY	115	}
5894ca00	116
7a3620b2 MY	117	unsigned long cfi_flash_bank_size(int i)
	118	{
	119	return flash_banks_list[i]->size;
	120	}
	121
	122	static void detect_num_flash_banks(void)
	123	{
	124	const struct memory_bank memory_bank, end;
	125
	126	cfi_flash_num_flash_banks = 0;
	127
9879842c MY	128	memory_bank = memory_banks;
9879842c MY	129	end = memory_bank + ARRAY_SIZE(memory_banks);
7a3620b2 MY	130
	131	for (; memory_bank < end; memory_bank++) {
	132	if (cfi_flash_num_flash_banks >=
	133	CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
	134	break;
	135
	136	if (mem_is_flash(memory_bank)) {
	137	flash_banks_list[cfi_flash_num_flash_banks] =
	138	memory_bank;
	139
	140	debug("flash bank found: base = 0x%lx, size = 0x%lx\n",
	141	memory_bank->base, memory_bank->size);
	142	cfi_flash_num_flash_banks++;
5894ca00	143	}
5894ca00 MY	144	}
5894ca00 MY	145
7a3620b2 MY	146	debug("number of flash banks: %d\n", cfi_flash_num_flash_banks);
7a3620b2 MY	147	}
4d13b1b7	148	#else /* CONFIG_SYS_NO_FLASH */
7a3620b2 MY	149	void detect_num_flash_banks(void)
	150	{
	151	};
4d13b1b7	152	#endif /* CONFIG_SYS_NO_FLASH */
7a3620b2 MY	153
	154	void support_card_late_init(void)
	155	{
	156	detect_num_flash_banks();
5894ca00	157	}