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[people/ms/u-boot.git] / arch / blackfin / include / asm / blackfin_local.h
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1/*
2 * U-boot - blackfin_local.h
3 *
4 * Copyright (c) 2005-2007 Analog Devices Inc.
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 * MA 02110-1301 USA
23 */
24
25#ifndef __BLACKFIN_LOCAL_H__
26#define __BLACKFIN_LOCAL_H__
27
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28#include <asm/mem_map.h>
29
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30#define LO(con32) ((con32) & 0xFFFF)
31#define lo(con32) ((con32) & 0xFFFF)
32#define HI(con32) (((con32) >> 16) & 0xFFFF)
33#define hi(con32) (((con32) >> 16) & 0xFFFF)
34
35#define OFFSET_(x) (x & 0x0000FFFF)
36#define MK_BMSK_(x) (1 << x)
37
38/* Ideally this should be USEC not MSEC, but the USEC multiplication
39 * likes to overflow 32bit quantities which is all our assembler
40 * currently supports ;(
41 */
42#define USEC_PER_MSEC 1000
43#define MSEC_PER_SEC 1000
44#define BFIN_SCLK (100000000)
45#define SCLK_TO_MSEC(sclk) ((MSEC_PER_SEC * ((sclk) / USEC_PER_MSEC)) / (BFIN_SCLK / USEC_PER_MSEC))
46#define MSEC_TO_SCLK(msec) ((((BFIN_SCLK / USEC_PER_MSEC) * (msec)) / MSEC_PER_SEC) * USEC_PER_MSEC)
47
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48#define L1_CACHE_SHIFT 5
49#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
50
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51#include <asm/linkage.h>
52
53#ifndef __ASSEMBLY__
54# ifdef SHARED_RESOURCES
55# include <asm/shared_resources.h>
56# endif
57
58# include <linux/types.h>
59
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60extern u_long get_vco(void);
61extern u_long get_cclk(void);
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62extern u_long get_sclk(void);
63
f948158f 64# define bfin_revid() (bfin_read_CHIPID() >> 28)
d4d77308 65
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66extern bool bfin_os_log_check(void);
67extern void bfin_os_log_dump(void);
68
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69extern void blackfin_icache_flush_range(const void *, const void *);
70extern void blackfin_dcache_flush_range(const void *, const void *);
fdce83c1 71extern void blackfin_icache_dcache_flush_range(const void *, const void *);
05b75e48 72extern void blackfin_dcache_flush_invalidate_range(const void *, const void *);
d4d77308 73
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74/* Use DMA to move data from on chip to external memory. The L1 instruction
75 * regions can only be accessed via DMA, so if the address in question is in
76 * that region, make sure we attempt to DMA indirectly.
d4d77308 77 */
b93c6864 78# define addr_bfin_on_chip_mem(addr) (((unsigned long)(addr) & 0xFFF00000) == 0xFFA00000)
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79
80# include <asm/system.h>
81
82#if ANOMALY_05000198
83# define NOP_PAD_ANOMALY_05000198 "nop;"
84#else
85# define NOP_PAD_ANOMALY_05000198
86#endif
87
88#define bfin_read8(addr) ({ \
89 uint8_t __v; \
90 __asm__ __volatile__( \
91 NOP_PAD_ANOMALY_05000198 \
92 "%0 = b[%1] (z);" \
93 : "=d" (__v) \
94 : "a" (addr) \
95 ); \
96 __v; })
97
98#define bfin_read16(addr) ({ \
99 uint16_t __v; \
100 __asm__ __volatile__( \
101 NOP_PAD_ANOMALY_05000198 \
102 "%0 = w[%1] (z);" \
103 : "=d" (__v) \
104 : "a" (addr) \
105 ); \
106 __v; })
107
108#define bfin_read32(addr) ({ \
109 uint32_t __v; \
110 __asm__ __volatile__( \
111 NOP_PAD_ANOMALY_05000198 \
112 "%0 = [%1];" \
113 : "=d" (__v) \
114 : "a" (addr) \
115 ); \
116 __v; })
117
118#define bfin_readPTR(addr) bfin_read32(addr)
119
120#define bfin_write8(addr, val) \
121 __asm__ __volatile__( \
122 NOP_PAD_ANOMALY_05000198 \
123 "b[%0] = %1;" \
124 : \
125 : "a" (addr), "d" (val) \
126 : "memory" \
127 )
128
129#define bfin_write16(addr, val) \
130 __asm__ __volatile__( \
131 NOP_PAD_ANOMALY_05000198 \
132 "w[%0] = %1;" \
133 : \
134 : "a" (addr), "d" (val) \
135 : "memory" \
136 )
137
138#define bfin_write32(addr, val) \
139 __asm__ __volatile__( \
140 NOP_PAD_ANOMALY_05000198 \
141 "[%0] = %1;" \
142 : \
143 : "a" (addr), "d" (val) \
144 : "memory" \
145 )
146
147#define bfin_writePTR(addr, val) bfin_write32(addr, val)
148
149/* SSYNC implementation for C file */
150static inline void SSYNC(void)
151{
152 int _tmp;
153 if (ANOMALY_05000312)
154 __asm__ __volatile__(
155 "cli %0;"
156 "nop;"
157 "nop;"
158 "ssync;"
159 "sti %0;"
160 : "=d" (_tmp)
161 );
162 else if (ANOMALY_05000244)
163 __asm__ __volatile__(
164 "nop;"
165 "nop;"
166 "nop;"
167 "ssync;"
168 );
169 else
170 __asm__ __volatile__("ssync;");
171}
172
173/* CSYNC implementation for C file */
174static inline void CSYNC(void)
175{
176 int _tmp;
177 if (ANOMALY_05000312)
178 __asm__ __volatile__(
179 "cli %0;"
180 "nop;"
181 "nop;"
182 "csync;"
183 "sti %0;"
184 : "=d" (_tmp)
185 );
186 else if (ANOMALY_05000244)
187 __asm__ __volatile__(
188 "nop;"
189 "nop;"
190 "nop;"
191 "csync;"
192 );
193 else
194 __asm__ __volatile__("csync;");
195}
196
197#else /* __ASSEMBLY__ */
198
199/* SSYNC & CSYNC implementations for assembly files */
200
201#define ssync(x) SSYNC(x)
202#define csync(x) CSYNC(x)
203
204#if ANOMALY_05000312
205#define SSYNC(scratch) cli scratch; nop; nop; SSYNC; sti scratch;
206#define CSYNC(scratch) cli scratch; nop; nop; CSYNC; sti scratch;
207
208#elif ANOMALY_05000244
209#define SSYNC(scratch) nop; nop; nop; SSYNC;
210#define CSYNC(scratch) nop; nop; nop; CSYNC;
211
212#else
213#define SSYNC(scratch) SSYNC;
214#define CSYNC(scratch) CSYNC;
215
216#endif /* ANOMALY_05000312 & ANOMALY_05000244 handling */
217
218#endif /* __ASSEMBLY__ */
219
220#endif