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47d41cc3 | 1 | /* |
f348ab85 | 2 | * config.h - setup common defines for Blackfin boards based on config.h |
47d41cc3 | 3 | * |
f348ab85 | 4 | * Copyright (c) 2007-2009 Analog Devices Inc. |
47d41cc3 | 5 | * |
f348ab85 | 6 | * Licensed under the GPL-2 or later. |
47d41cc3 KG |
7 | */ |
8 | ||
f348ab85 MF |
9 | #ifndef __ASM_BLACKFIN_CONFIG_POST_H__ |
10 | #define __ASM_BLACKFIN_CONFIG_POST_H__ | |
11 | ||
1fde3eb2 MF |
12 | /* Some of our defines use this (like CONFIG_SYS_GBL_DATA_ADDR) */ |
13 | #include <asm-offsets.h> | |
14 | ||
fbcf8e8c MF |
15 | /* Sanity check CONFIG_BFIN_CPU */ |
16 | #ifndef CONFIG_BFIN_CPU | |
17 | # error CONFIG_BFIN_CPU: your board config needs to define this | |
18 | #endif | |
19 | ||
9c46e71a MF |
20 | #ifndef CONFIG_BFIN_SCRATCH_REG |
21 | # define CONFIG_BFIN_SCRATCH_REG retn | |
22 | #endif | |
23 | ||
8e5c1eda MF |
24 | /* U-Boot wants this config name */ |
25 | #define CONFIG_SYS_CACHELINE_SIZE L1_CACHE_BYTES | |
26 | ||
f348ab85 MF |
27 | /* Make sure the structure is properly aligned */ |
28 | #if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR) | |
29 | # error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned | |
30 | #endif | |
31 | ||
32 | /* Set default CONFIG_VCO_HZ if need be */ | |
33 | #if !defined(CONFIG_VCO_HZ) | |
34 | # if (CONFIG_CLKIN_HALF == 0) | |
35 | # define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) | |
36 | # else | |
37 | # define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) / 2) | |
38 | # endif | |
39 | #endif | |
40 | ||
41 | /* Set default CONFIG_CCLK_HZ if need be */ | |
42 | #if !defined(CONFIG_CCLK_HZ) | |
43 | # if (CONFIG_PLL_BYPASS == 0) | |
44 | # define CONFIG_CCLK_HZ (CONFIG_VCO_HZ / CONFIG_CCLK_DIV) | |
45 | # else | |
46 | # define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ | |
47 | # endif | |
48 | #endif | |
49 | ||
50 | /* Set default CONFIG_SCLK_HZ if need be */ | |
51 | #if !defined(CONFIG_SCLK_HZ) | |
52 | # if (CONFIG_PLL_BYPASS == 0) | |
53 | # define CONFIG_SCLK_HZ (CONFIG_VCO_HZ / CONFIG_SCLK_DIV) | |
54 | # else | |
55 | # define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ | |
56 | # endif | |
57 | #endif | |
58 | ||
59 | /* Since we use these to program PLL registers directly, | |
60 | * make sure the values are sane and won't screw us up. | |
61 | */ | |
62 | #if (CONFIG_VCO_MULT & 0x3F) != CONFIG_VCO_MULT | |
63 | # error CONFIG_VCO_MULT: Invalid value: must fit in 6 bits (0 - 63) | |
64 | #endif | |
65 | #if (CONFIG_CLKIN_HALF & 0x1) != CONFIG_CLKIN_HALF | |
66 | # error CONFIG_CLKIN_HALF: Invalid value: must be 0 or 1 | |
67 | #endif | |
68 | #if (CONFIG_PLL_BYPASS & 0x1) != CONFIG_PLL_BYPASS | |
69 | # error CONFIG_PLL_BYPASS: Invalid value: must be 0 or 1 | |
70 | #endif | |
71 | ||
f19fd87e RG |
72 | /* If we are using KGDB, make sure we defer exceptions */ |
73 | #ifdef CONFIG_CMD_KGDB | |
74 | # define CONFIG_EXCEPTION_DEFER 1 | |
75 | #endif | |
76 | ||
f348ab85 MF |
77 | /* Using L1 scratch pad makes sense for everyone by default. */ |
78 | #ifndef CONFIG_LINUX_CMDLINE_ADDR | |
79 | # define CONFIG_LINUX_CMDLINE_ADDR L1_SRAM_SCRATCH | |
80 | #endif | |
81 | #ifndef CONFIG_LINUX_CMDLINE_SIZE | |
82 | # define CONFIG_LINUX_CMDLINE_SIZE L1_SRAM_SCRATCH_SIZE | |
83 | #endif | |
84 | ||
85 | /* Set default SPI flash CS to the one we boot from */ | |
86 | #if defined(CONFIG_ENV_IS_IN_SPI_FLASH) && !defined(CONFIG_ENV_SPI_CS) | |
87 | # define CONFIG_ENV_SPI_CS BFIN_BOOT_SPI_SSEL | |
88 | #endif | |
89 | ||
76d82187 MF |
90 | /* We need envcrc to embed the env into LDRs */ |
91 | #ifdef CONFIG_ENV_IS_EMBEDDED_IN_LDR | |
92 | # define CONFIG_BUILD_ENVCRC | |
93 | #endif | |
94 | ||
f348ab85 MF |
95 | /* Default/common Blackfin memory layout */ |
96 | #ifndef CONFIG_SYS_SDRAM_BASE | |
97 | # define CONFIG_SYS_SDRAM_BASE 0 | |
98 | #endif | |
99 | #ifndef CONFIG_SYS_MAX_RAM_SIZE | |
100 | # define CONFIG_SYS_MAX_RAM_SIZE (CONFIG_MEM_SIZE * 1024 * 1024) | |
101 | #endif | |
102 | #ifndef CONFIG_SYS_MONITOR_BASE | |
7527feef MF |
103 | # if CONFIG_SYS_MAX_RAM_SIZE |
104 | # define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_MAX_RAM_SIZE - CONFIG_SYS_MONITOR_LEN) | |
105 | # else | |
106 | # define CONFIG_SYS_MONITOR_BASE 0 | |
107 | # endif | |
f348ab85 MF |
108 | #endif |
109 | #ifndef CONFIG_SYS_MALLOC_BASE | |
110 | # define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN) | |
111 | #endif | |
f348ab85 | 112 | #ifndef CONFIG_STACKBASE |
a4932d78 | 113 | # define CONFIG_STACKBASE (CONFIG_SYS_MALLOC_BASE - 4) |
f348ab85 MF |
114 | #endif |
115 | #ifndef CONFIG_SYS_MEMTEST_START | |
116 | # define CONFIG_SYS_MEMTEST_START 0 | |
117 | #endif | |
118 | #ifndef CONFIG_SYS_MEMTEST_END | |
119 | # define CONFIG_SYS_MEMTEST_END (CONFIG_STACKBASE - 8192 + 4) | |
120 | #endif | |
272d2fc2 MF |
121 | #ifndef CONFIG_SYS_POST_WORD_ADDR |
122 | # define CONFIG_SYS_POST_WORD_ADDR (L1_DATA_B_SRAM + L1_DATA_B_SRAM_SIZE - 4) | |
123 | #endif | |
f348ab85 MF |
124 | |
125 | /* Check to make sure everything fits in external RAM */ | |
7527feef MF |
126 | #if CONFIG_SYS_MAX_RAM_SIZE && \ |
127 | ((CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) > CONFIG_SYS_MAX_RAM_SIZE) | |
f348ab85 MF |
128 | # error Memory Map does not fit into configuration |
129 | #endif | |
130 | ||
131 | /* Default/common Blackfin environment settings */ | |
132 | #ifndef CONFIG_LOADADDR | |
133 | # define CONFIG_LOADADDR 0x1000000 | |
134 | #endif | |
135 | #ifndef CONFIG_SYS_LOAD_ADDR | |
136 | # define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR | |
137 | #endif | |
138 | #ifndef CONFIG_SYS_BOOTM_LEN | |
139 | # define CONFIG_SYS_BOOTM_LEN 0x4000000 | |
140 | #endif | |
f348ab85 | 141 | #ifndef CONFIG_SYS_CBSIZE |
69a25ce3 | 142 | # define CONFIG_SYS_CBSIZE 1024 |
f19fd87e RG |
143 | #elif defined(CONFIG_CMD_KGDB) && CONFIG_SYS_CBSIZE < 1024 |
144 | # error "kgdb needs cbsize to be >= 1024" | |
f348ab85 MF |
145 | #endif |
146 | #ifndef CONFIG_SYS_BARGSIZE | |
147 | # define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
148 | #endif | |
149 | #ifndef CONFIG_SYS_PBSIZE | |
150 | # define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) | |
151 | #endif | |
152 | #ifndef CONFIG_SYS_MAXARGS | |
153 | # define CONFIG_SYS_MAXARGS 16 | |
154 | #endif | |
47d41cc3 | 155 | |
2151374f MF |
156 | /* Blackfin POST tests */ |
157 | #ifdef CONFIG_POST_BSPEC1_GPIO_LEDS | |
158 | # define CONFIG_POST_BSPEC1 \ | |
159 | { \ | |
160 | "LED test", "led", "This test verifies LEDs on the board.", \ | |
161 | POST_MEM | POST_ALWAYS, &led_post_test, NULL, NULL, \ | |
162 | CONFIG_SYS_POST_BSPEC1, \ | |
163 | } | |
164 | #endif | |
165 | #ifdef CONFIG_POST_BSPEC2_GPIO_BUTTONS | |
166 | # define CONFIG_POST_BSPEC2 \ | |
167 | { \ | |
168 | "Button test", "button", "This test verifies buttons on the board.", \ | |
169 | POST_MEM | POST_ALWAYS, &button_post_test, NULL, NULL, \ | |
170 | CONFIG_SYS_POST_BSPEC2, \ | |
171 | } | |
172 | #endif | |
173 | ||
240182d5 SZ |
174 | #define CONFIG_CPU CONFIG_BFIN_CPU |
175 | ||
47d41cc3 | 176 | #endif |