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mx6sxsabreauto: Remove legacy CONFIG_PCA953X
[people/ms/u-boot.git] / arch / blackfin / include / asm / mach-bf548 / ADSP-EDN-BF547-extended_cdef.h
CommitLineData
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1/* DO NOT EDIT THIS FILE
2 * Automatically generated by generate-cdef-headers.xsl
3 * DO NOT EDIT THIS FILE
4 */
5
6#ifndef __BFIN_CDEF_ADSP_EDN_BF547_extended__
7#define __BFIN_CDEF_ADSP_EDN_BF547_extended__
8
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9#define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
10#define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
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11#define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
12#define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
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13#define bfin_read_SIC_IMASK2() bfin_read32(SIC_IMASK2)
14#define bfin_write_SIC_IMASK2(val) bfin_write32(SIC_IMASK2, val)
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15#define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
16#define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val)
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17#define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1)
18#define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val)
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19#define bfin_read_SIC_ISR2() bfin_read32(SIC_ISR2)
20#define bfin_write_SIC_ISR2(val) bfin_write32(SIC_ISR2, val)
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21#define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0)
22#define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val)
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23#define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
24#define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
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25#define bfin_read_SIC_IWR2() bfin_read32(SIC_IWR2)
26#define bfin_write_SIC_IWR2(val) bfin_write32(SIC_IWR2, val)
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27#define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
28#define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
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29#define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
30#define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1, val)
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31#define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
32#define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2, val)
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33#define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
34#define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)
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35#define bfin_read_SIC_IAR4() bfin_read32(SIC_IAR4)
36#define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4, val)
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37#define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)
38#define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
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39#define bfin_read_SIC_IAR6() bfin_read32(SIC_IAR6)
40#define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6, val)
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41#define bfin_read_SIC_IAR7() bfin_read32(SIC_IAR7)
42#define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7, val)
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43#define bfin_read_SIC_IAR8() bfin_read32(SIC_IAR8)
44#define bfin_write_SIC_IAR8(val) bfin_write32(SIC_IAR8, val)
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45#define bfin_read_SIC_IAR9() bfin_read32(SIC_IAR9)
46#define bfin_write_SIC_IAR9(val) bfin_write32(SIC_IAR9, val)
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47#define bfin_read_SIC_IAR10() bfin_read32(SIC_IAR10)
48#define bfin_write_SIC_IAR10(val) bfin_write32(SIC_IAR10, val)
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49#define bfin_read_SIC_IAR11() bfin_read32(SIC_IAR11)
50#define bfin_write_SIC_IAR11(val) bfin_write32(SIC_IAR11, val)
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51#define bfin_read_DMAC0_TCPER() bfin_read16(DMAC0_TCPER)
52#define bfin_write_DMAC0_TCPER(val) bfin_write16(DMAC0_TCPER, val)
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53#define bfin_read_DMAC0_TCCNT() bfin_read16(DMAC0_TCCNT)
54#define bfin_write_DMAC0_TCCNT(val) bfin_write16(DMAC0_TCCNT, val)
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55#define bfin_read_DMAC1_TCPER() bfin_read16(DMAC1_TCPER)
56#define bfin_write_DMAC1_TCPER(val) bfin_write16(DMAC1_TCPER, val)
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57#define bfin_read_DMAC1_TCCNT() bfin_read16(DMAC1_TCCNT)
58#define bfin_write_DMAC1_TCCNT(val) bfin_write16(DMAC1_TCCNT, val)
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59#define bfin_read_DMAC1_PERIMUX() bfin_read16(DMAC1_PERIMUX)
60#define bfin_write_DMAC1_PERIMUX(val) bfin_write16(DMAC1_PERIMUX, val)
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61#define bfin_read_DMA0_NEXT_DESC_PTR() bfin_readPTR(DMA0_NEXT_DESC_PTR)
62#define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_writePTR(DMA0_NEXT_DESC_PTR, val)
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63#define bfin_read_DMA0_START_ADDR() bfin_readPTR(DMA0_START_ADDR)
64#define bfin_write_DMA0_START_ADDR(val) bfin_writePTR(DMA0_START_ADDR, val)
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65#define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
66#define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG, val)
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67#define bfin_read_DMA0_X_COUNT() bfin_read16(DMA0_X_COUNT)
68#define bfin_write_DMA0_X_COUNT(val) bfin_write16(DMA0_X_COUNT, val)
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69#define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
70#define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY, val)
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71#define bfin_read_DMA0_Y_COUNT() bfin_read16(DMA0_Y_COUNT)
72#define bfin_write_DMA0_Y_COUNT(val) bfin_write16(DMA0_Y_COUNT, val)
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73#define bfin_read_DMA0_Y_MODIFY() bfin_read16(DMA0_Y_MODIFY)
74#define bfin_write_DMA0_Y_MODIFY(val) bfin_write16(DMA0_Y_MODIFY, val)
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75#define bfin_read_DMA0_CURR_DESC_PTR() bfin_readPTR(DMA0_CURR_DESC_PTR)
76#define bfin_write_DMA0_CURR_DESC_PTR(val) bfin_writePTR(DMA0_CURR_DESC_PTR, val)
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77#define bfin_read_DMA0_CURR_ADDR() bfin_readPTR(DMA0_CURR_ADDR)
78#define bfin_write_DMA0_CURR_ADDR(val) bfin_writePTR(DMA0_CURR_ADDR, val)
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79#define bfin_read_DMA0_IRQ_STATUS() bfin_read16(DMA0_IRQ_STATUS)
80#define bfin_write_DMA0_IRQ_STATUS(val) bfin_write16(DMA0_IRQ_STATUS, val)
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81#define bfin_read_DMA0_PERIPHERAL_MAP() bfin_read16(DMA0_PERIPHERAL_MAP)
82#define bfin_write_DMA0_PERIPHERAL_MAP(val) bfin_write16(DMA0_PERIPHERAL_MAP, val)
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83#define bfin_read_DMA0_CURR_X_COUNT() bfin_read16(DMA0_CURR_X_COUNT)
84#define bfin_write_DMA0_CURR_X_COUNT(val) bfin_write16(DMA0_CURR_X_COUNT, val)
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85#define bfin_read_DMA0_CURR_Y_COUNT() bfin_read16(DMA0_CURR_Y_COUNT)
86#define bfin_write_DMA0_CURR_Y_COUNT(val) bfin_write16(DMA0_CURR_Y_COUNT, val)
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87#define bfin_read_DMA1_NEXT_DESC_PTR() bfin_readPTR(DMA1_NEXT_DESC_PTR)
88#define bfin_write_DMA1_NEXT_DESC_PTR(val) bfin_writePTR(DMA1_NEXT_DESC_PTR, val)
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89#define bfin_read_DMA1_START_ADDR() bfin_readPTR(DMA1_START_ADDR)
90#define bfin_write_DMA1_START_ADDR(val) bfin_writePTR(DMA1_START_ADDR, val)
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91#define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
92#define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
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93#define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
94#define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT, val)
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95#define bfin_read_DMA1_X_MODIFY() bfin_read16(DMA1_X_MODIFY)
96#define bfin_write_DMA1_X_MODIFY(val) bfin_write16(DMA1_X_MODIFY, val)
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97#define bfin_read_DMA1_Y_COUNT() bfin_read16(DMA1_Y_COUNT)
98#define bfin_write_DMA1_Y_COUNT(val) bfin_write16(DMA1_Y_COUNT, val)
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99#define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
100#define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY, val)
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101#define bfin_read_DMA1_CURR_DESC_PTR() bfin_readPTR(DMA1_CURR_DESC_PTR)
102#define bfin_write_DMA1_CURR_DESC_PTR(val) bfin_writePTR(DMA1_CURR_DESC_PTR, val)
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103#define bfin_read_DMA1_CURR_ADDR() bfin_readPTR(DMA1_CURR_ADDR)
104#define bfin_write_DMA1_CURR_ADDR(val) bfin_writePTR(DMA1_CURR_ADDR, val)
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105#define bfin_read_DMA1_IRQ_STATUS() bfin_read16(DMA1_IRQ_STATUS)
106#define bfin_write_DMA1_IRQ_STATUS(val) bfin_write16(DMA1_IRQ_STATUS, val)
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107#define bfin_read_DMA1_PERIPHERAL_MAP() bfin_read16(DMA1_PERIPHERAL_MAP)
108#define bfin_write_DMA1_PERIPHERAL_MAP(val) bfin_write16(DMA1_PERIPHERAL_MAP, val)
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109#define bfin_read_DMA1_CURR_X_COUNT() bfin_read16(DMA1_CURR_X_COUNT)
110#define bfin_write_DMA1_CURR_X_COUNT(val) bfin_write16(DMA1_CURR_X_COUNT, val)
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111#define bfin_read_DMA1_CURR_Y_COUNT() bfin_read16(DMA1_CURR_Y_COUNT)
112#define bfin_write_DMA1_CURR_Y_COUNT(val) bfin_write16(DMA1_CURR_Y_COUNT, val)
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113#define bfin_read_DMA2_NEXT_DESC_PTR() bfin_readPTR(DMA2_NEXT_DESC_PTR)
114#define bfin_write_DMA2_NEXT_DESC_PTR(val) bfin_writePTR(DMA2_NEXT_DESC_PTR, val)
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115#define bfin_read_DMA2_START_ADDR() bfin_readPTR(DMA2_START_ADDR)
116#define bfin_write_DMA2_START_ADDR(val) bfin_writePTR(DMA2_START_ADDR, val)
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117#define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
118#define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG, val)
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119#define bfin_read_DMA2_X_COUNT() bfin_read16(DMA2_X_COUNT)
120#define bfin_write_DMA2_X_COUNT(val) bfin_write16(DMA2_X_COUNT, val)
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121#define bfin_read_DMA2_X_MODIFY() bfin_read16(DMA2_X_MODIFY)
122#define bfin_write_DMA2_X_MODIFY(val) bfin_write16(DMA2_X_MODIFY, val)
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123#define bfin_read_DMA2_Y_COUNT() bfin_read16(DMA2_Y_COUNT)
124#define bfin_write_DMA2_Y_COUNT(val) bfin_write16(DMA2_Y_COUNT, val)
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125#define bfin_read_DMA2_Y_MODIFY() bfin_read16(DMA2_Y_MODIFY)
126#define bfin_write_DMA2_Y_MODIFY(val) bfin_write16(DMA2_Y_MODIFY, val)
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127#define bfin_read_DMA2_CURR_DESC_PTR() bfin_readPTR(DMA2_CURR_DESC_PTR)
128#define bfin_write_DMA2_CURR_DESC_PTR(val) bfin_writePTR(DMA2_CURR_DESC_PTR, val)
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129#define bfin_read_DMA2_CURR_ADDR() bfin_readPTR(DMA2_CURR_ADDR)
130#define bfin_write_DMA2_CURR_ADDR(val) bfin_writePTR(DMA2_CURR_ADDR, val)
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131#define bfin_read_DMA2_IRQ_STATUS() bfin_read16(DMA2_IRQ_STATUS)
132#define bfin_write_DMA2_IRQ_STATUS(val) bfin_write16(DMA2_IRQ_STATUS, val)
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133#define bfin_read_DMA2_PERIPHERAL_MAP() bfin_read16(DMA2_PERIPHERAL_MAP)
134#define bfin_write_DMA2_PERIPHERAL_MAP(val) bfin_write16(DMA2_PERIPHERAL_MAP, val)
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135#define bfin_read_DMA2_CURR_X_COUNT() bfin_read16(DMA2_CURR_X_COUNT)
136#define bfin_write_DMA2_CURR_X_COUNT(val) bfin_write16(DMA2_CURR_X_COUNT, val)
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137#define bfin_read_DMA2_CURR_Y_COUNT() bfin_read16(DMA2_CURR_Y_COUNT)
138#define bfin_write_DMA2_CURR_Y_COUNT(val) bfin_write16(DMA2_CURR_Y_COUNT, val)
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139#define bfin_read_DMA3_NEXT_DESC_PTR() bfin_readPTR(DMA3_NEXT_DESC_PTR)
140#define bfin_write_DMA3_NEXT_DESC_PTR(val) bfin_writePTR(DMA3_NEXT_DESC_PTR, val)
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141#define bfin_read_DMA3_START_ADDR() bfin_readPTR(DMA3_START_ADDR)
142#define bfin_write_DMA3_START_ADDR(val) bfin_writePTR(DMA3_START_ADDR, val)
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143#define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)
144#define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG, val)
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145#define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
146#define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT, val)
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147#define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
148#define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
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149#define bfin_read_DMA3_Y_COUNT() bfin_read16(DMA3_Y_COUNT)
150#define bfin_write_DMA3_Y_COUNT(val) bfin_write16(DMA3_Y_COUNT, val)
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151#define bfin_read_DMA3_Y_MODIFY() bfin_read16(DMA3_Y_MODIFY)
152#define bfin_write_DMA3_Y_MODIFY(val) bfin_write16(DMA3_Y_MODIFY, val)
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153#define bfin_read_DMA3_CURR_DESC_PTR() bfin_readPTR(DMA3_CURR_DESC_PTR)
154#define bfin_write_DMA3_CURR_DESC_PTR(val) bfin_writePTR(DMA3_CURR_DESC_PTR, val)
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155#define bfin_read_DMA3_CURR_ADDR() bfin_readPTR(DMA3_CURR_ADDR)
156#define bfin_write_DMA3_CURR_ADDR(val) bfin_writePTR(DMA3_CURR_ADDR, val)
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157#define bfin_read_DMA3_IRQ_STATUS() bfin_read16(DMA3_IRQ_STATUS)
158#define bfin_write_DMA3_IRQ_STATUS(val) bfin_write16(DMA3_IRQ_STATUS, val)
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159#define bfin_read_DMA3_PERIPHERAL_MAP() bfin_read16(DMA3_PERIPHERAL_MAP)
160#define bfin_write_DMA3_PERIPHERAL_MAP(val) bfin_write16(DMA3_PERIPHERAL_MAP, val)
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161#define bfin_read_DMA3_CURR_X_COUNT() bfin_read16(DMA3_CURR_X_COUNT)
162#define bfin_write_DMA3_CURR_X_COUNT(val) bfin_write16(DMA3_CURR_X_COUNT, val)
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163#define bfin_read_DMA3_CURR_Y_COUNT() bfin_read16(DMA3_CURR_Y_COUNT)
164#define bfin_write_DMA3_CURR_Y_COUNT(val) bfin_write16(DMA3_CURR_Y_COUNT, val)
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165#define bfin_read_DMA4_NEXT_DESC_PTR() bfin_readPTR(DMA4_NEXT_DESC_PTR)
166#define bfin_write_DMA4_NEXT_DESC_PTR(val) bfin_writePTR(DMA4_NEXT_DESC_PTR, val)
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167#define bfin_read_DMA4_START_ADDR() bfin_readPTR(DMA4_START_ADDR)
168#define bfin_write_DMA4_START_ADDR(val) bfin_writePTR(DMA4_START_ADDR, val)
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169#define bfin_read_DMA4_CONFIG() bfin_read16(DMA4_CONFIG)
170#define bfin_write_DMA4_CONFIG(val) bfin_write16(DMA4_CONFIG, val)
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171#define bfin_read_DMA4_X_COUNT() bfin_read16(DMA4_X_COUNT)
172#define bfin_write_DMA4_X_COUNT(val) bfin_write16(DMA4_X_COUNT, val)
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173#define bfin_read_DMA4_X_MODIFY() bfin_read16(DMA4_X_MODIFY)
174#define bfin_write_DMA4_X_MODIFY(val) bfin_write16(DMA4_X_MODIFY, val)
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175#define bfin_read_DMA4_Y_COUNT() bfin_read16(DMA4_Y_COUNT)
176#define bfin_write_DMA4_Y_COUNT(val) bfin_write16(DMA4_Y_COUNT, val)
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177#define bfin_read_DMA4_Y_MODIFY() bfin_read16(DMA4_Y_MODIFY)
178#define bfin_write_DMA4_Y_MODIFY(val) bfin_write16(DMA4_Y_MODIFY, val)
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179#define bfin_read_DMA4_CURR_DESC_PTR() bfin_readPTR(DMA4_CURR_DESC_PTR)
180#define bfin_write_DMA4_CURR_DESC_PTR(val) bfin_writePTR(DMA4_CURR_DESC_PTR, val)
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181#define bfin_read_DMA4_CURR_ADDR() bfin_readPTR(DMA4_CURR_ADDR)
182#define bfin_write_DMA4_CURR_ADDR(val) bfin_writePTR(DMA4_CURR_ADDR, val)
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183#define bfin_read_DMA4_IRQ_STATUS() bfin_read16(DMA4_IRQ_STATUS)
184#define bfin_write_DMA4_IRQ_STATUS(val) bfin_write16(DMA4_IRQ_STATUS, val)
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185#define bfin_read_DMA4_PERIPHERAL_MAP() bfin_read16(DMA4_PERIPHERAL_MAP)
186#define bfin_write_DMA4_PERIPHERAL_MAP(val) bfin_write16(DMA4_PERIPHERAL_MAP, val)
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187#define bfin_read_DMA4_CURR_X_COUNT() bfin_read16(DMA4_CURR_X_COUNT)
188#define bfin_write_DMA4_CURR_X_COUNT(val) bfin_write16(DMA4_CURR_X_COUNT, val)
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189#define bfin_read_DMA4_CURR_Y_COUNT() bfin_read16(DMA4_CURR_Y_COUNT)
190#define bfin_write_DMA4_CURR_Y_COUNT(val) bfin_write16(DMA4_CURR_Y_COUNT, val)
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191#define bfin_read_DMA5_NEXT_DESC_PTR() bfin_readPTR(DMA5_NEXT_DESC_PTR)
192#define bfin_write_DMA5_NEXT_DESC_PTR(val) bfin_writePTR(DMA5_NEXT_DESC_PTR, val)
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193#define bfin_read_DMA5_START_ADDR() bfin_readPTR(DMA5_START_ADDR)
194#define bfin_write_DMA5_START_ADDR(val) bfin_writePTR(DMA5_START_ADDR, val)
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195#define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
196#define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG, val)
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197#define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
198#define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT, val)
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199#define bfin_read_DMA5_X_MODIFY() bfin_read16(DMA5_X_MODIFY)
200#define bfin_write_DMA5_X_MODIFY(val) bfin_write16(DMA5_X_MODIFY, val)
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201#define bfin_read_DMA5_Y_COUNT() bfin_read16(DMA5_Y_COUNT)
202#define bfin_write_DMA5_Y_COUNT(val) bfin_write16(DMA5_Y_COUNT, val)
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203#define bfin_read_DMA5_Y_MODIFY() bfin_read16(DMA5_Y_MODIFY)
204#define bfin_write_DMA5_Y_MODIFY(val) bfin_write16(DMA5_Y_MODIFY, val)
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205#define bfin_read_DMA5_CURR_DESC_PTR() bfin_readPTR(DMA5_CURR_DESC_PTR)
206#define bfin_write_DMA5_CURR_DESC_PTR(val) bfin_writePTR(DMA5_CURR_DESC_PTR, val)
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207#define bfin_read_DMA5_CURR_ADDR() bfin_readPTR(DMA5_CURR_ADDR)
208#define bfin_write_DMA5_CURR_ADDR(val) bfin_writePTR(DMA5_CURR_ADDR, val)
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209#define bfin_read_DMA5_IRQ_STATUS() bfin_read16(DMA5_IRQ_STATUS)
210#define bfin_write_DMA5_IRQ_STATUS(val) bfin_write16(DMA5_IRQ_STATUS, val)
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211#define bfin_read_DMA5_PERIPHERAL_MAP() bfin_read16(DMA5_PERIPHERAL_MAP)
212#define bfin_write_DMA5_PERIPHERAL_MAP(val) bfin_write16(DMA5_PERIPHERAL_MAP, val)
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MF
213#define bfin_read_DMA5_CURR_X_COUNT() bfin_read16(DMA5_CURR_X_COUNT)
214#define bfin_write_DMA5_CURR_X_COUNT(val) bfin_write16(DMA5_CURR_X_COUNT, val)
d4d77308
MF
215#define bfin_read_DMA5_CURR_Y_COUNT() bfin_read16(DMA5_CURR_Y_COUNT)
216#define bfin_write_DMA5_CURR_Y_COUNT(val) bfin_write16(DMA5_CURR_Y_COUNT, val)
d4d77308
MF
217#define bfin_read_DMA6_NEXT_DESC_PTR() bfin_readPTR(DMA6_NEXT_DESC_PTR)
218#define bfin_write_DMA6_NEXT_DESC_PTR(val) bfin_writePTR(DMA6_NEXT_DESC_PTR, val)
d4d77308
MF
219#define bfin_read_DMA6_START_ADDR() bfin_readPTR(DMA6_START_ADDR)
220#define bfin_write_DMA6_START_ADDR(val) bfin_writePTR(DMA6_START_ADDR, val)
d4d77308
MF
221#define bfin_read_DMA6_CONFIG() bfin_read16(DMA6_CONFIG)
222#define bfin_write_DMA6_CONFIG(val) bfin_write16(DMA6_CONFIG, val)
d4d77308
MF
223#define bfin_read_DMA6_X_COUNT() bfin_read16(DMA6_X_COUNT)
224#define bfin_write_DMA6_X_COUNT(val) bfin_write16(DMA6_X_COUNT, val)
d4d77308
MF
225#define bfin_read_DMA6_X_MODIFY() bfin_read16(DMA6_X_MODIFY)
226#define bfin_write_DMA6_X_MODIFY(val) bfin_write16(DMA6_X_MODIFY, val)
d4d77308
MF
227#define bfin_read_DMA6_Y_COUNT() bfin_read16(DMA6_Y_COUNT)
228#define bfin_write_DMA6_Y_COUNT(val) bfin_write16(DMA6_Y_COUNT, val)
d4d77308
MF
229#define bfin_read_DMA6_Y_MODIFY() bfin_read16(DMA6_Y_MODIFY)
230#define bfin_write_DMA6_Y_MODIFY(val) bfin_write16(DMA6_Y_MODIFY, val)
d4d77308
MF
231#define bfin_read_DMA6_CURR_DESC_PTR() bfin_readPTR(DMA6_CURR_DESC_PTR)
232#define bfin_write_DMA6_CURR_DESC_PTR(val) bfin_writePTR(DMA6_CURR_DESC_PTR, val)
d4d77308
MF
233#define bfin_read_DMA6_CURR_ADDR() bfin_readPTR(DMA6_CURR_ADDR)
234#define bfin_write_DMA6_CURR_ADDR(val) bfin_writePTR(DMA6_CURR_ADDR, val)
d4d77308
MF
235#define bfin_read_DMA6_IRQ_STATUS() bfin_read16(DMA6_IRQ_STATUS)
236#define bfin_write_DMA6_IRQ_STATUS(val) bfin_write16(DMA6_IRQ_STATUS, val)
d4d77308
MF
237#define bfin_read_DMA6_PERIPHERAL_MAP() bfin_read16(DMA6_PERIPHERAL_MAP)
238#define bfin_write_DMA6_PERIPHERAL_MAP(val) bfin_write16(DMA6_PERIPHERAL_MAP, val)
d4d77308
MF
239#define bfin_read_DMA6_CURR_X_COUNT() bfin_read16(DMA6_CURR_X_COUNT)
240#define bfin_write_DMA6_CURR_X_COUNT(val) bfin_write16(DMA6_CURR_X_COUNT, val)
d4d77308
MF
241#define bfin_read_DMA6_CURR_Y_COUNT() bfin_read16(DMA6_CURR_Y_COUNT)
242#define bfin_write_DMA6_CURR_Y_COUNT(val) bfin_write16(DMA6_CURR_Y_COUNT, val)
d4d77308
MF
243#define bfin_read_DMA7_NEXT_DESC_PTR() bfin_readPTR(DMA7_NEXT_DESC_PTR)
244#define bfin_write_DMA7_NEXT_DESC_PTR(val) bfin_writePTR(DMA7_NEXT_DESC_PTR, val)
d4d77308
MF
245#define bfin_read_DMA7_START_ADDR() bfin_readPTR(DMA7_START_ADDR)
246#define bfin_write_DMA7_START_ADDR(val) bfin_writePTR(DMA7_START_ADDR, val)
d4d77308
MF
247#define bfin_read_DMA7_CONFIG() bfin_read16(DMA7_CONFIG)
248#define bfin_write_DMA7_CONFIG(val) bfin_write16(DMA7_CONFIG, val)
d4d77308
MF
249#define bfin_read_DMA7_X_COUNT() bfin_read16(DMA7_X_COUNT)
250#define bfin_write_DMA7_X_COUNT(val) bfin_write16(DMA7_X_COUNT, val)
d4d77308
MF
251#define bfin_read_DMA7_X_MODIFY() bfin_read16(DMA7_X_MODIFY)
252#define bfin_write_DMA7_X_MODIFY(val) bfin_write16(DMA7_X_MODIFY, val)
d4d77308
MF
253#define bfin_read_DMA7_Y_COUNT() bfin_read16(DMA7_Y_COUNT)
254#define bfin_write_DMA7_Y_COUNT(val) bfin_write16(DMA7_Y_COUNT, val)
d4d77308
MF
255#define bfin_read_DMA7_Y_MODIFY() bfin_read16(DMA7_Y_MODIFY)
256#define bfin_write_DMA7_Y_MODIFY(val) bfin_write16(DMA7_Y_MODIFY, val)
d4d77308
MF
257#define bfin_read_DMA7_CURR_DESC_PTR() bfin_readPTR(DMA7_CURR_DESC_PTR)
258#define bfin_write_DMA7_CURR_DESC_PTR(val) bfin_writePTR(DMA7_CURR_DESC_PTR, val)
d4d77308
MF
259#define bfin_read_DMA7_CURR_ADDR() bfin_readPTR(DMA7_CURR_ADDR)
260#define bfin_write_DMA7_CURR_ADDR(val) bfin_writePTR(DMA7_CURR_ADDR, val)
d4d77308
MF
261#define bfin_read_DMA7_IRQ_STATUS() bfin_read16(DMA7_IRQ_STATUS)
262#define bfin_write_DMA7_IRQ_STATUS(val) bfin_write16(DMA7_IRQ_STATUS, val)
d4d77308
MF
263#define bfin_read_DMA7_PERIPHERAL_MAP() bfin_read16(DMA7_PERIPHERAL_MAP)
264#define bfin_write_DMA7_PERIPHERAL_MAP(val) bfin_write16(DMA7_PERIPHERAL_MAP, val)
d4d77308
MF
265#define bfin_read_DMA7_CURR_X_COUNT() bfin_read16(DMA7_CURR_X_COUNT)
266#define bfin_write_DMA7_CURR_X_COUNT(val) bfin_write16(DMA7_CURR_X_COUNT, val)
d4d77308
MF
267#define bfin_read_DMA7_CURR_Y_COUNT() bfin_read16(DMA7_CURR_Y_COUNT)
268#define bfin_write_DMA7_CURR_Y_COUNT(val) bfin_write16(DMA7_CURR_Y_COUNT, val)
d4d77308
MF
269#define bfin_read_DMA8_NEXT_DESC_PTR() bfin_readPTR(DMA8_NEXT_DESC_PTR)
270#define bfin_write_DMA8_NEXT_DESC_PTR(val) bfin_writePTR(DMA8_NEXT_DESC_PTR, val)
d4d77308
MF
271#define bfin_read_DMA8_START_ADDR() bfin_readPTR(DMA8_START_ADDR)
272#define bfin_write_DMA8_START_ADDR(val) bfin_writePTR(DMA8_START_ADDR, val)
d4d77308
MF
273#define bfin_read_DMA8_CONFIG() bfin_read16(DMA8_CONFIG)
274#define bfin_write_DMA8_CONFIG(val) bfin_write16(DMA8_CONFIG, val)
d4d77308
MF
275#define bfin_read_DMA8_X_COUNT() bfin_read16(DMA8_X_COUNT)
276#define bfin_write_DMA8_X_COUNT(val) bfin_write16(DMA8_X_COUNT, val)
d4d77308
MF
277#define bfin_read_DMA8_X_MODIFY() bfin_read16(DMA8_X_MODIFY)
278#define bfin_write_DMA8_X_MODIFY(val) bfin_write16(DMA8_X_MODIFY, val)
d4d77308
MF
279#define bfin_read_DMA8_Y_COUNT() bfin_read16(DMA8_Y_COUNT)
280#define bfin_write_DMA8_Y_COUNT(val) bfin_write16(DMA8_Y_COUNT, val)
d4d77308
MF
281#define bfin_read_DMA8_Y_MODIFY() bfin_read16(DMA8_Y_MODIFY)
282#define bfin_write_DMA8_Y_MODIFY(val) bfin_write16(DMA8_Y_MODIFY, val)
d4d77308
MF
283#define bfin_read_DMA8_CURR_DESC_PTR() bfin_readPTR(DMA8_CURR_DESC_PTR)
284#define bfin_write_DMA8_CURR_DESC_PTR(val) bfin_writePTR(DMA8_CURR_DESC_PTR, val)
d4d77308
MF
285#define bfin_read_DMA8_CURR_ADDR() bfin_readPTR(DMA8_CURR_ADDR)
286#define bfin_write_DMA8_CURR_ADDR(val) bfin_writePTR(DMA8_CURR_ADDR, val)
d4d77308
MF
287#define bfin_read_DMA8_IRQ_STATUS() bfin_read16(DMA8_IRQ_STATUS)
288#define bfin_write_DMA8_IRQ_STATUS(val) bfin_write16(DMA8_IRQ_STATUS, val)
d4d77308
MF
289#define bfin_read_DMA8_PERIPHERAL_MAP() bfin_read16(DMA8_PERIPHERAL_MAP)
290#define bfin_write_DMA8_PERIPHERAL_MAP(val) bfin_write16(DMA8_PERIPHERAL_MAP, val)
d4d77308
MF
291#define bfin_read_DMA8_CURR_X_COUNT() bfin_read16(DMA8_CURR_X_COUNT)
292#define bfin_write_DMA8_CURR_X_COUNT(val) bfin_write16(DMA8_CURR_X_COUNT, val)
d4d77308
MF
293#define bfin_read_DMA8_CURR_Y_COUNT() bfin_read16(DMA8_CURR_Y_COUNT)
294#define bfin_write_DMA8_CURR_Y_COUNT(val) bfin_write16(DMA8_CURR_Y_COUNT, val)
d4d77308
MF
295#define bfin_read_DMA9_NEXT_DESC_PTR() bfin_readPTR(DMA9_NEXT_DESC_PTR)
296#define bfin_write_DMA9_NEXT_DESC_PTR(val) bfin_writePTR(DMA9_NEXT_DESC_PTR, val)
d4d77308
MF
297#define bfin_read_DMA9_START_ADDR() bfin_readPTR(DMA9_START_ADDR)
298#define bfin_write_DMA9_START_ADDR(val) bfin_writePTR(DMA9_START_ADDR, val)
d4d77308
MF
299#define bfin_read_DMA9_CONFIG() bfin_read16(DMA9_CONFIG)
300#define bfin_write_DMA9_CONFIG(val) bfin_write16(DMA9_CONFIG, val)
d4d77308
MF
301#define bfin_read_DMA9_X_COUNT() bfin_read16(DMA9_X_COUNT)
302#define bfin_write_DMA9_X_COUNT(val) bfin_write16(DMA9_X_COUNT, val)
d4d77308
MF
303#define bfin_read_DMA9_X_MODIFY() bfin_read16(DMA9_X_MODIFY)
304#define bfin_write_DMA9_X_MODIFY(val) bfin_write16(DMA9_X_MODIFY, val)
d4d77308
MF
305#define bfin_read_DMA9_Y_COUNT() bfin_read16(DMA9_Y_COUNT)
306#define bfin_write_DMA9_Y_COUNT(val) bfin_write16(DMA9_Y_COUNT, val)
d4d77308
MF
307#define bfin_read_DMA9_Y_MODIFY() bfin_read16(DMA9_Y_MODIFY)
308#define bfin_write_DMA9_Y_MODIFY(val) bfin_write16(DMA9_Y_MODIFY, val)
d4d77308
MF
309#define bfin_read_DMA9_CURR_DESC_PTR() bfin_readPTR(DMA9_CURR_DESC_PTR)
310#define bfin_write_DMA9_CURR_DESC_PTR(val) bfin_writePTR(DMA9_CURR_DESC_PTR, val)
d4d77308
MF
311#define bfin_read_DMA9_CURR_ADDR() bfin_readPTR(DMA9_CURR_ADDR)
312#define bfin_write_DMA9_CURR_ADDR(val) bfin_writePTR(DMA9_CURR_ADDR, val)
d4d77308
MF
313#define bfin_read_DMA9_IRQ_STATUS() bfin_read16(DMA9_IRQ_STATUS)
314#define bfin_write_DMA9_IRQ_STATUS(val) bfin_write16(DMA9_IRQ_STATUS, val)
d4d77308
MF
315#define bfin_read_DMA9_PERIPHERAL_MAP() bfin_read16(DMA9_PERIPHERAL_MAP)
316#define bfin_write_DMA9_PERIPHERAL_MAP(val) bfin_write16(DMA9_PERIPHERAL_MAP, val)
d4d77308
MF
317#define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
318#define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT, val)
d4d77308
MF
319#define bfin_read_DMA9_CURR_Y_COUNT() bfin_read16(DMA9_CURR_Y_COUNT)
320#define bfin_write_DMA9_CURR_Y_COUNT(val) bfin_write16(DMA9_CURR_Y_COUNT, val)
d4d77308
MF
321#define bfin_read_DMA10_NEXT_DESC_PTR() bfin_readPTR(DMA10_NEXT_DESC_PTR)
322#define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_writePTR(DMA10_NEXT_DESC_PTR, val)
d4d77308
MF
323#define bfin_read_DMA10_START_ADDR() bfin_readPTR(DMA10_START_ADDR)
324#define bfin_write_DMA10_START_ADDR(val) bfin_writePTR(DMA10_START_ADDR, val)
d4d77308
MF
325#define bfin_read_DMA10_CONFIG() bfin_read16(DMA10_CONFIG)
326#define bfin_write_DMA10_CONFIG(val) bfin_write16(DMA10_CONFIG, val)
d4d77308
MF
327#define bfin_read_DMA10_X_COUNT() bfin_read16(DMA10_X_COUNT)
328#define bfin_write_DMA10_X_COUNT(val) bfin_write16(DMA10_X_COUNT, val)
d4d77308
MF
329#define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
330#define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY, val)
d4d77308
MF
331#define bfin_read_DMA10_Y_COUNT() bfin_read16(DMA10_Y_COUNT)
332#define bfin_write_DMA10_Y_COUNT(val) bfin_write16(DMA10_Y_COUNT, val)
d4d77308
MF
333#define bfin_read_DMA10_Y_MODIFY() bfin_read16(DMA10_Y_MODIFY)
334#define bfin_write_DMA10_Y_MODIFY(val) bfin_write16(DMA10_Y_MODIFY, val)
d4d77308
MF
335#define bfin_read_DMA10_CURR_DESC_PTR() bfin_readPTR(DMA10_CURR_DESC_PTR)
336#define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_writePTR(DMA10_CURR_DESC_PTR, val)
d4d77308
MF
337#define bfin_read_DMA10_CURR_ADDR() bfin_readPTR(DMA10_CURR_ADDR)
338#define bfin_write_DMA10_CURR_ADDR(val) bfin_writePTR(DMA10_CURR_ADDR, val)
d4d77308
MF
339#define bfin_read_DMA10_IRQ_STATUS() bfin_read16(DMA10_IRQ_STATUS)
340#define bfin_write_DMA10_IRQ_STATUS(val) bfin_write16(DMA10_IRQ_STATUS, val)
d4d77308
MF
341#define bfin_read_DMA10_PERIPHERAL_MAP() bfin_read16(DMA10_PERIPHERAL_MAP)
342#define bfin_write_DMA10_PERIPHERAL_MAP(val) bfin_write16(DMA10_PERIPHERAL_MAP, val)
d4d77308
MF
343#define bfin_read_DMA10_CURR_X_COUNT() bfin_read16(DMA10_CURR_X_COUNT)
344#define bfin_write_DMA10_CURR_X_COUNT(val) bfin_write16(DMA10_CURR_X_COUNT, val)
d4d77308
MF
345#define bfin_read_DMA10_CURR_Y_COUNT() bfin_read16(DMA10_CURR_Y_COUNT)
346#define bfin_write_DMA10_CURR_Y_COUNT(val) bfin_write16(DMA10_CURR_Y_COUNT, val)
d4d77308
MF
347#define bfin_read_DMA11_NEXT_DESC_PTR() bfin_readPTR(DMA11_NEXT_DESC_PTR)
348#define bfin_write_DMA11_NEXT_DESC_PTR(val) bfin_writePTR(DMA11_NEXT_DESC_PTR, val)
d4d77308
MF
349#define bfin_read_DMA11_START_ADDR() bfin_readPTR(DMA11_START_ADDR)
350#define bfin_write_DMA11_START_ADDR(val) bfin_writePTR(DMA11_START_ADDR, val)
d4d77308
MF
351#define bfin_read_DMA11_CONFIG() bfin_read16(DMA11_CONFIG)
352#define bfin_write_DMA11_CONFIG(val) bfin_write16(DMA11_CONFIG, val)
d4d77308
MF
353#define bfin_read_DMA11_X_COUNT() bfin_read16(DMA11_X_COUNT)
354#define bfin_write_DMA11_X_COUNT(val) bfin_write16(DMA11_X_COUNT, val)
d4d77308
MF
355#define bfin_read_DMA11_X_MODIFY() bfin_read16(DMA11_X_MODIFY)
356#define bfin_write_DMA11_X_MODIFY(val) bfin_write16(DMA11_X_MODIFY, val)
d4d77308
MF
357#define bfin_read_DMA11_Y_COUNT() bfin_read16(DMA11_Y_COUNT)
358#define bfin_write_DMA11_Y_COUNT(val) bfin_write16(DMA11_Y_COUNT, val)
d4d77308
MF
359#define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
360#define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY, val)
d4d77308
MF
361#define bfin_read_DMA11_CURR_DESC_PTR() bfin_readPTR(DMA11_CURR_DESC_PTR)
362#define bfin_write_DMA11_CURR_DESC_PTR(val) bfin_writePTR(DMA11_CURR_DESC_PTR, val)
d4d77308
MF
363#define bfin_read_DMA11_CURR_ADDR() bfin_readPTR(DMA11_CURR_ADDR)
364#define bfin_write_DMA11_CURR_ADDR(val) bfin_writePTR(DMA11_CURR_ADDR, val)
d4d77308
MF
365#define bfin_read_DMA11_IRQ_STATUS() bfin_read16(DMA11_IRQ_STATUS)
366#define bfin_write_DMA11_IRQ_STATUS(val) bfin_write16(DMA11_IRQ_STATUS, val)
d4d77308
MF
367#define bfin_read_DMA11_PERIPHERAL_MAP() bfin_read16(DMA11_PERIPHERAL_MAP)
368#define bfin_write_DMA11_PERIPHERAL_MAP(val) bfin_write16(DMA11_PERIPHERAL_MAP, val)
d4d77308
MF
369#define bfin_read_DMA11_CURR_X_COUNT() bfin_read16(DMA11_CURR_X_COUNT)
370#define bfin_write_DMA11_CURR_X_COUNT(val) bfin_write16(DMA11_CURR_X_COUNT, val)
d4d77308
MF
371#define bfin_read_DMA11_CURR_Y_COUNT() bfin_read16(DMA11_CURR_Y_COUNT)
372#define bfin_write_DMA11_CURR_Y_COUNT(val) bfin_write16(DMA11_CURR_Y_COUNT, val)
d4d77308
MF
373#define bfin_read_DMA12_NEXT_DESC_PTR() bfin_readPTR(DMA12_NEXT_DESC_PTR)
374#define bfin_write_DMA12_NEXT_DESC_PTR(val) bfin_writePTR(DMA12_NEXT_DESC_PTR, val)
d4d77308
MF
375#define bfin_read_DMA12_START_ADDR() bfin_readPTR(DMA12_START_ADDR)
376#define bfin_write_DMA12_START_ADDR(val) bfin_writePTR(DMA12_START_ADDR, val)
d4d77308
MF
377#define bfin_read_DMA12_CONFIG() bfin_read16(DMA12_CONFIG)
378#define bfin_write_DMA12_CONFIG(val) bfin_write16(DMA12_CONFIG, val)
d4d77308
MF
379#define bfin_read_DMA12_X_COUNT() bfin_read16(DMA12_X_COUNT)
380#define bfin_write_DMA12_X_COUNT(val) bfin_write16(DMA12_X_COUNT, val)
d4d77308
MF
381#define bfin_read_DMA12_X_MODIFY() bfin_read16(DMA12_X_MODIFY)
382#define bfin_write_DMA12_X_MODIFY(val) bfin_write16(DMA12_X_MODIFY, val)
d4d77308
MF
383#define bfin_read_DMA12_Y_COUNT() bfin_read16(DMA12_Y_COUNT)
384#define bfin_write_DMA12_Y_COUNT(val) bfin_write16(DMA12_Y_COUNT, val)
d4d77308
MF
385#define bfin_read_DMA12_Y_MODIFY() bfin_read16(DMA12_Y_MODIFY)
386#define bfin_write_DMA12_Y_MODIFY(val) bfin_write16(DMA12_Y_MODIFY, val)
d4d77308
MF
387#define bfin_read_DMA12_CURR_DESC_PTR() bfin_readPTR(DMA12_CURR_DESC_PTR)
388#define bfin_write_DMA12_CURR_DESC_PTR(val) bfin_writePTR(DMA12_CURR_DESC_PTR, val)
d4d77308
MF
389#define bfin_read_DMA12_CURR_ADDR() bfin_readPTR(DMA12_CURR_ADDR)
390#define bfin_write_DMA12_CURR_ADDR(val) bfin_writePTR(DMA12_CURR_ADDR, val)
d4d77308
MF
391#define bfin_read_DMA12_IRQ_STATUS() bfin_read16(DMA12_IRQ_STATUS)
392#define bfin_write_DMA12_IRQ_STATUS(val) bfin_write16(DMA12_IRQ_STATUS, val)
d4d77308
MF
393#define bfin_read_DMA12_PERIPHERAL_MAP() bfin_read16(DMA12_PERIPHERAL_MAP)
394#define bfin_write_DMA12_PERIPHERAL_MAP(val) bfin_write16(DMA12_PERIPHERAL_MAP, val)
d4d77308
MF
395#define bfin_read_DMA12_CURR_X_COUNT() bfin_read16(DMA12_CURR_X_COUNT)
396#define bfin_write_DMA12_CURR_X_COUNT(val) bfin_write16(DMA12_CURR_X_COUNT, val)
d4d77308
MF
397#define bfin_read_DMA12_CURR_Y_COUNT() bfin_read16(DMA12_CURR_Y_COUNT)
398#define bfin_write_DMA12_CURR_Y_COUNT(val) bfin_write16(DMA12_CURR_Y_COUNT, val)
d4d77308
MF
399#define bfin_read_DMA13_NEXT_DESC_PTR() bfin_readPTR(DMA13_NEXT_DESC_PTR)
400#define bfin_write_DMA13_NEXT_DESC_PTR(val) bfin_writePTR(DMA13_NEXT_DESC_PTR, val)
d4d77308
MF
401#define bfin_read_DMA13_START_ADDR() bfin_readPTR(DMA13_START_ADDR)
402#define bfin_write_DMA13_START_ADDR(val) bfin_writePTR(DMA13_START_ADDR, val)
d4d77308
MF
403#define bfin_read_DMA13_CONFIG() bfin_read16(DMA13_CONFIG)
404#define bfin_write_DMA13_CONFIG(val) bfin_write16(DMA13_CONFIG, val)
d4d77308
MF
405#define bfin_read_DMA13_X_COUNT() bfin_read16(DMA13_X_COUNT)
406#define bfin_write_DMA13_X_COUNT(val) bfin_write16(DMA13_X_COUNT, val)
d4d77308
MF
407#define bfin_read_DMA13_X_MODIFY() bfin_read16(DMA13_X_MODIFY)
408#define bfin_write_DMA13_X_MODIFY(val) bfin_write16(DMA13_X_MODIFY, val)
d4d77308
MF
409#define bfin_read_DMA13_Y_COUNT() bfin_read16(DMA13_Y_COUNT)
410#define bfin_write_DMA13_Y_COUNT(val) bfin_write16(DMA13_Y_COUNT, val)
d4d77308
MF
411#define bfin_read_DMA13_Y_MODIFY() bfin_read16(DMA13_Y_MODIFY)
412#define bfin_write_DMA13_Y_MODIFY(val) bfin_write16(DMA13_Y_MODIFY, val)
d4d77308
MF
413#define bfin_read_DMA13_CURR_DESC_PTR() bfin_readPTR(DMA13_CURR_DESC_PTR)
414#define bfin_write_DMA13_CURR_DESC_PTR(val) bfin_writePTR(DMA13_CURR_DESC_PTR, val)
d4d77308
MF
415#define bfin_read_DMA13_CURR_ADDR() bfin_readPTR(DMA13_CURR_ADDR)
416#define bfin_write_DMA13_CURR_ADDR(val) bfin_writePTR(DMA13_CURR_ADDR, val)
d4d77308
MF
417#define bfin_read_DMA13_IRQ_STATUS() bfin_read16(DMA13_IRQ_STATUS)
418#define bfin_write_DMA13_IRQ_STATUS(val) bfin_write16(DMA13_IRQ_STATUS, val)
d4d77308
MF
419#define bfin_read_DMA13_PERIPHERAL_MAP() bfin_read16(DMA13_PERIPHERAL_MAP)
420#define bfin_write_DMA13_PERIPHERAL_MAP(val) bfin_write16(DMA13_PERIPHERAL_MAP, val)
d4d77308
MF
421#define bfin_read_DMA13_CURR_X_COUNT() bfin_read16(DMA13_CURR_X_COUNT)
422#define bfin_write_DMA13_CURR_X_COUNT(val) bfin_write16(DMA13_CURR_X_COUNT, val)
d4d77308
MF
423#define bfin_read_DMA13_CURR_Y_COUNT() bfin_read16(DMA13_CURR_Y_COUNT)
424#define bfin_write_DMA13_CURR_Y_COUNT(val) bfin_write16(DMA13_CURR_Y_COUNT, val)
d4d77308
MF
425#define bfin_read_DMA14_NEXT_DESC_PTR() bfin_readPTR(DMA14_NEXT_DESC_PTR)
426#define bfin_write_DMA14_NEXT_DESC_PTR(val) bfin_writePTR(DMA14_NEXT_DESC_PTR, val)
d4d77308
MF
427#define bfin_read_DMA14_START_ADDR() bfin_readPTR(DMA14_START_ADDR)
428#define bfin_write_DMA14_START_ADDR(val) bfin_writePTR(DMA14_START_ADDR, val)
d4d77308
MF
429#define bfin_read_DMA14_CONFIG() bfin_read16(DMA14_CONFIG)
430#define bfin_write_DMA14_CONFIG(val) bfin_write16(DMA14_CONFIG, val)
d4d77308
MF
431#define bfin_read_DMA14_X_COUNT() bfin_read16(DMA14_X_COUNT)
432#define bfin_write_DMA14_X_COUNT(val) bfin_write16(DMA14_X_COUNT, val)
d4d77308
MF
433#define bfin_read_DMA14_X_MODIFY() bfin_read16(DMA14_X_MODIFY)
434#define bfin_write_DMA14_X_MODIFY(val) bfin_write16(DMA14_X_MODIFY, val)
d4d77308
MF
435#define bfin_read_DMA14_Y_COUNT() bfin_read16(DMA14_Y_COUNT)
436#define bfin_write_DMA14_Y_COUNT(val) bfin_write16(DMA14_Y_COUNT, val)
d4d77308
MF
437#define bfin_read_DMA14_Y_MODIFY() bfin_read16(DMA14_Y_MODIFY)
438#define bfin_write_DMA14_Y_MODIFY(val) bfin_write16(DMA14_Y_MODIFY, val)
d4d77308
MF
439#define bfin_read_DMA14_CURR_DESC_PTR() bfin_readPTR(DMA14_CURR_DESC_PTR)
440#define bfin_write_DMA14_CURR_DESC_PTR(val) bfin_writePTR(DMA14_CURR_DESC_PTR, val)
d4d77308
MF
441#define bfin_read_DMA14_CURR_ADDR() bfin_readPTR(DMA14_CURR_ADDR)
442#define bfin_write_DMA14_CURR_ADDR(val) bfin_writePTR(DMA14_CURR_ADDR, val)
d4d77308
MF
443#define bfin_read_DMA14_IRQ_STATUS() bfin_read16(DMA14_IRQ_STATUS)
444#define bfin_write_DMA14_IRQ_STATUS(val) bfin_write16(DMA14_IRQ_STATUS, val)
d4d77308
MF
445#define bfin_read_DMA14_PERIPHERAL_MAP() bfin_read16(DMA14_PERIPHERAL_MAP)
446#define bfin_write_DMA14_PERIPHERAL_MAP(val) bfin_write16(DMA14_PERIPHERAL_MAP, val)
d4d77308
MF
447#define bfin_read_DMA14_CURR_X_COUNT() bfin_read16(DMA14_CURR_X_COUNT)
448#define bfin_write_DMA14_CURR_X_COUNT(val) bfin_write16(DMA14_CURR_X_COUNT, val)
d4d77308
MF
449#define bfin_read_DMA14_CURR_Y_COUNT() bfin_read16(DMA14_CURR_Y_COUNT)
450#define bfin_write_DMA14_CURR_Y_COUNT(val) bfin_write16(DMA14_CURR_Y_COUNT, val)
d4d77308
MF
451#define bfin_read_DMA15_NEXT_DESC_PTR() bfin_readPTR(DMA15_NEXT_DESC_PTR)
452#define bfin_write_DMA15_NEXT_DESC_PTR(val) bfin_writePTR(DMA15_NEXT_DESC_PTR, val)
d4d77308
MF
453#define bfin_read_DMA15_START_ADDR() bfin_readPTR(DMA15_START_ADDR)
454#define bfin_write_DMA15_START_ADDR(val) bfin_writePTR(DMA15_START_ADDR, val)
d4d77308
MF
455#define bfin_read_DMA15_CONFIG() bfin_read16(DMA15_CONFIG)
456#define bfin_write_DMA15_CONFIG(val) bfin_write16(DMA15_CONFIG, val)
d4d77308
MF
457#define bfin_read_DMA15_X_COUNT() bfin_read16(DMA15_X_COUNT)
458#define bfin_write_DMA15_X_COUNT(val) bfin_write16(DMA15_X_COUNT, val)
d4d77308
MF
459#define bfin_read_DMA15_X_MODIFY() bfin_read16(DMA15_X_MODIFY)
460#define bfin_write_DMA15_X_MODIFY(val) bfin_write16(DMA15_X_MODIFY, val)
d4d77308
MF
461#define bfin_read_DMA15_Y_COUNT() bfin_read16(DMA15_Y_COUNT)
462#define bfin_write_DMA15_Y_COUNT(val) bfin_write16(DMA15_Y_COUNT, val)
d4d77308
MF
463#define bfin_read_DMA15_Y_MODIFY() bfin_read16(DMA15_Y_MODIFY)
464#define bfin_write_DMA15_Y_MODIFY(val) bfin_write16(DMA15_Y_MODIFY, val)
d4d77308
MF
465#define bfin_read_DMA15_CURR_DESC_PTR() bfin_readPTR(DMA15_CURR_DESC_PTR)
466#define bfin_write_DMA15_CURR_DESC_PTR(val) bfin_writePTR(DMA15_CURR_DESC_PTR, val)
d4d77308
MF
467#define bfin_read_DMA15_CURR_ADDR() bfin_readPTR(DMA15_CURR_ADDR)
468#define bfin_write_DMA15_CURR_ADDR(val) bfin_writePTR(DMA15_CURR_ADDR, val)
d4d77308
MF
469#define bfin_read_DMA15_IRQ_STATUS() bfin_read16(DMA15_IRQ_STATUS)
470#define bfin_write_DMA15_IRQ_STATUS(val) bfin_write16(DMA15_IRQ_STATUS, val)
d4d77308
MF
471#define bfin_read_DMA15_PERIPHERAL_MAP() bfin_read16(DMA15_PERIPHERAL_MAP)
472#define bfin_write_DMA15_PERIPHERAL_MAP(val) bfin_write16(DMA15_PERIPHERAL_MAP, val)
d4d77308
MF
473#define bfin_read_DMA15_CURR_X_COUNT() bfin_read16(DMA15_CURR_X_COUNT)
474#define bfin_write_DMA15_CURR_X_COUNT(val) bfin_write16(DMA15_CURR_X_COUNT, val)
d4d77308
MF
475#define bfin_read_DMA15_CURR_Y_COUNT() bfin_read16(DMA15_CURR_Y_COUNT)
476#define bfin_write_DMA15_CURR_Y_COUNT(val) bfin_write16(DMA15_CURR_Y_COUNT, val)
d4d77308
MF
477#define bfin_read_DMA16_NEXT_DESC_PTR() bfin_readPTR(DMA16_NEXT_DESC_PTR)
478#define bfin_write_DMA16_NEXT_DESC_PTR(val) bfin_writePTR(DMA16_NEXT_DESC_PTR, val)
d4d77308
MF
479#define bfin_read_DMA16_START_ADDR() bfin_readPTR(DMA16_START_ADDR)
480#define bfin_write_DMA16_START_ADDR(val) bfin_writePTR(DMA16_START_ADDR, val)
d4d77308
MF
481#define bfin_read_DMA16_CONFIG() bfin_read16(DMA16_CONFIG)
482#define bfin_write_DMA16_CONFIG(val) bfin_write16(DMA16_CONFIG, val)
d4d77308
MF
483#define bfin_read_DMA16_X_COUNT() bfin_read16(DMA16_X_COUNT)
484#define bfin_write_DMA16_X_COUNT(val) bfin_write16(DMA16_X_COUNT, val)
d4d77308
MF
485#define bfin_read_DMA16_X_MODIFY() bfin_read16(DMA16_X_MODIFY)
486#define bfin_write_DMA16_X_MODIFY(val) bfin_write16(DMA16_X_MODIFY, val)
d4d77308
MF
487#define bfin_read_DMA16_Y_COUNT() bfin_read16(DMA16_Y_COUNT)
488#define bfin_write_DMA16_Y_COUNT(val) bfin_write16(DMA16_Y_COUNT, val)
d4d77308
MF
489#define bfin_read_DMA16_Y_MODIFY() bfin_read16(DMA16_Y_MODIFY)
490#define bfin_write_DMA16_Y_MODIFY(val) bfin_write16(DMA16_Y_MODIFY, val)
d4d77308
MF
491#define bfin_read_DMA16_CURR_DESC_PTR() bfin_readPTR(DMA16_CURR_DESC_PTR)
492#define bfin_write_DMA16_CURR_DESC_PTR(val) bfin_writePTR(DMA16_CURR_DESC_PTR, val)
d4d77308
MF
493#define bfin_read_DMA16_CURR_ADDR() bfin_readPTR(DMA16_CURR_ADDR)
494#define bfin_write_DMA16_CURR_ADDR(val) bfin_writePTR(DMA16_CURR_ADDR, val)
d4d77308
MF
495#define bfin_read_DMA16_IRQ_STATUS() bfin_read16(DMA16_IRQ_STATUS)
496#define bfin_write_DMA16_IRQ_STATUS(val) bfin_write16(DMA16_IRQ_STATUS, val)
d4d77308
MF
497#define bfin_read_DMA16_PERIPHERAL_MAP() bfin_read16(DMA16_PERIPHERAL_MAP)
498#define bfin_write_DMA16_PERIPHERAL_MAP(val) bfin_write16(DMA16_PERIPHERAL_MAP, val)
d4d77308
MF
499#define bfin_read_DMA16_CURR_X_COUNT() bfin_read16(DMA16_CURR_X_COUNT)
500#define bfin_write_DMA16_CURR_X_COUNT(val) bfin_write16(DMA16_CURR_X_COUNT, val)
d4d77308
MF
501#define bfin_read_DMA16_CURR_Y_COUNT() bfin_read16(DMA16_CURR_Y_COUNT)
502#define bfin_write_DMA16_CURR_Y_COUNT(val) bfin_write16(DMA16_CURR_Y_COUNT, val)
d4d77308
MF
503#define bfin_read_DMA17_NEXT_DESC_PTR() bfin_readPTR(DMA17_NEXT_DESC_PTR)
504#define bfin_write_DMA17_NEXT_DESC_PTR(val) bfin_writePTR(DMA17_NEXT_DESC_PTR, val)
d4d77308
MF
505#define bfin_read_DMA17_START_ADDR() bfin_readPTR(DMA17_START_ADDR)
506#define bfin_write_DMA17_START_ADDR(val) bfin_writePTR(DMA17_START_ADDR, val)
d4d77308
MF
507#define bfin_read_DMA17_CONFIG() bfin_read16(DMA17_CONFIG)
508#define bfin_write_DMA17_CONFIG(val) bfin_write16(DMA17_CONFIG, val)
d4d77308
MF
509#define bfin_read_DMA17_X_COUNT() bfin_read16(DMA17_X_COUNT)
510#define bfin_write_DMA17_X_COUNT(val) bfin_write16(DMA17_X_COUNT, val)
d4d77308
MF
511#define bfin_read_DMA17_X_MODIFY() bfin_read16(DMA17_X_MODIFY)
512#define bfin_write_DMA17_X_MODIFY(val) bfin_write16(DMA17_X_MODIFY, val)
d4d77308
MF
513#define bfin_read_DMA17_Y_COUNT() bfin_read16(DMA17_Y_COUNT)
514#define bfin_write_DMA17_Y_COUNT(val) bfin_write16(DMA17_Y_COUNT, val)
d4d77308
MF
515#define bfin_read_DMA17_Y_MODIFY() bfin_read16(DMA17_Y_MODIFY)
516#define bfin_write_DMA17_Y_MODIFY(val) bfin_write16(DMA17_Y_MODIFY, val)
d4d77308
MF
517#define bfin_read_DMA17_CURR_DESC_PTR() bfin_readPTR(DMA17_CURR_DESC_PTR)
518#define bfin_write_DMA17_CURR_DESC_PTR(val) bfin_writePTR(DMA17_CURR_DESC_PTR, val)
d4d77308
MF
519#define bfin_read_DMA17_CURR_ADDR() bfin_readPTR(DMA17_CURR_ADDR)
520#define bfin_write_DMA17_CURR_ADDR(val) bfin_writePTR(DMA17_CURR_ADDR, val)
d4d77308
MF
521#define bfin_read_DMA17_IRQ_STATUS() bfin_read16(DMA17_IRQ_STATUS)
522#define bfin_write_DMA17_IRQ_STATUS(val) bfin_write16(DMA17_IRQ_STATUS, val)
d4d77308
MF
523#define bfin_read_DMA17_PERIPHERAL_MAP() bfin_read16(DMA17_PERIPHERAL_MAP)
524#define bfin_write_DMA17_PERIPHERAL_MAP(val) bfin_write16(DMA17_PERIPHERAL_MAP, val)
d4d77308
MF
525#define bfin_read_DMA17_CURR_X_COUNT() bfin_read16(DMA17_CURR_X_COUNT)
526#define bfin_write_DMA17_CURR_X_COUNT(val) bfin_write16(DMA17_CURR_X_COUNT, val)
d4d77308
MF
527#define bfin_read_DMA17_CURR_Y_COUNT() bfin_read16(DMA17_CURR_Y_COUNT)
528#define bfin_write_DMA17_CURR_Y_COUNT(val) bfin_write16(DMA17_CURR_Y_COUNT, val)
d4d77308
MF
529#define bfin_read_DMA18_NEXT_DESC_PTR() bfin_readPTR(DMA18_NEXT_DESC_PTR)
530#define bfin_write_DMA18_NEXT_DESC_PTR(val) bfin_writePTR(DMA18_NEXT_DESC_PTR, val)
d4d77308
MF
531#define bfin_read_DMA18_START_ADDR() bfin_readPTR(DMA18_START_ADDR)
532#define bfin_write_DMA18_START_ADDR(val) bfin_writePTR(DMA18_START_ADDR, val)
d4d77308
MF
533#define bfin_read_DMA18_CONFIG() bfin_read16(DMA18_CONFIG)
534#define bfin_write_DMA18_CONFIG(val) bfin_write16(DMA18_CONFIG, val)
d4d77308
MF
535#define bfin_read_DMA18_X_COUNT() bfin_read16(DMA18_X_COUNT)
536#define bfin_write_DMA18_X_COUNT(val) bfin_write16(DMA18_X_COUNT, val)
d4d77308
MF
537#define bfin_read_DMA18_X_MODIFY() bfin_read16(DMA18_X_MODIFY)
538#define bfin_write_DMA18_X_MODIFY(val) bfin_write16(DMA18_X_MODIFY, val)
d4d77308
MF
539#define bfin_read_DMA18_Y_COUNT() bfin_read16(DMA18_Y_COUNT)
540#define bfin_write_DMA18_Y_COUNT(val) bfin_write16(DMA18_Y_COUNT, val)
d4d77308
MF
541#define bfin_read_DMA18_Y_MODIFY() bfin_read16(DMA18_Y_MODIFY)
542#define bfin_write_DMA18_Y_MODIFY(val) bfin_write16(DMA18_Y_MODIFY, val)
d4d77308
MF
543#define bfin_read_DMA18_CURR_DESC_PTR() bfin_readPTR(DMA18_CURR_DESC_PTR)
544#define bfin_write_DMA18_CURR_DESC_PTR(val) bfin_writePTR(DMA18_CURR_DESC_PTR, val)
d4d77308
MF
545#define bfin_read_DMA18_CURR_ADDR() bfin_readPTR(DMA18_CURR_ADDR)
546#define bfin_write_DMA18_CURR_ADDR(val) bfin_writePTR(DMA18_CURR_ADDR, val)
d4d77308
MF
547#define bfin_read_DMA18_IRQ_STATUS() bfin_read16(DMA18_IRQ_STATUS)
548#define bfin_write_DMA18_IRQ_STATUS(val) bfin_write16(DMA18_IRQ_STATUS, val)
d4d77308
MF
549#define bfin_read_DMA18_PERIPHERAL_MAP() bfin_read16(DMA18_PERIPHERAL_MAP)
550#define bfin_write_DMA18_PERIPHERAL_MAP(val) bfin_write16(DMA18_PERIPHERAL_MAP, val)
d4d77308
MF
551#define bfin_read_DMA18_CURR_X_COUNT() bfin_read16(DMA18_CURR_X_COUNT)
552#define bfin_write_DMA18_CURR_X_COUNT(val) bfin_write16(DMA18_CURR_X_COUNT, val)
d4d77308
MF
553#define bfin_read_DMA18_CURR_Y_COUNT() bfin_read16(DMA18_CURR_Y_COUNT)
554#define bfin_write_DMA18_CURR_Y_COUNT(val) bfin_write16(DMA18_CURR_Y_COUNT, val)
d4d77308
MF
555#define bfin_read_DMA19_NEXT_DESC_PTR() bfin_readPTR(DMA19_NEXT_DESC_PTR)
556#define bfin_write_DMA19_NEXT_DESC_PTR(val) bfin_writePTR(DMA19_NEXT_DESC_PTR, val)
d4d77308
MF
557#define bfin_read_DMA19_START_ADDR() bfin_readPTR(DMA19_START_ADDR)
558#define bfin_write_DMA19_START_ADDR(val) bfin_writePTR(DMA19_START_ADDR, val)
d4d77308
MF
559#define bfin_read_DMA19_CONFIG() bfin_read16(DMA19_CONFIG)
560#define bfin_write_DMA19_CONFIG(val) bfin_write16(DMA19_CONFIG, val)
d4d77308
MF
561#define bfin_read_DMA19_X_COUNT() bfin_read16(DMA19_X_COUNT)
562#define bfin_write_DMA19_X_COUNT(val) bfin_write16(DMA19_X_COUNT, val)
d4d77308
MF
563#define bfin_read_DMA19_X_MODIFY() bfin_read16(DMA19_X_MODIFY)
564#define bfin_write_DMA19_X_MODIFY(val) bfin_write16(DMA19_X_MODIFY, val)
d4d77308
MF
565#define bfin_read_DMA19_Y_COUNT() bfin_read16(DMA19_Y_COUNT)
566#define bfin_write_DMA19_Y_COUNT(val) bfin_write16(DMA19_Y_COUNT, val)
d4d77308
MF
567#define bfin_read_DMA19_Y_MODIFY() bfin_read16(DMA19_Y_MODIFY)
568#define bfin_write_DMA19_Y_MODIFY(val) bfin_write16(DMA19_Y_MODIFY, val)
d4d77308
MF
569#define bfin_read_DMA19_CURR_DESC_PTR() bfin_readPTR(DMA19_CURR_DESC_PTR)
570#define bfin_write_DMA19_CURR_DESC_PTR(val) bfin_writePTR(DMA19_CURR_DESC_PTR, val)
d4d77308
MF
571#define bfin_read_DMA19_CURR_ADDR() bfin_readPTR(DMA19_CURR_ADDR)
572#define bfin_write_DMA19_CURR_ADDR(val) bfin_writePTR(DMA19_CURR_ADDR, val)
d4d77308
MF
573#define bfin_read_DMA19_IRQ_STATUS() bfin_read16(DMA19_IRQ_STATUS)
574#define bfin_write_DMA19_IRQ_STATUS(val) bfin_write16(DMA19_IRQ_STATUS, val)
d4d77308
MF
575#define bfin_read_DMA19_PERIPHERAL_MAP() bfin_read16(DMA19_PERIPHERAL_MAP)
576#define bfin_write_DMA19_PERIPHERAL_MAP(val) bfin_write16(DMA19_PERIPHERAL_MAP, val)
d4d77308
MF
577#define bfin_read_DMA19_CURR_X_COUNT() bfin_read16(DMA19_CURR_X_COUNT)
578#define bfin_write_DMA19_CURR_X_COUNT(val) bfin_write16(DMA19_CURR_X_COUNT, val)
d4d77308
MF
579#define bfin_read_DMA19_CURR_Y_COUNT() bfin_read16(DMA19_CURR_Y_COUNT)
580#define bfin_write_DMA19_CURR_Y_COUNT(val) bfin_write16(DMA19_CURR_Y_COUNT, val)
d4d77308
MF
581#define bfin_read_DMA20_NEXT_DESC_PTR() bfin_readPTR(DMA20_NEXT_DESC_PTR)
582#define bfin_write_DMA20_NEXT_DESC_PTR(val) bfin_writePTR(DMA20_NEXT_DESC_PTR, val)
d4d77308
MF
583#define bfin_read_DMA20_START_ADDR() bfin_readPTR(DMA20_START_ADDR)
584#define bfin_write_DMA20_START_ADDR(val) bfin_writePTR(DMA20_START_ADDR, val)
d4d77308
MF
585#define bfin_read_DMA20_CONFIG() bfin_read16(DMA20_CONFIG)
586#define bfin_write_DMA20_CONFIG(val) bfin_write16(DMA20_CONFIG, val)
d4d77308
MF
587#define bfin_read_DMA20_X_COUNT() bfin_read16(DMA20_X_COUNT)
588#define bfin_write_DMA20_X_COUNT(val) bfin_write16(DMA20_X_COUNT, val)
d4d77308
MF
589#define bfin_read_DMA20_X_MODIFY() bfin_read16(DMA20_X_MODIFY)
590#define bfin_write_DMA20_X_MODIFY(val) bfin_write16(DMA20_X_MODIFY, val)
d4d77308
MF
591#define bfin_read_DMA20_Y_COUNT() bfin_read16(DMA20_Y_COUNT)
592#define bfin_write_DMA20_Y_COUNT(val) bfin_write16(DMA20_Y_COUNT, val)
d4d77308
MF
593#define bfin_read_DMA20_Y_MODIFY() bfin_read16(DMA20_Y_MODIFY)
594#define bfin_write_DMA20_Y_MODIFY(val) bfin_write16(DMA20_Y_MODIFY, val)
d4d77308
MF
595#define bfin_read_DMA20_CURR_DESC_PTR() bfin_readPTR(DMA20_CURR_DESC_PTR)
596#define bfin_write_DMA20_CURR_DESC_PTR(val) bfin_writePTR(DMA20_CURR_DESC_PTR, val)
d4d77308
MF
597#define bfin_read_DMA20_CURR_ADDR() bfin_readPTR(DMA20_CURR_ADDR)
598#define bfin_write_DMA20_CURR_ADDR(val) bfin_writePTR(DMA20_CURR_ADDR, val)
d4d77308
MF
599#define bfin_read_DMA20_IRQ_STATUS() bfin_read16(DMA20_IRQ_STATUS)
600#define bfin_write_DMA20_IRQ_STATUS(val) bfin_write16(DMA20_IRQ_STATUS, val)
d4d77308
MF
601#define bfin_read_DMA20_PERIPHERAL_MAP() bfin_read16(DMA20_PERIPHERAL_MAP)
602#define bfin_write_DMA20_PERIPHERAL_MAP(val) bfin_write16(DMA20_PERIPHERAL_MAP, val)
d4d77308
MF
603#define bfin_read_DMA20_CURR_X_COUNT() bfin_read16(DMA20_CURR_X_COUNT)
604#define bfin_write_DMA20_CURR_X_COUNT(val) bfin_write16(DMA20_CURR_X_COUNT, val)
d4d77308
MF
605#define bfin_read_DMA20_CURR_Y_COUNT() bfin_read16(DMA20_CURR_Y_COUNT)
606#define bfin_write_DMA20_CURR_Y_COUNT(val) bfin_write16(DMA20_CURR_Y_COUNT, val)
d4d77308
MF
607#define bfin_read_DMA21_NEXT_DESC_PTR() bfin_readPTR(DMA21_NEXT_DESC_PTR)
608#define bfin_write_DMA21_NEXT_DESC_PTR(val) bfin_writePTR(DMA21_NEXT_DESC_PTR, val)
d4d77308
MF
609#define bfin_read_DMA21_START_ADDR() bfin_readPTR(DMA21_START_ADDR)
610#define bfin_write_DMA21_START_ADDR(val) bfin_writePTR(DMA21_START_ADDR, val)
d4d77308
MF
611#define bfin_read_DMA21_CONFIG() bfin_read16(DMA21_CONFIG)
612#define bfin_write_DMA21_CONFIG(val) bfin_write16(DMA21_CONFIG, val)
d4d77308
MF
613#define bfin_read_DMA21_X_COUNT() bfin_read16(DMA21_X_COUNT)
614#define bfin_write_DMA21_X_COUNT(val) bfin_write16(DMA21_X_COUNT, val)
d4d77308
MF
615#define bfin_read_DMA21_X_MODIFY() bfin_read16(DMA21_X_MODIFY)
616#define bfin_write_DMA21_X_MODIFY(val) bfin_write16(DMA21_X_MODIFY, val)
d4d77308
MF
617#define bfin_read_DMA21_Y_COUNT() bfin_read16(DMA21_Y_COUNT)
618#define bfin_write_DMA21_Y_COUNT(val) bfin_write16(DMA21_Y_COUNT, val)
d4d77308
MF
619#define bfin_read_DMA21_Y_MODIFY() bfin_read16(DMA21_Y_MODIFY)
620#define bfin_write_DMA21_Y_MODIFY(val) bfin_write16(DMA21_Y_MODIFY, val)
d4d77308
MF
621#define bfin_read_DMA21_CURR_DESC_PTR() bfin_readPTR(DMA21_CURR_DESC_PTR)
622#define bfin_write_DMA21_CURR_DESC_PTR(val) bfin_writePTR(DMA21_CURR_DESC_PTR, val)
d4d77308
MF
623#define bfin_read_DMA21_CURR_ADDR() bfin_readPTR(DMA21_CURR_ADDR)
624#define bfin_write_DMA21_CURR_ADDR(val) bfin_writePTR(DMA21_CURR_ADDR, val)
d4d77308
MF
625#define bfin_read_DMA21_IRQ_STATUS() bfin_read16(DMA21_IRQ_STATUS)
626#define bfin_write_DMA21_IRQ_STATUS(val) bfin_write16(DMA21_IRQ_STATUS, val)
d4d77308
MF
627#define bfin_read_DMA21_PERIPHERAL_MAP() bfin_read16(DMA21_PERIPHERAL_MAP)
628#define bfin_write_DMA21_PERIPHERAL_MAP(val) bfin_write16(DMA21_PERIPHERAL_MAP, val)
d4d77308
MF
629#define bfin_read_DMA21_CURR_X_COUNT() bfin_read16(DMA21_CURR_X_COUNT)
630#define bfin_write_DMA21_CURR_X_COUNT(val) bfin_write16(DMA21_CURR_X_COUNT, val)
d4d77308
MF
631#define bfin_read_DMA21_CURR_Y_COUNT() bfin_read16(DMA21_CURR_Y_COUNT)
632#define bfin_write_DMA21_CURR_Y_COUNT(val) bfin_write16(DMA21_CURR_Y_COUNT, val)
d4d77308
MF
633#define bfin_read_DMA22_NEXT_DESC_PTR() bfin_readPTR(DMA22_NEXT_DESC_PTR)
634#define bfin_write_DMA22_NEXT_DESC_PTR(val) bfin_writePTR(DMA22_NEXT_DESC_PTR, val)
d4d77308
MF
635#define bfin_read_DMA22_START_ADDR() bfin_readPTR(DMA22_START_ADDR)
636#define bfin_write_DMA22_START_ADDR(val) bfin_writePTR(DMA22_START_ADDR, val)
d4d77308
MF
637#define bfin_read_DMA22_CONFIG() bfin_read16(DMA22_CONFIG)
638#define bfin_write_DMA22_CONFIG(val) bfin_write16(DMA22_CONFIG, val)
d4d77308
MF
639#define bfin_read_DMA22_X_COUNT() bfin_read16(DMA22_X_COUNT)
640#define bfin_write_DMA22_X_COUNT(val) bfin_write16(DMA22_X_COUNT, val)
d4d77308
MF
641#define bfin_read_DMA22_X_MODIFY() bfin_read16(DMA22_X_MODIFY)
642#define bfin_write_DMA22_X_MODIFY(val) bfin_write16(DMA22_X_MODIFY, val)
d4d77308
MF
643#define bfin_read_DMA22_Y_COUNT() bfin_read16(DMA22_Y_COUNT)
644#define bfin_write_DMA22_Y_COUNT(val) bfin_write16(DMA22_Y_COUNT, val)
d4d77308
MF
645#define bfin_read_DMA22_Y_MODIFY() bfin_read16(DMA22_Y_MODIFY)
646#define bfin_write_DMA22_Y_MODIFY(val) bfin_write16(DMA22_Y_MODIFY, val)
d4d77308
MF
647#define bfin_read_DMA22_CURR_DESC_PTR() bfin_readPTR(DMA22_CURR_DESC_PTR)
648#define bfin_write_DMA22_CURR_DESC_PTR(val) bfin_writePTR(DMA22_CURR_DESC_PTR, val)
d4d77308
MF
649#define bfin_read_DMA22_CURR_ADDR() bfin_readPTR(DMA22_CURR_ADDR)
650#define bfin_write_DMA22_CURR_ADDR(val) bfin_writePTR(DMA22_CURR_ADDR, val)
d4d77308
MF
651#define bfin_read_DMA22_IRQ_STATUS() bfin_read16(DMA22_IRQ_STATUS)
652#define bfin_write_DMA22_IRQ_STATUS(val) bfin_write16(DMA22_IRQ_STATUS, val)
d4d77308
MF
653#define bfin_read_DMA22_PERIPHERAL_MAP() bfin_read16(DMA22_PERIPHERAL_MAP)
654#define bfin_write_DMA22_PERIPHERAL_MAP(val) bfin_write16(DMA22_PERIPHERAL_MAP, val)
d4d77308
MF
655#define bfin_read_DMA22_CURR_X_COUNT() bfin_read16(DMA22_CURR_X_COUNT)
656#define bfin_write_DMA22_CURR_X_COUNT(val) bfin_write16(DMA22_CURR_X_COUNT, val)
d4d77308
MF
657#define bfin_read_DMA22_CURR_Y_COUNT() bfin_read16(DMA22_CURR_Y_COUNT)
658#define bfin_write_DMA22_CURR_Y_COUNT(val) bfin_write16(DMA22_CURR_Y_COUNT, val)
d4d77308
MF
659#define bfin_read_DMA23_NEXT_DESC_PTR() bfin_readPTR(DMA23_NEXT_DESC_PTR)
660#define bfin_write_DMA23_NEXT_DESC_PTR(val) bfin_writePTR(DMA23_NEXT_DESC_PTR, val)
d4d77308
MF
661#define bfin_read_DMA23_START_ADDR() bfin_readPTR(DMA23_START_ADDR)
662#define bfin_write_DMA23_START_ADDR(val) bfin_writePTR(DMA23_START_ADDR, val)
d4d77308
MF
663#define bfin_read_DMA23_CONFIG() bfin_read16(DMA23_CONFIG)
664#define bfin_write_DMA23_CONFIG(val) bfin_write16(DMA23_CONFIG, val)
d4d77308
MF
665#define bfin_read_DMA23_X_COUNT() bfin_read16(DMA23_X_COUNT)
666#define bfin_write_DMA23_X_COUNT(val) bfin_write16(DMA23_X_COUNT, val)
d4d77308
MF
667#define bfin_read_DMA23_X_MODIFY() bfin_read16(DMA23_X_MODIFY)
668#define bfin_write_DMA23_X_MODIFY(val) bfin_write16(DMA23_X_MODIFY, val)
d4d77308
MF
669#define bfin_read_DMA23_Y_COUNT() bfin_read16(DMA23_Y_COUNT)
670#define bfin_write_DMA23_Y_COUNT(val) bfin_write16(DMA23_Y_COUNT, val)
d4d77308
MF
671#define bfin_read_DMA23_Y_MODIFY() bfin_read16(DMA23_Y_MODIFY)
672#define bfin_write_DMA23_Y_MODIFY(val) bfin_write16(DMA23_Y_MODIFY, val)
d4d77308
MF
673#define bfin_read_DMA23_CURR_DESC_PTR() bfin_readPTR(DMA23_CURR_DESC_PTR)
674#define bfin_write_DMA23_CURR_DESC_PTR(val) bfin_writePTR(DMA23_CURR_DESC_PTR, val)
d4d77308
MF
675#define bfin_read_DMA23_CURR_ADDR() bfin_readPTR(DMA23_CURR_ADDR)
676#define bfin_write_DMA23_CURR_ADDR(val) bfin_writePTR(DMA23_CURR_ADDR, val)
d4d77308
MF
677#define bfin_read_DMA23_IRQ_STATUS() bfin_read16(DMA23_IRQ_STATUS)
678#define bfin_write_DMA23_IRQ_STATUS(val) bfin_write16(DMA23_IRQ_STATUS, val)
d4d77308
MF
679#define bfin_read_DMA23_PERIPHERAL_MAP() bfin_read16(DMA23_PERIPHERAL_MAP)
680#define bfin_write_DMA23_PERIPHERAL_MAP(val) bfin_write16(DMA23_PERIPHERAL_MAP, val)
d4d77308
MF
681#define bfin_read_DMA23_CURR_X_COUNT() bfin_read16(DMA23_CURR_X_COUNT)
682#define bfin_write_DMA23_CURR_X_COUNT(val) bfin_write16(DMA23_CURR_X_COUNT, val)
d4d77308
MF
683#define bfin_read_DMA23_CURR_Y_COUNT() bfin_read16(DMA23_CURR_Y_COUNT)
684#define bfin_write_DMA23_CURR_Y_COUNT(val) bfin_write16(DMA23_CURR_Y_COUNT, val)
d4d77308
MF
685#define bfin_read_MDMA_D0_NEXT_DESC_PTR() bfin_readPTR(MDMA_D0_NEXT_DESC_PTR)
686#define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_D0_NEXT_DESC_PTR, val)
d4d77308
MF
687#define bfin_read_MDMA_D0_START_ADDR() bfin_readPTR(MDMA_D0_START_ADDR)
688#define bfin_write_MDMA_D0_START_ADDR(val) bfin_writePTR(MDMA_D0_START_ADDR, val)
d4d77308
MF
689#define bfin_read_MDMA_D0_CONFIG() bfin_read16(MDMA_D0_CONFIG)
690#define bfin_write_MDMA_D0_CONFIG(val) bfin_write16(MDMA_D0_CONFIG, val)
d4d77308
MF
691#define bfin_read_MDMA_D0_X_COUNT() bfin_read16(MDMA_D0_X_COUNT)
692#define bfin_write_MDMA_D0_X_COUNT(val) bfin_write16(MDMA_D0_X_COUNT, val)
d4d77308
MF
693#define bfin_read_MDMA_D0_X_MODIFY() bfin_read16(MDMA_D0_X_MODIFY)
694#define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write16(MDMA_D0_X_MODIFY, val)
d4d77308
MF
695#define bfin_read_MDMA_D0_Y_COUNT() bfin_read16(MDMA_D0_Y_COUNT)
696#define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write16(MDMA_D0_Y_COUNT, val)
d4d77308
MF
697#define bfin_read_MDMA_D0_Y_MODIFY() bfin_read16(MDMA_D0_Y_MODIFY)
698#define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write16(MDMA_D0_Y_MODIFY, val)
d4d77308
MF
699#define bfin_read_MDMA_D0_CURR_DESC_PTR() bfin_readPTR(MDMA_D0_CURR_DESC_PTR)
700#define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_writePTR(MDMA_D0_CURR_DESC_PTR, val)
d4d77308
MF
701#define bfin_read_MDMA_D0_CURR_ADDR() bfin_readPTR(MDMA_D0_CURR_ADDR)
702#define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_writePTR(MDMA_D0_CURR_ADDR, val)
d4d77308
MF
703#define bfin_read_MDMA_D0_IRQ_STATUS() bfin_read16(MDMA_D0_IRQ_STATUS)
704#define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write16(MDMA_D0_IRQ_STATUS, val)
d4d77308
MF
705#define bfin_read_MDMA_D0_PERIPHERAL_MAP() bfin_read16(MDMA_D0_PERIPHERAL_MAP)
706#define bfin_write_MDMA_D0_PERIPHERAL_MAP(val) bfin_write16(MDMA_D0_PERIPHERAL_MAP, val)
d4d77308
MF
707#define bfin_read_MDMA_D0_CURR_X_COUNT() bfin_read16(MDMA_D0_CURR_X_COUNT)
708#define bfin_write_MDMA_D0_CURR_X_COUNT(val) bfin_write16(MDMA_D0_CURR_X_COUNT, val)
d4d77308
MF
709#define bfin_read_MDMA_D0_CURR_Y_COUNT() bfin_read16(MDMA_D0_CURR_Y_COUNT)
710#define bfin_write_MDMA_D0_CURR_Y_COUNT(val) bfin_write16(MDMA_D0_CURR_Y_COUNT, val)
d4d77308
MF
711#define bfin_read_MDMA_S0_NEXT_DESC_PTR() bfin_readPTR(MDMA_S0_NEXT_DESC_PTR)
712#define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_S0_NEXT_DESC_PTR, val)
d4d77308
MF
713#define bfin_read_MDMA_S0_START_ADDR() bfin_readPTR(MDMA_S0_START_ADDR)
714#define bfin_write_MDMA_S0_START_ADDR(val) bfin_writePTR(MDMA_S0_START_ADDR, val)
d4d77308
MF
715#define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
716#define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val)
d4d77308
MF
717#define bfin_read_MDMA_S0_X_COUNT() bfin_read16(MDMA_S0_X_COUNT)
718#define bfin_write_MDMA_S0_X_COUNT(val) bfin_write16(MDMA_S0_X_COUNT, val)
d4d77308
MF
719#define bfin_read_MDMA_S0_X_MODIFY() bfin_read16(MDMA_S0_X_MODIFY)
720#define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write16(MDMA_S0_X_MODIFY, val)
d4d77308
MF
721#define bfin_read_MDMA_S0_Y_COUNT() bfin_read16(MDMA_S0_Y_COUNT)
722#define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write16(MDMA_S0_Y_COUNT, val)
d4d77308
MF
723#define bfin_read_MDMA_S0_Y_MODIFY() bfin_read16(MDMA_S0_Y_MODIFY)
724#define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write16(MDMA_S0_Y_MODIFY, val)
d4d77308
MF
725#define bfin_read_MDMA_S0_CURR_DESC_PTR() bfin_readPTR(MDMA_S0_CURR_DESC_PTR)
726#define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_writePTR(MDMA_S0_CURR_DESC_PTR, val)
d4d77308
MF
727#define bfin_read_MDMA_S0_CURR_ADDR() bfin_readPTR(MDMA_S0_CURR_ADDR)
728#define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_writePTR(MDMA_S0_CURR_ADDR, val)
d4d77308
MF
729#define bfin_read_MDMA_S0_IRQ_STATUS() bfin_read16(MDMA_S0_IRQ_STATUS)
730#define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write16(MDMA_S0_IRQ_STATUS, val)
d4d77308
MF
731#define bfin_read_MDMA_S0_PERIPHERAL_MAP() bfin_read16(MDMA_S0_PERIPHERAL_MAP)
732#define bfin_write_MDMA_S0_PERIPHERAL_MAP(val) bfin_write16(MDMA_S0_PERIPHERAL_MAP, val)
d4d77308
MF
733#define bfin_read_MDMA_S0_CURR_X_COUNT() bfin_read16(MDMA_S0_CURR_X_COUNT)
734#define bfin_write_MDMA_S0_CURR_X_COUNT(val) bfin_write16(MDMA_S0_CURR_X_COUNT, val)
d4d77308
MF
735#define bfin_read_MDMA_S0_CURR_Y_COUNT() bfin_read16(MDMA_S0_CURR_Y_COUNT)
736#define bfin_write_MDMA_S0_CURR_Y_COUNT(val) bfin_write16(MDMA_S0_CURR_Y_COUNT, val)
d4d77308
MF
737#define bfin_read_MDMA_D1_NEXT_DESC_PTR() bfin_readPTR(MDMA_D1_NEXT_DESC_PTR)
738#define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_D1_NEXT_DESC_PTR, val)
d4d77308
MF
739#define bfin_read_MDMA_D1_START_ADDR() bfin_readPTR(MDMA_D1_START_ADDR)
740#define bfin_write_MDMA_D1_START_ADDR(val) bfin_writePTR(MDMA_D1_START_ADDR, val)
d4d77308
MF
741#define bfin_read_MDMA_D1_CONFIG() bfin_read16(MDMA_D1_CONFIG)
742#define bfin_write_MDMA_D1_CONFIG(val) bfin_write16(MDMA_D1_CONFIG, val)
d4d77308
MF
743#define bfin_read_MDMA_D1_X_COUNT() bfin_read16(MDMA_D1_X_COUNT)
744#define bfin_write_MDMA_D1_X_COUNT(val) bfin_write16(MDMA_D1_X_COUNT, val)
d4d77308
MF
745#define bfin_read_MDMA_D1_X_MODIFY() bfin_read16(MDMA_D1_X_MODIFY)
746#define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write16(MDMA_D1_X_MODIFY, val)
d4d77308
MF
747#define bfin_read_MDMA_D1_Y_COUNT() bfin_read16(MDMA_D1_Y_COUNT)
748#define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write16(MDMA_D1_Y_COUNT, val)
d4d77308
MF
749#define bfin_read_MDMA_D1_Y_MODIFY() bfin_read16(MDMA_D1_Y_MODIFY)
750#define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write16(MDMA_D1_Y_MODIFY, val)
d4d77308
MF
751#define bfin_read_MDMA_D1_CURR_DESC_PTR() bfin_readPTR(MDMA_D1_CURR_DESC_PTR)
752#define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_writePTR(MDMA_D1_CURR_DESC_PTR, val)
d4d77308
MF
753#define bfin_read_MDMA_D1_CURR_ADDR() bfin_readPTR(MDMA_D1_CURR_ADDR)
754#define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_writePTR(MDMA_D1_CURR_ADDR, val)
d4d77308
MF
755#define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read16(MDMA_D1_IRQ_STATUS)
756#define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write16(MDMA_D1_IRQ_STATUS, val)
d4d77308
MF
757#define bfin_read_MDMA_D1_PERIPHERAL_MAP() bfin_read16(MDMA_D1_PERIPHERAL_MAP)
758#define bfin_write_MDMA_D1_PERIPHERAL_MAP(val) bfin_write16(MDMA_D1_PERIPHERAL_MAP, val)
d4d77308
MF
759#define bfin_read_MDMA_D1_CURR_X_COUNT() bfin_read16(MDMA_D1_CURR_X_COUNT)
760#define bfin_write_MDMA_D1_CURR_X_COUNT(val) bfin_write16(MDMA_D1_CURR_X_COUNT, val)
d4d77308
MF
761#define bfin_read_MDMA_D1_CURR_Y_COUNT() bfin_read16(MDMA_D1_CURR_Y_COUNT)
762#define bfin_write_MDMA_D1_CURR_Y_COUNT(val) bfin_write16(MDMA_D1_CURR_Y_COUNT, val)
d4d77308
MF
763#define bfin_read_MDMA_S1_NEXT_DESC_PTR() bfin_readPTR(MDMA_S1_NEXT_DESC_PTR)
764#define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_S1_NEXT_DESC_PTR, val)
d4d77308
MF
765#define bfin_read_MDMA_S1_START_ADDR() bfin_readPTR(MDMA_S1_START_ADDR)
766#define bfin_write_MDMA_S1_START_ADDR(val) bfin_writePTR(MDMA_S1_START_ADDR, val)
d4d77308
MF
767#define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
768#define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val)
d4d77308
MF
769#define bfin_read_MDMA_S1_X_COUNT() bfin_read16(MDMA_S1_X_COUNT)
770#define bfin_write_MDMA_S1_X_COUNT(val) bfin_write16(MDMA_S1_X_COUNT, val)
d4d77308
MF
771#define bfin_read_MDMA_S1_X_MODIFY() bfin_read16(MDMA_S1_X_MODIFY)
772#define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write16(MDMA_S1_X_MODIFY, val)
d4d77308
MF
773#define bfin_read_MDMA_S1_Y_COUNT() bfin_read16(MDMA_S1_Y_COUNT)
774#define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write16(MDMA_S1_Y_COUNT, val)
d4d77308
MF
775#define bfin_read_MDMA_S1_Y_MODIFY() bfin_read16(MDMA_S1_Y_MODIFY)
776#define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write16(MDMA_S1_Y_MODIFY, val)
d4d77308
MF
777#define bfin_read_MDMA_S1_CURR_DESC_PTR() bfin_readPTR(MDMA_S1_CURR_DESC_PTR)
778#define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_writePTR(MDMA_S1_CURR_DESC_PTR, val)
d4d77308
MF
779#define bfin_read_MDMA_S1_CURR_ADDR() bfin_readPTR(MDMA_S1_CURR_ADDR)
780#define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_writePTR(MDMA_S1_CURR_ADDR, val)
d4d77308
MF
781#define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read16(MDMA_S1_IRQ_STATUS)
782#define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write16(MDMA_S1_IRQ_STATUS, val)
d4d77308
MF
783#define bfin_read_MDMA_S1_PERIPHERAL_MAP() bfin_read16(MDMA_S1_PERIPHERAL_MAP)
784#define bfin_write_MDMA_S1_PERIPHERAL_MAP(val) bfin_write16(MDMA_S1_PERIPHERAL_MAP, val)
d4d77308
MF
785#define bfin_read_MDMA_S1_CURR_X_COUNT() bfin_read16(MDMA_S1_CURR_X_COUNT)
786#define bfin_write_MDMA_S1_CURR_X_COUNT(val) bfin_write16(MDMA_S1_CURR_X_COUNT, val)
d4d77308
MF
787#define bfin_read_MDMA_S1_CURR_Y_COUNT() bfin_read16(MDMA_S1_CURR_Y_COUNT)
788#define bfin_write_MDMA_S1_CURR_Y_COUNT(val) bfin_write16(MDMA_S1_CURR_Y_COUNT, val)
d4d77308
MF
789#define bfin_read_MDMA_D2_NEXT_DESC_PTR() bfin_readPTR(MDMA_D2_NEXT_DESC_PTR)
790#define bfin_write_MDMA_D2_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_D2_NEXT_DESC_PTR, val)
d4d77308
MF
791#define bfin_read_MDMA_D2_START_ADDR() bfin_readPTR(MDMA_D2_START_ADDR)
792#define bfin_write_MDMA_D2_START_ADDR(val) bfin_writePTR(MDMA_D2_START_ADDR, val)
d4d77308
MF
793#define bfin_read_MDMA_D2_CONFIG() bfin_read16(MDMA_D2_CONFIG)
794#define bfin_write_MDMA_D2_CONFIG(val) bfin_write16(MDMA_D2_CONFIG, val)
d4d77308
MF
795#define bfin_read_MDMA_D2_X_COUNT() bfin_read16(MDMA_D2_X_COUNT)
796#define bfin_write_MDMA_D2_X_COUNT(val) bfin_write16(MDMA_D2_X_COUNT, val)
d4d77308
MF
797#define bfin_read_MDMA_D2_X_MODIFY() bfin_read16(MDMA_D2_X_MODIFY)
798#define bfin_write_MDMA_D2_X_MODIFY(val) bfin_write16(MDMA_D2_X_MODIFY, val)
d4d77308
MF
799#define bfin_read_MDMA_D2_Y_COUNT() bfin_read16(MDMA_D2_Y_COUNT)
800#define bfin_write_MDMA_D2_Y_COUNT(val) bfin_write16(MDMA_D2_Y_COUNT, val)
d4d77308
MF
801#define bfin_read_MDMA_D2_Y_MODIFY() bfin_read16(MDMA_D2_Y_MODIFY)
802#define bfin_write_MDMA_D2_Y_MODIFY(val) bfin_write16(MDMA_D2_Y_MODIFY, val)
d4d77308
MF
803#define bfin_read_MDMA_D2_CURR_DESC_PTR() bfin_readPTR(MDMA_D2_CURR_DESC_PTR)
804#define bfin_write_MDMA_D2_CURR_DESC_PTR(val) bfin_writePTR(MDMA_D2_CURR_DESC_PTR, val)
d4d77308
MF
805#define bfin_read_MDMA_D2_CURR_ADDR() bfin_readPTR(MDMA_D2_CURR_ADDR)
806#define bfin_write_MDMA_D2_CURR_ADDR(val) bfin_writePTR(MDMA_D2_CURR_ADDR, val)
d4d77308
MF
807#define bfin_read_MDMA_D2_IRQ_STATUS() bfin_read16(MDMA_D2_IRQ_STATUS)
808#define bfin_write_MDMA_D2_IRQ_STATUS(val) bfin_write16(MDMA_D2_IRQ_STATUS, val)
d4d77308
MF
809#define bfin_read_MDMA_D2_PERIPHERAL_MAP() bfin_read16(MDMA_D2_PERIPHERAL_MAP)
810#define bfin_write_MDMA_D2_PERIPHERAL_MAP(val) bfin_write16(MDMA_D2_PERIPHERAL_MAP, val)
d4d77308
MF
811#define bfin_read_MDMA_D2_CURR_X_COUNT() bfin_read16(MDMA_D2_CURR_X_COUNT)
812#define bfin_write_MDMA_D2_CURR_X_COUNT(val) bfin_write16(MDMA_D2_CURR_X_COUNT, val)
d4d77308
MF
813#define bfin_read_MDMA_D2_CURR_Y_COUNT() bfin_read16(MDMA_D2_CURR_Y_COUNT)
814#define bfin_write_MDMA_D2_CURR_Y_COUNT(val) bfin_write16(MDMA_D2_CURR_Y_COUNT, val)
d4d77308
MF
815#define bfin_read_MDMA_S2_NEXT_DESC_PTR() bfin_readPTR(MDMA_S2_NEXT_DESC_PTR)
816#define bfin_write_MDMA_S2_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_S2_NEXT_DESC_PTR, val)
d4d77308
MF
817#define bfin_read_MDMA_S2_START_ADDR() bfin_readPTR(MDMA_S2_START_ADDR)
818#define bfin_write_MDMA_S2_START_ADDR(val) bfin_writePTR(MDMA_S2_START_ADDR, val)
d4d77308
MF
819#define bfin_read_MDMA_S2_CONFIG() bfin_read16(MDMA_S2_CONFIG)
820#define bfin_write_MDMA_S2_CONFIG(val) bfin_write16(MDMA_S2_CONFIG, val)
d4d77308
MF
821#define bfin_read_MDMA_S2_X_COUNT() bfin_read16(MDMA_S2_X_COUNT)
822#define bfin_write_MDMA_S2_X_COUNT(val) bfin_write16(MDMA_S2_X_COUNT, val)
d4d77308
MF
823#define bfin_read_MDMA_S2_X_MODIFY() bfin_read16(MDMA_S2_X_MODIFY)
824#define bfin_write_MDMA_S2_X_MODIFY(val) bfin_write16(MDMA_S2_X_MODIFY, val)
d4d77308
MF
825#define bfin_read_MDMA_S2_Y_COUNT() bfin_read16(MDMA_S2_Y_COUNT)
826#define bfin_write_MDMA_S2_Y_COUNT(val) bfin_write16(MDMA_S2_Y_COUNT, val)
d4d77308
MF
827#define bfin_read_MDMA_S2_Y_MODIFY() bfin_read16(MDMA_S2_Y_MODIFY)
828#define bfin_write_MDMA_S2_Y_MODIFY(val) bfin_write16(MDMA_S2_Y_MODIFY, val)
d4d77308
MF
829#define bfin_read_MDMA_S2_CURR_DESC_PTR() bfin_readPTR(MDMA_S2_CURR_DESC_PTR)
830#define bfin_write_MDMA_S2_CURR_DESC_PTR(val) bfin_writePTR(MDMA_S2_CURR_DESC_PTR, val)
d4d77308
MF
831#define bfin_read_MDMA_S2_CURR_ADDR() bfin_readPTR(MDMA_S2_CURR_ADDR)
832#define bfin_write_MDMA_S2_CURR_ADDR(val) bfin_writePTR(MDMA_S2_CURR_ADDR, val)
d4d77308
MF
833#define bfin_read_MDMA_S2_IRQ_STATUS() bfin_read16(MDMA_S2_IRQ_STATUS)
834#define bfin_write_MDMA_S2_IRQ_STATUS(val) bfin_write16(MDMA_S2_IRQ_STATUS, val)
d4d77308
MF
835#define bfin_read_MDMA_S2_PERIPHERAL_MAP() bfin_read16(MDMA_S2_PERIPHERAL_MAP)
836#define bfin_write_MDMA_S2_PERIPHERAL_MAP(val) bfin_write16(MDMA_S2_PERIPHERAL_MAP, val)
d4d77308
MF
837#define bfin_read_MDMA_S2_CURR_X_COUNT() bfin_read16(MDMA_S2_CURR_X_COUNT)
838#define bfin_write_MDMA_S2_CURR_X_COUNT(val) bfin_write16(MDMA_S2_CURR_X_COUNT, val)
d4d77308
MF
839#define bfin_read_MDMA_S2_CURR_Y_COUNT() bfin_read16(MDMA_S2_CURR_Y_COUNT)
840#define bfin_write_MDMA_S2_CURR_Y_COUNT(val) bfin_write16(MDMA_S2_CURR_Y_COUNT, val)
d4d77308
MF
841#define bfin_read_MDMA_D3_NEXT_DESC_PTR() bfin_readPTR(MDMA_D3_NEXT_DESC_PTR)
842#define bfin_write_MDMA_D3_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_D3_NEXT_DESC_PTR, val)
d4d77308
MF
843#define bfin_read_MDMA_D3_START_ADDR() bfin_readPTR(MDMA_D3_START_ADDR)
844#define bfin_write_MDMA_D3_START_ADDR(val) bfin_writePTR(MDMA_D3_START_ADDR, val)
d4d77308
MF
845#define bfin_read_MDMA_D3_CONFIG() bfin_read16(MDMA_D3_CONFIG)
846#define bfin_write_MDMA_D3_CONFIG(val) bfin_write16(MDMA_D3_CONFIG, val)
d4d77308
MF
847#define bfin_read_MDMA_D3_X_COUNT() bfin_read16(MDMA_D3_X_COUNT)
848#define bfin_write_MDMA_D3_X_COUNT(val) bfin_write16(MDMA_D3_X_COUNT, val)
d4d77308
MF
849#define bfin_read_MDMA_D3_X_MODIFY() bfin_read16(MDMA_D3_X_MODIFY)
850#define bfin_write_MDMA_D3_X_MODIFY(val) bfin_write16(MDMA_D3_X_MODIFY, val)
d4d77308
MF
851#define bfin_read_MDMA_D3_Y_COUNT() bfin_read16(MDMA_D3_Y_COUNT)
852#define bfin_write_MDMA_D3_Y_COUNT(val) bfin_write16(MDMA_D3_Y_COUNT, val)
d4d77308
MF
853#define bfin_read_MDMA_D3_Y_MODIFY() bfin_read16(MDMA_D3_Y_MODIFY)
854#define bfin_write_MDMA_D3_Y_MODIFY(val) bfin_write16(MDMA_D3_Y_MODIFY, val)
d4d77308
MF
855#define bfin_read_MDMA_D3_CURR_DESC_PTR() bfin_readPTR(MDMA_D3_CURR_DESC_PTR)
856#define bfin_write_MDMA_D3_CURR_DESC_PTR(val) bfin_writePTR(MDMA_D3_CURR_DESC_PTR, val)
d4d77308
MF
857#define bfin_read_MDMA_D3_CURR_ADDR() bfin_readPTR(MDMA_D3_CURR_ADDR)
858#define bfin_write_MDMA_D3_CURR_ADDR(val) bfin_writePTR(MDMA_D3_CURR_ADDR, val)
d4d77308
MF
859#define bfin_read_MDMA_D3_IRQ_STATUS() bfin_read16(MDMA_D3_IRQ_STATUS)
860#define bfin_write_MDMA_D3_IRQ_STATUS(val) bfin_write16(MDMA_D3_IRQ_STATUS, val)
d4d77308
MF
861#define bfin_read_MDMA_D3_PERIPHERAL_MAP() bfin_read16(MDMA_D3_PERIPHERAL_MAP)
862#define bfin_write_MDMA_D3_PERIPHERAL_MAP(val) bfin_write16(MDMA_D3_PERIPHERAL_MAP, val)
d4d77308
MF
863#define bfin_read_MDMA_D3_CURR_X_COUNT() bfin_read16(MDMA_D3_CURR_X_COUNT)
864#define bfin_write_MDMA_D3_CURR_X_COUNT(val) bfin_write16(MDMA_D3_CURR_X_COUNT, val)
d4d77308
MF
865#define bfin_read_MDMA_D3_CURR_Y_COUNT() bfin_read16(MDMA_D3_CURR_Y_COUNT)
866#define bfin_write_MDMA_D3_CURR_Y_COUNT(val) bfin_write16(MDMA_D3_CURR_Y_COUNT, val)
d4d77308
MF
867#define bfin_read_MDMA_S3_NEXT_DESC_PTR() bfin_readPTR(MDMA_S3_NEXT_DESC_PTR)
868#define bfin_write_MDMA_S3_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_S3_NEXT_DESC_PTR, val)
d4d77308
MF
869#define bfin_read_MDMA_S3_START_ADDR() bfin_readPTR(MDMA_S3_START_ADDR)
870#define bfin_write_MDMA_S3_START_ADDR(val) bfin_writePTR(MDMA_S3_START_ADDR, val)
d4d77308
MF
871#define bfin_read_MDMA_S3_CONFIG() bfin_read16(MDMA_S3_CONFIG)
872#define bfin_write_MDMA_S3_CONFIG(val) bfin_write16(MDMA_S3_CONFIG, val)
d4d77308
MF
873#define bfin_read_MDMA_S3_X_COUNT() bfin_read16(MDMA_S3_X_COUNT)
874#define bfin_write_MDMA_S3_X_COUNT(val) bfin_write16(MDMA_S3_X_COUNT, val)
d4d77308
MF
875#define bfin_read_MDMA_S3_X_MODIFY() bfin_read16(MDMA_S3_X_MODIFY)
876#define bfin_write_MDMA_S3_X_MODIFY(val) bfin_write16(MDMA_S3_X_MODIFY, val)
d4d77308
MF
877#define bfin_read_MDMA_S3_Y_COUNT() bfin_read16(MDMA_S3_Y_COUNT)
878#define bfin_write_MDMA_S3_Y_COUNT(val) bfin_write16(MDMA_S3_Y_COUNT, val)
d4d77308
MF
879#define bfin_read_MDMA_S3_Y_MODIFY() bfin_read16(MDMA_S3_Y_MODIFY)
880#define bfin_write_MDMA_S3_Y_MODIFY(val) bfin_write16(MDMA_S3_Y_MODIFY, val)
d4d77308
MF
881#define bfin_read_MDMA_S3_CURR_DESC_PTR() bfin_readPTR(MDMA_S3_CURR_DESC_PTR)
882#define bfin_write_MDMA_S3_CURR_DESC_PTR(val) bfin_writePTR(MDMA_S3_CURR_DESC_PTR, val)
d4d77308
MF
883#define bfin_read_MDMA_S3_CURR_ADDR() bfin_readPTR(MDMA_S3_CURR_ADDR)
884#define bfin_write_MDMA_S3_CURR_ADDR(val) bfin_writePTR(MDMA_S3_CURR_ADDR, val)
d4d77308
MF
885#define bfin_read_MDMA_S3_IRQ_STATUS() bfin_read16(MDMA_S3_IRQ_STATUS)
886#define bfin_write_MDMA_S3_IRQ_STATUS(val) bfin_write16(MDMA_S3_IRQ_STATUS, val)
d4d77308
MF
887#define bfin_read_MDMA_S3_PERIPHERAL_MAP() bfin_read16(MDMA_S3_PERIPHERAL_MAP)
888#define bfin_write_MDMA_S3_PERIPHERAL_MAP(val) bfin_write16(MDMA_S3_PERIPHERAL_MAP, val)
d4d77308
MF
889#define bfin_read_MDMA_S3_CURR_X_COUNT() bfin_read16(MDMA_S3_CURR_X_COUNT)
890#define bfin_write_MDMA_S3_CURR_X_COUNT(val) bfin_write16(MDMA_S3_CURR_X_COUNT, val)
d4d77308
MF
891#define bfin_read_MDMA_S3_CURR_Y_COUNT() bfin_read16(MDMA_S3_CURR_Y_COUNT)
892#define bfin_write_MDMA_S3_CURR_Y_COUNT(val) bfin_write16(MDMA_S3_CURR_Y_COUNT, val)
d4d77308
MF
893#define bfin_read_HMDMA0_CONTROL() bfin_read16(HMDMA0_CONTROL)
894#define bfin_write_HMDMA0_CONTROL(val) bfin_write16(HMDMA0_CONTROL, val)
d4d77308
MF
895#define bfin_read_HMDMA0_ECINIT() bfin_read16(HMDMA0_ECINIT)
896#define bfin_write_HMDMA0_ECINIT(val) bfin_write16(HMDMA0_ECINIT, val)
d4d77308
MF
897#define bfin_read_HMDMA0_BCINIT() bfin_read16(HMDMA0_BCINIT)
898#define bfin_write_HMDMA0_BCINIT(val) bfin_write16(HMDMA0_BCINIT, val)
d4d77308
MF
899#define bfin_read_HMDMA0_ECOUNT() bfin_read16(HMDMA0_ECOUNT)
900#define bfin_write_HMDMA0_ECOUNT(val) bfin_write16(HMDMA0_ECOUNT, val)
d4d77308
MF
901#define bfin_read_HMDMA0_BCOUNT() bfin_read16(HMDMA0_BCOUNT)
902#define bfin_write_HMDMA0_BCOUNT(val) bfin_write16(HMDMA0_BCOUNT, val)
d4d77308
MF
903#define bfin_read_HMDMA0_ECURGENT() bfin_read16(HMDMA0_ECURGENT)
904#define bfin_write_HMDMA0_ECURGENT(val) bfin_write16(HMDMA0_ECURGENT, val)
d4d77308
MF
905#define bfin_read_HMDMA0_ECOVERFLOW() bfin_read16(HMDMA0_ECOVERFLOW)
906#define bfin_write_HMDMA0_ECOVERFLOW(val) bfin_write16(HMDMA0_ECOVERFLOW, val)
d4d77308
MF
907#define bfin_read_HMDMA1_CONTROL() bfin_read16(HMDMA1_CONTROL)
908#define bfin_write_HMDMA1_CONTROL(val) bfin_write16(HMDMA1_CONTROL, val)
d4d77308
MF
909#define bfin_read_HMDMA1_ECINIT() bfin_read16(HMDMA1_ECINIT)
910#define bfin_write_HMDMA1_ECINIT(val) bfin_write16(HMDMA1_ECINIT, val)
d4d77308
MF
911#define bfin_read_HMDMA1_BCINIT() bfin_read16(HMDMA1_BCINIT)
912#define bfin_write_HMDMA1_BCINIT(val) bfin_write16(HMDMA1_BCINIT, val)
d4d77308
MF
913#define bfin_read_HMDMA1_ECURGENT() bfin_read16(HMDMA1_ECURGENT)
914#define bfin_write_HMDMA1_ECURGENT(val) bfin_write16(HMDMA1_ECURGENT, val)
d4d77308
MF
915#define bfin_read_HMDMA1_ECOVERFLOW() bfin_read16(HMDMA1_ECOVERFLOW)
916#define bfin_write_HMDMA1_ECOVERFLOW(val) bfin_write16(HMDMA1_ECOVERFLOW, val)
d4d77308
MF
917#define bfin_read_HMDMA1_ECOUNT() bfin_read16(HMDMA1_ECOUNT)
918#define bfin_write_HMDMA1_ECOUNT(val) bfin_write16(HMDMA1_ECOUNT, val)
d4d77308
MF
919#define bfin_read_HMDMA1_BCOUNT() bfin_read16(HMDMA1_BCOUNT)
920#define bfin_write_HMDMA1_BCOUNT(val) bfin_write16(HMDMA1_BCOUNT, val)
d4d77308
MF
921#define bfin_read_EBIU_AMGCTL() bfin_read16(EBIU_AMGCTL)
922#define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL, val)
d4d77308
MF
923#define bfin_read_EBIU_AMBCTL0() bfin_read32(EBIU_AMBCTL0)
924#define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val)
d4d77308
MF
925#define bfin_read_EBIU_AMBCTL1() bfin_read32(EBIU_AMBCTL1)
926#define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val)
d4d77308
MF
927#define bfin_read_EBIU_MBSCTL() bfin_read32(EBIU_MBSCTL)
928#define bfin_write_EBIU_MBSCTL(val) bfin_write32(EBIU_MBSCTL, val)
d4d77308
MF
929#define bfin_read_EBIU_ARBSTAT() bfin_read32(EBIU_ARBSTAT)
930#define bfin_write_EBIU_ARBSTAT(val) bfin_write32(EBIU_ARBSTAT, val)
d4d77308
MF
931#define bfin_read_EBIU_MODE() bfin_read32(EBIU_MODE)
932#define bfin_write_EBIU_MODE(val) bfin_write32(EBIU_MODE, val)
d4d77308
MF
933#define bfin_read_EBIU_FCTL() bfin_read32(EBIU_FCTL)
934#define bfin_write_EBIU_FCTL(val) bfin_write32(EBIU_FCTL, val)
d4d77308
MF
935#define bfin_read_EBIU_DDRCTL0() bfin_read32(EBIU_DDRCTL0)
936#define bfin_write_EBIU_DDRCTL0(val) bfin_write32(EBIU_DDRCTL0, val)
d4d77308
MF
937#define bfin_read_EBIU_DDRCTL1() bfin_read32(EBIU_DDRCTL1)
938#define bfin_write_EBIU_DDRCTL1(val) bfin_write32(EBIU_DDRCTL1, val)
d4d77308
MF
939#define bfin_read_EBIU_DDRCTL2() bfin_read32(EBIU_DDRCTL2)
940#define bfin_write_EBIU_DDRCTL2(val) bfin_write32(EBIU_DDRCTL2, val)
d4d77308
MF
941#define bfin_read_EBIU_DDRCTL3() bfin_read32(EBIU_DDRCTL3)
942#define bfin_write_EBIU_DDRCTL3(val) bfin_write32(EBIU_DDRCTL3, val)
d4d77308
MF
943#define bfin_read_EBIU_DDRQUE() bfin_read32(EBIU_DDRQUE)
944#define bfin_write_EBIU_DDRQUE(val) bfin_write32(EBIU_DDRQUE, val)
d4d77308
MF
945#define bfin_read_EBIU_ERRADD() bfin_readPTR(EBIU_ERRADD)
946#define bfin_write_EBIU_ERRADD(val) bfin_writePTR(EBIU_ERRADD, val)
d4d77308
MF
947#define bfin_read_EBIU_ERRMST() bfin_read16(EBIU_ERRMST)
948#define bfin_write_EBIU_ERRMST(val) bfin_write16(EBIU_ERRMST, val)
d4d77308
MF
949#define bfin_read_EBIU_RSTCTL() bfin_read16(EBIU_RSTCTL)
950#define bfin_write_EBIU_RSTCTL(val) bfin_write16(EBIU_RSTCTL, val)
d4d77308
MF
951#define bfin_read_EBIU_DDRBRC0() bfin_read32(EBIU_DDRBRC0)
952#define bfin_write_EBIU_DDRBRC0(val) bfin_write32(EBIU_DDRBRC0, val)
d4d77308
MF
953#define bfin_read_EBIU_DDRBRC1() bfin_read32(EBIU_DDRBRC1)
954#define bfin_write_EBIU_DDRBRC1(val) bfin_write32(EBIU_DDRBRC1, val)
d4d77308
MF
955#define bfin_read_EBIU_DDRBRC2() bfin_read32(EBIU_DDRBRC2)
956#define bfin_write_EBIU_DDRBRC2(val) bfin_write32(EBIU_DDRBRC2, val)
d4d77308
MF
957#define bfin_read_EBIU_DDRBRC3() bfin_read32(EBIU_DDRBRC3)
958#define bfin_write_EBIU_DDRBRC3(val) bfin_write32(EBIU_DDRBRC3, val)
d4d77308
MF
959#define bfin_read_EBIU_DDRBRC4() bfin_read32(EBIU_DDRBRC4)
960#define bfin_write_EBIU_DDRBRC4(val) bfin_write32(EBIU_DDRBRC4, val)
d4d77308
MF
961#define bfin_read_EBIU_DDRBRC5() bfin_read32(EBIU_DDRBRC5)
962#define bfin_write_EBIU_DDRBRC5(val) bfin_write32(EBIU_DDRBRC5, val)
d4d77308
MF
963#define bfin_read_EBIU_DDRBRC6() bfin_read32(EBIU_DDRBRC6)
964#define bfin_write_EBIU_DDRBRC6(val) bfin_write32(EBIU_DDRBRC6, val)
d4d77308
MF
965#define bfin_read_EBIU_DDRBRC7() bfin_read32(EBIU_DDRBRC7)
966#define bfin_write_EBIU_DDRBRC7(val) bfin_write32(EBIU_DDRBRC7, val)
d4d77308
MF
967#define bfin_read_EBIU_DDRBWC0() bfin_read32(EBIU_DDRBWC0)
968#define bfin_write_EBIU_DDRBWC0(val) bfin_write32(EBIU_DDRBWC0, val)
d4d77308
MF
969#define bfin_read_EBIU_DDRBWC1() bfin_read32(EBIU_DDRBWC1)
970#define bfin_write_EBIU_DDRBWC1(val) bfin_write32(EBIU_DDRBWC1, val)
d4d77308
MF
971#define bfin_read_EBIU_DDRBWC2() bfin_read32(EBIU_DDRBWC2)
972#define bfin_write_EBIU_DDRBWC2(val) bfin_write32(EBIU_DDRBWC2, val)
d4d77308
MF
973#define bfin_read_EBIU_DDRBWC3() bfin_read32(EBIU_DDRBWC3)
974#define bfin_write_EBIU_DDRBWC3(val) bfin_write32(EBIU_DDRBWC3, val)
d4d77308
MF
975#define bfin_read_EBIU_DDRBWC4() bfin_read32(EBIU_DDRBWC4)
976#define bfin_write_EBIU_DDRBWC4(val) bfin_write32(EBIU_DDRBWC4, val)
d4d77308
MF
977#define bfin_read_EBIU_DDRBWC5() bfin_read32(EBIU_DDRBWC5)
978#define bfin_write_EBIU_DDRBWC5(val) bfin_write32(EBIU_DDRBWC5, val)
d4d77308
MF
979#define bfin_read_EBIU_DDRBWC6() bfin_read32(EBIU_DDRBWC6)
980#define bfin_write_EBIU_DDRBWC6(val) bfin_write32(EBIU_DDRBWC6, val)
d4d77308
MF
981#define bfin_read_EBIU_DDRBWC7() bfin_read32(EBIU_DDRBWC7)
982#define bfin_write_EBIU_DDRBWC7(val) bfin_write32(EBIU_DDRBWC7, val)
d4d77308
MF
983#define bfin_read_EBIU_DDRACCT() bfin_read32(EBIU_DDRACCT)
984#define bfin_write_EBIU_DDRACCT(val) bfin_write32(EBIU_DDRACCT, val)
d4d77308
MF
985#define bfin_read_EBIU_DDRTACT() bfin_read32(EBIU_DDRTACT)
986#define bfin_write_EBIU_DDRTACT(val) bfin_write32(EBIU_DDRTACT, val)
d4d77308
MF
987#define bfin_read_EBIU_DDRARCT() bfin_read32(EBIU_DDRARCT)
988#define bfin_write_EBIU_DDRARCT(val) bfin_write32(EBIU_DDRARCT, val)
d4d77308
MF
989#define bfin_read_EBIU_DDRGC0() bfin_read32(EBIU_DDRGC0)
990#define bfin_write_EBIU_DDRGC0(val) bfin_write32(EBIU_DDRGC0, val)
d4d77308
MF
991#define bfin_read_EBIU_DDRGC1() bfin_read32(EBIU_DDRGC1)
992#define bfin_write_EBIU_DDRGC1(val) bfin_write32(EBIU_DDRGC1, val)
d4d77308
MF
993#define bfin_read_EBIU_DDRGC2() bfin_read32(EBIU_DDRGC2)
994#define bfin_write_EBIU_DDRGC2(val) bfin_write32(EBIU_DDRGC2, val)
d4d77308
MF
995#define bfin_read_EBIU_DDRGC3() bfin_read32(EBIU_DDRGC3)
996#define bfin_write_EBIU_DDRGC3(val) bfin_write32(EBIU_DDRGC3, val)
d4d77308
MF
997#define bfin_read_EBIU_DDRMCEN() bfin_read32(EBIU_DDRMCEN)
998#define bfin_write_EBIU_DDRMCEN(val) bfin_write32(EBIU_DDRMCEN, val)
d4d77308
MF
999#define bfin_read_EBIU_DDRMCCL() bfin_read32(EBIU_DDRMCCL)
1000#define bfin_write_EBIU_DDRMCCL(val) bfin_write32(EBIU_DDRMCCL, val)
d4d77308
MF
1001#define bfin_read_PIXC_CTL() bfin_read16(PIXC_CTL)
1002#define bfin_write_PIXC_CTL(val) bfin_write16(PIXC_CTL, val)
d4d77308
MF
1003#define bfin_read_PIXC_PPL() bfin_read16(PIXC_PPL)
1004#define bfin_write_PIXC_PPL(val) bfin_write16(PIXC_PPL, val)
d4d77308
MF
1005#define bfin_read_PIXC_LPF() bfin_read16(PIXC_LPF)
1006#define bfin_write_PIXC_LPF(val) bfin_write16(PIXC_LPF, val)
d4d77308
MF
1007#define bfin_read_PIXC_AHSTART() bfin_read16(PIXC_AHSTART)
1008#define bfin_write_PIXC_AHSTART(val) bfin_write16(PIXC_AHSTART, val)
d4d77308
MF
1009#define bfin_read_PIXC_AHEND() bfin_read16(PIXC_AHEND)
1010#define bfin_write_PIXC_AHEND(val) bfin_write16(PIXC_AHEND, val)
d4d77308
MF
1011#define bfin_read_PIXC_AVSTART() bfin_read16(PIXC_AVSTART)
1012#define bfin_write_PIXC_AVSTART(val) bfin_write16(PIXC_AVSTART, val)
d4d77308
MF
1013#define bfin_read_PIXC_AVEND() bfin_read16(PIXC_AVEND)
1014#define bfin_write_PIXC_AVEND(val) bfin_write16(PIXC_AVEND, val)
d4d77308
MF
1015#define bfin_read_PIXC_ATRANSP() bfin_read16(PIXC_ATRANSP)
1016#define bfin_write_PIXC_ATRANSP(val) bfin_write16(PIXC_ATRANSP, val)
d4d77308
MF
1017#define bfin_read_PIXC_BHSTART() bfin_read16(PIXC_BHSTART)
1018#define bfin_write_PIXC_BHSTART(val) bfin_write16(PIXC_BHSTART, val)
d4d77308
MF
1019#define bfin_read_PIXC_BHEND() bfin_read16(PIXC_BHEND)
1020#define bfin_write_PIXC_BHEND(val) bfin_write16(PIXC_BHEND, val)
d4d77308
MF
1021#define bfin_read_PIXC_BVSTART() bfin_read16(PIXC_BVSTART)
1022#define bfin_write_PIXC_BVSTART(val) bfin_write16(PIXC_BVSTART, val)
d4d77308
MF
1023#define bfin_read_PIXC_BVEND() bfin_read16(PIXC_BVEND)
1024#define bfin_write_PIXC_BVEND(val) bfin_write16(PIXC_BVEND, val)
d4d77308
MF
1025#define bfin_read_PIXC_BTRANSP() bfin_read16(PIXC_BTRANSP)
1026#define bfin_write_PIXC_BTRANSP(val) bfin_write16(PIXC_BTRANSP, val)
d4d77308
MF
1027#define bfin_read_PIXC_INTRSTAT() bfin_read16(PIXC_INTRSTAT)
1028#define bfin_write_PIXC_INTRSTAT(val) bfin_write16(PIXC_INTRSTAT, val)
d4d77308
MF
1029#define bfin_read_PIXC_RYCON() bfin_read32(PIXC_RYCON)
1030#define bfin_write_PIXC_RYCON(val) bfin_write32(PIXC_RYCON, val)
d4d77308
MF
1031#define bfin_read_PIXC_GUCON() bfin_read32(PIXC_GUCON)
1032#define bfin_write_PIXC_GUCON(val) bfin_write32(PIXC_GUCON, val)
d4d77308
MF
1033#define bfin_read_PIXC_BVCON() bfin_read32(PIXC_BVCON)
1034#define bfin_write_PIXC_BVCON(val) bfin_write32(PIXC_BVCON, val)
d4d77308
MF
1035#define bfin_read_PIXC_CCBIAS() bfin_read32(PIXC_CCBIAS)
1036#define bfin_write_PIXC_CCBIAS(val) bfin_write32(PIXC_CCBIAS, val)
d4d77308
MF
1037#define bfin_read_PIXC_TC() bfin_read32(PIXC_TC)
1038#define bfin_write_PIXC_TC(val) bfin_write32(PIXC_TC, val)
d4d77308
MF
1039#define bfin_read_HOST_CONTROL() bfin_read16(HOST_CONTROL)
1040#define bfin_write_HOST_CONTROL(val) bfin_write16(HOST_CONTROL, val)
d4d77308
MF
1041#define bfin_read_HOST_STATUS() bfin_read16(HOST_STATUS)
1042#define bfin_write_HOST_STATUS(val) bfin_write16(HOST_STATUS, val)
d4d77308
MF
1043#define bfin_read_HOST_TIMEOUT() bfin_read16(HOST_TIMEOUT)
1044#define bfin_write_HOST_TIMEOUT(val) bfin_write16(HOST_TIMEOUT, val)
d4d77308
MF
1045#define bfin_read_PORTA_FER() bfin_read16(PORTA_FER)
1046#define bfin_write_PORTA_FER(val) bfin_write16(PORTA_FER, val)
d4d77308
MF
1047#define bfin_read_PORTA() bfin_read16(PORTA)
1048#define bfin_write_PORTA(val) bfin_write16(PORTA, val)
d4d77308
MF
1049#define bfin_read_PORTA_SET() bfin_read16(PORTA_SET)
1050#define bfin_write_PORTA_SET(val) bfin_write16(PORTA_SET, val)
d4d77308
MF
1051#define bfin_read_PORTA_CLEAR() bfin_read16(PORTA_CLEAR)
1052#define bfin_write_PORTA_CLEAR(val) bfin_write16(PORTA_CLEAR, val)
d4d77308
MF
1053#define bfin_read_PORTA_DIR_SET() bfin_read16(PORTA_DIR_SET)
1054#define bfin_write_PORTA_DIR_SET(val) bfin_write16(PORTA_DIR_SET, val)
d4d77308
MF
1055#define bfin_read_PORTA_DIR_CLEAR() bfin_read16(PORTA_DIR_CLEAR)
1056#define bfin_write_PORTA_DIR_CLEAR(val) bfin_write16(PORTA_DIR_CLEAR, val)
d4d77308
MF
1057#define bfin_read_PORTA_INEN() bfin_read16(PORTA_INEN)
1058#define bfin_write_PORTA_INEN(val) bfin_write16(PORTA_INEN, val)
d4d77308
MF
1059#define bfin_read_PORTA_MUX() bfin_read32(PORTA_MUX)
1060#define bfin_write_PORTA_MUX(val) bfin_write32(PORTA_MUX, val)
d4d77308
MF
1061#define bfin_read_PORTB_FER() bfin_read16(PORTB_FER)
1062#define bfin_write_PORTB_FER(val) bfin_write16(PORTB_FER, val)
d4d77308
MF
1063#define bfin_read_PORTB() bfin_read16(PORTB)
1064#define bfin_write_PORTB(val) bfin_write16(PORTB, val)
d4d77308
MF
1065#define bfin_read_PORTB_SET() bfin_read16(PORTB_SET)
1066#define bfin_write_PORTB_SET(val) bfin_write16(PORTB_SET, val)
d4d77308
MF
1067#define bfin_read_PORTB_CLEAR() bfin_read16(PORTB_CLEAR)
1068#define bfin_write_PORTB_CLEAR(val) bfin_write16(PORTB_CLEAR, val)
d4d77308
MF
1069#define bfin_read_PORTB_DIR_SET() bfin_read16(PORTB_DIR_SET)
1070#define bfin_write_PORTB_DIR_SET(val) bfin_write16(PORTB_DIR_SET, val)
d4d77308
MF
1071#define bfin_read_PORTB_DIR_CLEAR() bfin_read16(PORTB_DIR_CLEAR)
1072#define bfin_write_PORTB_DIR_CLEAR(val) bfin_write16(PORTB_DIR_CLEAR, val)
d4d77308
MF
1073#define bfin_read_PORTB_INEN() bfin_read16(PORTB_INEN)
1074#define bfin_write_PORTB_INEN(val) bfin_write16(PORTB_INEN, val)
d4d77308
MF
1075#define bfin_read_PORTB_MUX() bfin_read32(PORTB_MUX)
1076#define bfin_write_PORTB_MUX(val) bfin_write32(PORTB_MUX, val)
d4d77308
MF
1077#define bfin_read_PORTC_FER() bfin_read16(PORTC_FER)
1078#define bfin_write_PORTC_FER(val) bfin_write16(PORTC_FER, val)
d4d77308
MF
1079#define bfin_read_PORTC() bfin_read16(PORTC)
1080#define bfin_write_PORTC(val) bfin_write16(PORTC, val)
d4d77308
MF
1081#define bfin_read_PORTC_SET() bfin_read16(PORTC_SET)
1082#define bfin_write_PORTC_SET(val) bfin_write16(PORTC_SET, val)
d4d77308
MF
1083#define bfin_read_PORTC_CLEAR() bfin_read16(PORTC_CLEAR)
1084#define bfin_write_PORTC_CLEAR(val) bfin_write16(PORTC_CLEAR, val)
d4d77308
MF
1085#define bfin_read_PORTC_DIR_SET() bfin_read16(PORTC_DIR_SET)
1086#define bfin_write_PORTC_DIR_SET(val) bfin_write16(PORTC_DIR_SET, val)
d4d77308
MF
1087#define bfin_read_PORTC_DIR_CLEAR() bfin_read16(PORTC_DIR_CLEAR)
1088#define bfin_write_PORTC_DIR_CLEAR(val) bfin_write16(PORTC_DIR_CLEAR, val)
d4d77308
MF
1089#define bfin_read_PORTC_INEN() bfin_read16(PORTC_INEN)
1090#define bfin_write_PORTC_INEN(val) bfin_write16(PORTC_INEN, val)
d4d77308
MF
1091#define bfin_read_PORTC_MUX() bfin_read32(PORTC_MUX)
1092#define bfin_write_PORTC_MUX(val) bfin_write32(PORTC_MUX, val)
d4d77308
MF
1093#define bfin_read_PORTD_FER() bfin_read16(PORTD_FER)
1094#define bfin_write_PORTD_FER(val) bfin_write16(PORTD_FER, val)
d4d77308
MF
1095#define bfin_read_PORTD() bfin_read16(PORTD)
1096#define bfin_write_PORTD(val) bfin_write16(PORTD, val)
d4d77308
MF
1097#define bfin_read_PORTD_SET() bfin_read16(PORTD_SET)
1098#define bfin_write_PORTD_SET(val) bfin_write16(PORTD_SET, val)
d4d77308
MF
1099#define bfin_read_PORTD_CLEAR() bfin_read16(PORTD_CLEAR)
1100#define bfin_write_PORTD_CLEAR(val) bfin_write16(PORTD_CLEAR, val)
d4d77308
MF
1101#define bfin_read_PORTD_DIR_SET() bfin_read16(PORTD_DIR_SET)
1102#define bfin_write_PORTD_DIR_SET(val) bfin_write16(PORTD_DIR_SET, val)
d4d77308
MF
1103#define bfin_read_PORTD_DIR_CLEAR() bfin_read16(PORTD_DIR_CLEAR)
1104#define bfin_write_PORTD_DIR_CLEAR(val) bfin_write16(PORTD_DIR_CLEAR, val)
d4d77308
MF
1105#define bfin_read_PORTD_INEN() bfin_read16(PORTD_INEN)
1106#define bfin_write_PORTD_INEN(val) bfin_write16(PORTD_INEN, val)
d4d77308
MF
1107#define bfin_read_PORTD_MUX() bfin_read32(PORTD_MUX)
1108#define bfin_write_PORTD_MUX(val) bfin_write32(PORTD_MUX, val)
d4d77308
MF
1109#define bfin_read_PORTE_FER() bfin_read16(PORTE_FER)
1110#define bfin_write_PORTE_FER(val) bfin_write16(PORTE_FER, val)
d4d77308
MF
1111#define bfin_read_PORTE() bfin_read16(PORTE)
1112#define bfin_write_PORTE(val) bfin_write16(PORTE, val)
d4d77308
MF
1113#define bfin_read_PORTE_SET() bfin_read16(PORTE_SET)
1114#define bfin_write_PORTE_SET(val) bfin_write16(PORTE_SET, val)
d4d77308
MF
1115#define bfin_read_PORTE_CLEAR() bfin_read16(PORTE_CLEAR)
1116#define bfin_write_PORTE_CLEAR(val) bfin_write16(PORTE_CLEAR, val)
d4d77308
MF
1117#define bfin_read_PORTE_DIR_SET() bfin_read16(PORTE_DIR_SET)
1118#define bfin_write_PORTE_DIR_SET(val) bfin_write16(PORTE_DIR_SET, val)
d4d77308
MF
1119#define bfin_read_PORTE_DIR_CLEAR() bfin_read16(PORTE_DIR_CLEAR)
1120#define bfin_write_PORTE_DIR_CLEAR(val) bfin_write16(PORTE_DIR_CLEAR, val)
d4d77308
MF
1121#define bfin_read_PORTE_INEN() bfin_read16(PORTE_INEN)
1122#define bfin_write_PORTE_INEN(val) bfin_write16(PORTE_INEN, val)
d4d77308
MF
1123#define bfin_read_PORTE_MUX() bfin_read32(PORTE_MUX)
1124#define bfin_write_PORTE_MUX(val) bfin_write32(PORTE_MUX, val)
d4d77308
MF
1125#define bfin_read_PORTF_FER() bfin_read16(PORTF_FER)
1126#define bfin_write_PORTF_FER(val) bfin_write16(PORTF_FER, val)
d4d77308
MF
1127#define bfin_read_PORTF() bfin_read16(PORTF)
1128#define bfin_write_PORTF(val) bfin_write16(PORTF, val)
d4d77308
MF
1129#define bfin_read_PORTF_SET() bfin_read16(PORTF_SET)
1130#define bfin_write_PORTF_SET(val) bfin_write16(PORTF_SET, val)
d4d77308
MF
1131#define bfin_read_PORTF_CLEAR() bfin_read16(PORTF_CLEAR)
1132#define bfin_write_PORTF_CLEAR(val) bfin_write16(PORTF_CLEAR, val)
d4d77308
MF
1133#define bfin_read_PORTF_DIR_SET() bfin_read16(PORTF_DIR_SET)
1134#define bfin_write_PORTF_DIR_SET(val) bfin_write16(PORTF_DIR_SET, val)
d4d77308
MF
1135#define bfin_read_PORTF_DIR_CLEAR() bfin_read16(PORTF_DIR_CLEAR)
1136#define bfin_write_PORTF_DIR_CLEAR(val) bfin_write16(PORTF_DIR_CLEAR, val)
d4d77308
MF
1137#define bfin_read_PORTF_INEN() bfin_read16(PORTF_INEN)
1138#define bfin_write_PORTF_INEN(val) bfin_write16(PORTF_INEN, val)
d4d77308
MF
1139#define bfin_read_PORTF_MUX() bfin_read32(PORTF_MUX)
1140#define bfin_write_PORTF_MUX(val) bfin_write32(PORTF_MUX, val)
d4d77308
MF
1141#define bfin_read_PORTG_FER() bfin_read16(PORTG_FER)
1142#define bfin_write_PORTG_FER(val) bfin_write16(PORTG_FER, val)
d4d77308
MF
1143#define bfin_read_PORTG() bfin_read16(PORTG)
1144#define bfin_write_PORTG(val) bfin_write16(PORTG, val)
d4d77308
MF
1145#define bfin_read_PORTG_SET() bfin_read16(PORTG_SET)
1146#define bfin_write_PORTG_SET(val) bfin_write16(PORTG_SET, val)
d4d77308
MF
1147#define bfin_read_PORTG_CLEAR() bfin_read16(PORTG_CLEAR)
1148#define bfin_write_PORTG_CLEAR(val) bfin_write16(PORTG_CLEAR, val)
d4d77308
MF
1149#define bfin_read_PORTG_DIR_SET() bfin_read16(PORTG_DIR_SET)
1150#define bfin_write_PORTG_DIR_SET(val) bfin_write16(PORTG_DIR_SET, val)
d4d77308
MF
1151#define bfin_read_PORTG_DIR_CLEAR() bfin_read16(PORTG_DIR_CLEAR)
1152#define bfin_write_PORTG_DIR_CLEAR(val) bfin_write16(PORTG_DIR_CLEAR, val)
d4d77308
MF
1153#define bfin_read_PORTG_INEN() bfin_read16(PORTG_INEN)
1154#define bfin_write_PORTG_INEN(val) bfin_write16(PORTG_INEN, val)
d4d77308
MF
1155#define bfin_read_PORTG_MUX() bfin_read32(PORTG_MUX)
1156#define bfin_write_PORTG_MUX(val) bfin_write32(PORTG_MUX, val)
d4d77308
MF
1157#define bfin_read_PORTH_FER() bfin_read16(PORTH_FER)
1158#define bfin_write_PORTH_FER(val) bfin_write16(PORTH_FER, val)
d4d77308
MF
1159#define bfin_read_PORTH() bfin_read16(PORTH)
1160#define bfin_write_PORTH(val) bfin_write16(PORTH, val)
d4d77308
MF
1161#define bfin_read_PORTH_SET() bfin_read16(PORTH_SET)
1162#define bfin_write_PORTH_SET(val) bfin_write16(PORTH_SET, val)
d4d77308
MF
1163#define bfin_read_PORTH_CLEAR() bfin_read16(PORTH_CLEAR)
1164#define bfin_write_PORTH_CLEAR(val) bfin_write16(PORTH_CLEAR, val)
d4d77308
MF
1165#define bfin_read_PORTH_DIR_SET() bfin_read16(PORTH_DIR_SET)
1166#define bfin_write_PORTH_DIR_SET(val) bfin_write16(PORTH_DIR_SET, val)
d4d77308
MF
1167#define bfin_read_PORTH_DIR_CLEAR() bfin_read16(PORTH_DIR_CLEAR)
1168#define bfin_write_PORTH_DIR_CLEAR(val) bfin_write16(PORTH_DIR_CLEAR, val)
d4d77308
MF
1169#define bfin_read_PORTH_INEN() bfin_read16(PORTH_INEN)
1170#define bfin_write_PORTH_INEN(val) bfin_write16(PORTH_INEN, val)
d4d77308
MF
1171#define bfin_read_PORTH_MUX() bfin_read32(PORTH_MUX)
1172#define bfin_write_PORTH_MUX(val) bfin_write32(PORTH_MUX, val)
d4d77308
MF
1173#define bfin_read_PORTI_FER() bfin_read16(PORTI_FER)
1174#define bfin_write_PORTI_FER(val) bfin_write16(PORTI_FER, val)
d4d77308
MF
1175#define bfin_read_PORTI() bfin_read16(PORTI)
1176#define bfin_write_PORTI(val) bfin_write16(PORTI, val)
d4d77308
MF
1177#define bfin_read_PORTI_SET() bfin_read16(PORTI_SET)
1178#define bfin_write_PORTI_SET(val) bfin_write16(PORTI_SET, val)
d4d77308
MF
1179#define bfin_read_PORTI_CLEAR() bfin_read16(PORTI_CLEAR)
1180#define bfin_write_PORTI_CLEAR(val) bfin_write16(PORTI_CLEAR, val)
d4d77308
MF
1181#define bfin_read_PORTI_DIR_SET() bfin_read16(PORTI_DIR_SET)
1182#define bfin_write_PORTI_DIR_SET(val) bfin_write16(PORTI_DIR_SET, val)
d4d77308
MF
1183#define bfin_read_PORTI_DIR_CLEAR() bfin_read16(PORTI_DIR_CLEAR)
1184#define bfin_write_PORTI_DIR_CLEAR(val) bfin_write16(PORTI_DIR_CLEAR, val)
d4d77308
MF
1185#define bfin_read_PORTI_INEN() bfin_read16(PORTI_INEN)
1186#define bfin_write_PORTI_INEN(val) bfin_write16(PORTI_INEN, val)
d4d77308
MF
1187#define bfin_read_PORTI_MUX() bfin_read32(PORTI_MUX)
1188#define bfin_write_PORTI_MUX(val) bfin_write32(PORTI_MUX, val)
d4d77308
MF
1189#define bfin_read_PORTJ_FER() bfin_read16(PORTJ_FER)
1190#define bfin_write_PORTJ_FER(val) bfin_write16(PORTJ_FER, val)
d4d77308
MF
1191#define bfin_read_PORTJ() bfin_read16(PORTJ)
1192#define bfin_write_PORTJ(val) bfin_write16(PORTJ, val)
d4d77308
MF
1193#define bfin_read_PORTJ_SET() bfin_read16(PORTJ_SET)
1194#define bfin_write_PORTJ_SET(val) bfin_write16(PORTJ_SET, val)
d4d77308
MF
1195#define bfin_read_PORTJ_CLEAR() bfin_read16(PORTJ_CLEAR)
1196#define bfin_write_PORTJ_CLEAR(val) bfin_write16(PORTJ_CLEAR, val)
d4d77308
MF
1197#define bfin_read_PORTJ_DIR_SET() bfin_read16(PORTJ_DIR_SET)
1198#define bfin_write_PORTJ_DIR_SET(val) bfin_write16(PORTJ_DIR_SET, val)
d4d77308
MF
1199#define bfin_read_PORTJ_DIR_CLEAR() bfin_read16(PORTJ_DIR_CLEAR)
1200#define bfin_write_PORTJ_DIR_CLEAR(val) bfin_write16(PORTJ_DIR_CLEAR, val)
d4d77308
MF
1201#define bfin_read_PORTJ_INEN() bfin_read16(PORTJ_INEN)
1202#define bfin_write_PORTJ_INEN(val) bfin_write16(PORTJ_INEN, val)
d4d77308
MF
1203#define bfin_read_PORTJ_MUX() bfin_read32(PORTJ_MUX)
1204#define bfin_write_PORTJ_MUX(val) bfin_write32(PORTJ_MUX, val)
d4d77308
MF
1205#define bfin_read_PINT0_MASK_SET() bfin_read32(PINT0_MASK_SET)
1206#define bfin_write_PINT0_MASK_SET(val) bfin_write32(PINT0_MASK_SET, val)
d4d77308
MF
1207#define bfin_read_PINT0_MASK_CLEAR() bfin_read32(PINT0_MASK_CLEAR)
1208#define bfin_write_PINT0_MASK_CLEAR(val) bfin_write32(PINT0_MASK_CLEAR, val)
d4d77308
MF
1209#define bfin_read_PINT0_IRQ() bfin_read32(PINT0_IRQ)
1210#define bfin_write_PINT0_IRQ(val) bfin_write32(PINT0_IRQ, val)
d4d77308
MF
1211#define bfin_read_PINT0_ASSIGN() bfin_read32(PINT0_ASSIGN)
1212#define bfin_write_PINT0_ASSIGN(val) bfin_write32(PINT0_ASSIGN, val)
d4d77308
MF
1213#define bfin_read_PINT0_EDGE_SET() bfin_read32(PINT0_EDGE_SET)
1214#define bfin_write_PINT0_EDGE_SET(val) bfin_write32(PINT0_EDGE_SET, val)
d4d77308
MF
1215#define bfin_read_PINT0_EDGE_CLEAR() bfin_read32(PINT0_EDGE_CLEAR)
1216#define bfin_write_PINT0_EDGE_CLEAR(val) bfin_write32(PINT0_EDGE_CLEAR, val)
d4d77308
MF
1217#define bfin_read_PINT0_INVERT_SET() bfin_read32(PINT0_INVERT_SET)
1218#define bfin_write_PINT0_INVERT_SET(val) bfin_write32(PINT0_INVERT_SET, val)
d4d77308
MF
1219#define bfin_read_PINT0_INVERT_CLEAR() bfin_read32(PINT0_INVERT_CLEAR)
1220#define bfin_write_PINT0_INVERT_CLEAR(val) bfin_write32(PINT0_INVERT_CLEAR, val)
d4d77308
MF
1221#define bfin_read_PINT0_PINSTATE() bfin_read32(PINT0_PINSTATE)
1222#define bfin_write_PINT0_PINSTATE(val) bfin_write32(PINT0_PINSTATE, val)
d4d77308
MF
1223#define bfin_read_PINT0_LATCH() bfin_read32(PINT0_LATCH)
1224#define bfin_write_PINT0_LATCH(val) bfin_write32(PINT0_LATCH, val)
d4d77308
MF
1225#define bfin_read_PINT1_MASK_SET() bfin_read32(PINT1_MASK_SET)
1226#define bfin_write_PINT1_MASK_SET(val) bfin_write32(PINT1_MASK_SET, val)
d4d77308
MF
1227#define bfin_read_PINT1_MASK_CLEAR() bfin_read32(PINT1_MASK_CLEAR)
1228#define bfin_write_PINT1_MASK_CLEAR(val) bfin_write32(PINT1_MASK_CLEAR, val)
d4d77308
MF
1229#define bfin_read_PINT1_IRQ() bfin_read32(PINT1_IRQ)
1230#define bfin_write_PINT1_IRQ(val) bfin_write32(PINT1_IRQ, val)
d4d77308
MF
1231#define bfin_read_PINT1_ASSIGN() bfin_read32(PINT1_ASSIGN)
1232#define bfin_write_PINT1_ASSIGN(val) bfin_write32(PINT1_ASSIGN, val)
d4d77308
MF
1233#define bfin_read_PINT1_EDGE_SET() bfin_read32(PINT1_EDGE_SET)
1234#define bfin_write_PINT1_EDGE_SET(val) bfin_write32(PINT1_EDGE_SET, val)
d4d77308
MF
1235#define bfin_read_PINT1_EDGE_CLEAR() bfin_read32(PINT1_EDGE_CLEAR)
1236#define bfin_write_PINT1_EDGE_CLEAR(val) bfin_write32(PINT1_EDGE_CLEAR, val)
d4d77308
MF
1237#define bfin_read_PINT1_INVERT_SET() bfin_read32(PINT1_INVERT_SET)
1238#define bfin_write_PINT1_INVERT_SET(val) bfin_write32(PINT1_INVERT_SET, val)
d4d77308
MF
1239#define bfin_read_PINT1_INVERT_CLEAR() bfin_read32(PINT1_INVERT_CLEAR)
1240#define bfin_write_PINT1_INVERT_CLEAR(val) bfin_write32(PINT1_INVERT_CLEAR, val)
d4d77308
MF
1241#define bfin_read_PINT1_PINSTATE() bfin_read32(PINT1_PINSTATE)
1242#define bfin_write_PINT1_PINSTATE(val) bfin_write32(PINT1_PINSTATE, val)
d4d77308
MF
1243#define bfin_read_PINT1_LATCH() bfin_read32(PINT1_LATCH)
1244#define bfin_write_PINT1_LATCH(val) bfin_write32(PINT1_LATCH, val)
d4d77308
MF
1245#define bfin_read_PINT2_MASK_SET() bfin_read32(PINT2_MASK_SET)
1246#define bfin_write_PINT2_MASK_SET(val) bfin_write32(PINT2_MASK_SET, val)
d4d77308
MF
1247#define bfin_read_PINT2_MASK_CLEAR() bfin_read32(PINT2_MASK_CLEAR)
1248#define bfin_write_PINT2_MASK_CLEAR(val) bfin_write32(PINT2_MASK_CLEAR, val)
d4d77308
MF
1249#define bfin_read_PINT2_IRQ() bfin_read32(PINT2_IRQ)
1250#define bfin_write_PINT2_IRQ(val) bfin_write32(PINT2_IRQ, val)
d4d77308
MF
1251#define bfin_read_PINT2_ASSIGN() bfin_read32(PINT2_ASSIGN)
1252#define bfin_write_PINT2_ASSIGN(val) bfin_write32(PINT2_ASSIGN, val)
d4d77308
MF
1253#define bfin_read_PINT2_EDGE_SET() bfin_read32(PINT2_EDGE_SET)
1254#define bfin_write_PINT2_EDGE_SET(val) bfin_write32(PINT2_EDGE_SET, val)
d4d77308
MF
1255#define bfin_read_PINT2_EDGE_CLEAR() bfin_read32(PINT2_EDGE_CLEAR)
1256#define bfin_write_PINT2_EDGE_CLEAR(val) bfin_write32(PINT2_EDGE_CLEAR, val)
d4d77308
MF
1257#define bfin_read_PINT2_INVERT_SET() bfin_read32(PINT2_INVERT_SET)
1258#define bfin_write_PINT2_INVERT_SET(val) bfin_write32(PINT2_INVERT_SET, val)
d4d77308
MF
1259#define bfin_read_PINT2_INVERT_CLEAR() bfin_read32(PINT2_INVERT_CLEAR)
1260#define bfin_write_PINT2_INVERT_CLEAR(val) bfin_write32(PINT2_INVERT_CLEAR, val)
d4d77308
MF
1261#define bfin_read_PINT2_PINSTATE() bfin_read32(PINT2_PINSTATE)
1262#define bfin_write_PINT2_PINSTATE(val) bfin_write32(PINT2_PINSTATE, val)
d4d77308
MF
1263#define bfin_read_PINT2_LATCH() bfin_read32(PINT2_LATCH)
1264#define bfin_write_PINT2_LATCH(val) bfin_write32(PINT2_LATCH, val)
d4d77308
MF
1265#define bfin_read_PINT3_MASK_SET() bfin_read32(PINT3_MASK_SET)
1266#define bfin_write_PINT3_MASK_SET(val) bfin_write32(PINT3_MASK_SET, val)
d4d77308
MF
1267#define bfin_read_PINT3_MASK_CLEAR() bfin_read32(PINT3_MASK_CLEAR)
1268#define bfin_write_PINT3_MASK_CLEAR(val) bfin_write32(PINT3_MASK_CLEAR, val)
d4d77308
MF
1269#define bfin_read_PINT3_IRQ() bfin_read32(PINT3_IRQ)
1270#define bfin_write_PINT3_IRQ(val) bfin_write32(PINT3_IRQ, val)
d4d77308
MF
1271#define bfin_read_PINT3_ASSIGN() bfin_read32(PINT3_ASSIGN)
1272#define bfin_write_PINT3_ASSIGN(val) bfin_write32(PINT3_ASSIGN, val)
d4d77308
MF
1273#define bfin_read_PINT3_EDGE_SET() bfin_read32(PINT3_EDGE_SET)
1274#define bfin_write_PINT3_EDGE_SET(val) bfin_write32(PINT3_EDGE_SET, val)
d4d77308
MF
1275#define bfin_read_PINT3_EDGE_CLEAR() bfin_read32(PINT3_EDGE_CLEAR)
1276#define bfin_write_PINT3_EDGE_CLEAR(val) bfin_write32(PINT3_EDGE_CLEAR, val)
d4d77308
MF
1277#define bfin_read_PINT3_INVERT_SET() bfin_read32(PINT3_INVERT_SET)
1278#define bfin_write_PINT3_INVERT_SET(val) bfin_write32(PINT3_INVERT_SET, val)
d4d77308
MF
1279#define bfin_read_PINT3_INVERT_CLEAR() bfin_read32(PINT3_INVERT_CLEAR)
1280#define bfin_write_PINT3_INVERT_CLEAR(val) bfin_write32(PINT3_INVERT_CLEAR, val)
d4d77308
MF
1281#define bfin_read_PINT3_PINSTATE() bfin_read32(PINT3_PINSTATE)
1282#define bfin_write_PINT3_PINSTATE(val) bfin_write32(PINT3_PINSTATE, val)
d4d77308
MF
1283#define bfin_read_PINT3_LATCH() bfin_read32(PINT3_LATCH)
1284#define bfin_write_PINT3_LATCH(val) bfin_write32(PINT3_LATCH, val)
d4d77308
MF
1285#define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)
1286#define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG, val)
d4d77308
MF
1287#define bfin_read_TIMER0_COUNTER() bfin_read32(TIMER0_COUNTER)
1288#define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER, val)
d4d77308
MF
1289#define bfin_read_TIMER0_PERIOD() bfin_read32(TIMER0_PERIOD)
1290#define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD, val)
d4d77308
MF
1291#define bfin_read_TIMER0_WIDTH() bfin_read32(TIMER0_WIDTH)
1292#define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH, val)
d4d77308
MF
1293#define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)
1294#define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG, val)
d4d77308
MF
1295#define bfin_read_TIMER1_COUNTER() bfin_read32(TIMER1_COUNTER)
1296#define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER, val)
d4d77308
MF
1297#define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
1298#define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
d4d77308
MF
1299#define bfin_read_TIMER1_WIDTH() bfin_read32(TIMER1_WIDTH)
1300#define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH, val)
d4d77308
MF
1301#define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)
1302#define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG, val)
d4d77308
MF
1303#define bfin_read_TIMER2_COUNTER() bfin_read32(TIMER2_COUNTER)
1304#define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER, val)
d4d77308
MF
1305#define bfin_read_TIMER2_PERIOD() bfin_read32(TIMER2_PERIOD)
1306#define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD, val)
d4d77308
MF
1307#define bfin_read_TIMER2_WIDTH() bfin_read32(TIMER2_WIDTH)
1308#define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH, val)
d4d77308
MF
1309#define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)
1310#define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG, val)
d4d77308
MF
1311#define bfin_read_TIMER3_COUNTER() bfin_read32(TIMER3_COUNTER)
1312#define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER, val)
d4d77308
MF
1313#define bfin_read_TIMER3_PERIOD() bfin_read32(TIMER3_PERIOD)
1314#define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD, val)
d4d77308
MF
1315#define bfin_read_TIMER3_WIDTH() bfin_read32(TIMER3_WIDTH)
1316#define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH, val)
d4d77308
MF
1317#define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)
1318#define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG, val)
d4d77308
MF
1319#define bfin_read_TIMER4_COUNTER() bfin_read32(TIMER4_COUNTER)
1320#define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER, val)
d4d77308
MF
1321#define bfin_read_TIMER4_PERIOD() bfin_read32(TIMER4_PERIOD)
1322#define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD, val)
d4d77308
MF
1323#define bfin_read_TIMER4_WIDTH() bfin_read32(TIMER4_WIDTH)
1324#define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH, val)
d4d77308
MF
1325#define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)
1326#define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG, val)
d4d77308
MF
1327#define bfin_read_TIMER5_COUNTER() bfin_read32(TIMER5_COUNTER)
1328#define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER, val)
d4d77308
MF
1329#define bfin_read_TIMER5_PERIOD() bfin_read32(TIMER5_PERIOD)
1330#define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD, val)
d4d77308
MF
1331#define bfin_read_TIMER5_WIDTH() bfin_read32(TIMER5_WIDTH)
1332#define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH, val)
d4d77308
MF
1333#define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)
1334#define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG, val)
d4d77308
MF
1335#define bfin_read_TIMER6_COUNTER() bfin_read32(TIMER6_COUNTER)
1336#define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER, val)
d4d77308
MF
1337#define bfin_read_TIMER6_PERIOD() bfin_read32(TIMER6_PERIOD)
1338#define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD, val)
d4d77308
MF
1339#define bfin_read_TIMER6_WIDTH() bfin_read32(TIMER6_WIDTH)
1340#define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH, val)
d4d77308
MF
1341#define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)
1342#define bfin_write_TIMER7_CONFIG(val) bfin_write16(TIMER7_CONFIG, val)
d4d77308
MF
1343#define bfin_read_TIMER7_COUNTER() bfin_read32(TIMER7_COUNTER)
1344#define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER, val)
d4d77308
MF
1345#define bfin_read_TIMER7_PERIOD() bfin_read32(TIMER7_PERIOD)
1346#define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD, val)
d4d77308
MF
1347#define bfin_read_TIMER7_WIDTH() bfin_read32(TIMER7_WIDTH)
1348#define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH, val)
d4d77308
MF
1349#define bfin_read_TIMER8_CONFIG() bfin_read16(TIMER8_CONFIG)
1350#define bfin_write_TIMER8_CONFIG(val) bfin_write16(TIMER8_CONFIG, val)
d4d77308
MF
1351#define bfin_read_TIMER8_COUNTER() bfin_read32(TIMER8_COUNTER)
1352#define bfin_write_TIMER8_COUNTER(val) bfin_write32(TIMER8_COUNTER, val)
d4d77308
MF
1353#define bfin_read_TIMER8_PERIOD() bfin_read32(TIMER8_PERIOD)
1354#define bfin_write_TIMER8_PERIOD(val) bfin_write32(TIMER8_PERIOD, val)
d4d77308
MF
1355#define bfin_read_TIMER8_WIDTH() bfin_read32(TIMER8_WIDTH)
1356#define bfin_write_TIMER8_WIDTH(val) bfin_write32(TIMER8_WIDTH, val)
d4d77308
MF
1357#define bfin_read_TIMER9_CONFIG() bfin_read16(TIMER9_CONFIG)
1358#define bfin_write_TIMER9_CONFIG(val) bfin_write16(TIMER9_CONFIG, val)
d4d77308
MF
1359#define bfin_read_TIMER9_COUNTER() bfin_read32(TIMER9_COUNTER)
1360#define bfin_write_TIMER9_COUNTER(val) bfin_write32(TIMER9_COUNTER, val)
d4d77308
MF
1361#define bfin_read_TIMER9_PERIOD() bfin_read32(TIMER9_PERIOD)
1362#define bfin_write_TIMER9_PERIOD(val) bfin_write32(TIMER9_PERIOD, val)
d4d77308
MF
1363#define bfin_read_TIMER9_WIDTH() bfin_read32(TIMER9_WIDTH)
1364#define bfin_write_TIMER9_WIDTH(val) bfin_write32(TIMER9_WIDTH, val)
d4d77308
MF
1365#define bfin_read_TIMER10_CONFIG() bfin_read16(TIMER10_CONFIG)
1366#define bfin_write_TIMER10_CONFIG(val) bfin_write16(TIMER10_CONFIG, val)
d4d77308
MF
1367#define bfin_read_TIMER10_COUNTER() bfin_read32(TIMER10_COUNTER)
1368#define bfin_write_TIMER10_COUNTER(val) bfin_write32(TIMER10_COUNTER, val)
d4d77308
MF
1369#define bfin_read_TIMER10_PERIOD() bfin_read32(TIMER10_PERIOD)
1370#define bfin_write_TIMER10_PERIOD(val) bfin_write32(TIMER10_PERIOD, val)
d4d77308
MF
1371#define bfin_read_TIMER10_WIDTH() bfin_read32(TIMER10_WIDTH)
1372#define bfin_write_TIMER10_WIDTH(val) bfin_write32(TIMER10_WIDTH, val)
d4d77308
MF
1373#define bfin_read_TIMER_ENABLE0() bfin_read16(TIMER_ENABLE0)
1374#define bfin_write_TIMER_ENABLE0(val) bfin_write16(TIMER_ENABLE0, val)
d4d77308
MF
1375#define bfin_read_TIMER_DISABLE0() bfin_read16(TIMER_DISABLE0)
1376#define bfin_write_TIMER_DISABLE0(val) bfin_write16(TIMER_DISABLE0, val)
d4d77308
MF
1377#define bfin_read_TIMER_STATUS0() bfin_read32(TIMER_STATUS0)
1378#define bfin_write_TIMER_STATUS0(val) bfin_write32(TIMER_STATUS0, val)
d4d77308
MF
1379#define bfin_read_TIMER_ENABLE1() bfin_read16(TIMER_ENABLE1)
1380#define bfin_write_TIMER_ENABLE1(val) bfin_write16(TIMER_ENABLE1, val)
d4d77308
MF
1381#define bfin_read_TIMER_DISABLE1() bfin_read16(TIMER_DISABLE1)
1382#define bfin_write_TIMER_DISABLE1(val) bfin_write16(TIMER_DISABLE1, val)
d4d77308
MF
1383#define bfin_read_TIMER_STATUS1() bfin_read32(TIMER_STATUS1)
1384#define bfin_write_TIMER_STATUS1(val) bfin_write32(TIMER_STATUS1, val)
d4d77308
MF
1385#define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
1386#define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val)
d4d77308
MF
1387#define bfin_read_WDOG_CNT() bfin_read32(WDOG_CNT)
1388#define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT, val)
d4d77308
MF
1389#define bfin_read_WDOG_STAT() bfin_read32(WDOG_STAT)
1390#define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT, val)
d4d77308
MF
1391#define bfin_read_CNT_CONFIG() bfin_read16(CNT_CONFIG)
1392#define bfin_write_CNT_CONFIG(val) bfin_write16(CNT_CONFIG, val)
d4d77308
MF
1393#define bfin_read_CNT_IMASK() bfin_read16(CNT_IMASK)
1394#define bfin_write_CNT_IMASK(val) bfin_write16(CNT_IMASK, val)
d4d77308
MF
1395#define bfin_read_CNT_STATUS() bfin_read16(CNT_STATUS)
1396#define bfin_write_CNT_STATUS(val) bfin_write16(CNT_STATUS, val)
d4d77308
MF
1397#define bfin_read_CNT_COMMAND() bfin_read16(CNT_COMMAND)
1398#define bfin_write_CNT_COMMAND(val) bfin_write16(CNT_COMMAND, val)
d4d77308
MF
1399#define bfin_read_CNT_DEBOUNCE() bfin_read16(CNT_DEBOUNCE)
1400#define bfin_write_CNT_DEBOUNCE(val) bfin_write16(CNT_DEBOUNCE, val)
d4d77308
MF
1401#define bfin_read_CNT_COUNTER() bfin_read32(CNT_COUNTER)
1402#define bfin_write_CNT_COUNTER(val) bfin_write32(CNT_COUNTER, val)
d4d77308
MF
1403#define bfin_read_CNT_MAX() bfin_read32(CNT_MAX)
1404#define bfin_write_CNT_MAX(val) bfin_write32(CNT_MAX, val)
d4d77308
MF
1405#define bfin_read_CNT_MIN() bfin_read32(CNT_MIN)
1406#define bfin_write_CNT_MIN(val) bfin_write32(CNT_MIN, val)
d4d77308
MF
1407#define bfin_read_RTC_STAT() bfin_read32(RTC_STAT)
1408#define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT, val)
d4d77308
MF
1409#define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
1410#define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val)
d4d77308
MF
1411#define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
1412#define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val)
d4d77308
MF
1413#define bfin_read_RTC_SWCNT() bfin_read16(RTC_SWCNT)
1414#define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val)
d4d77308
MF
1415#define bfin_read_RTC_ALARM() bfin_read32(RTC_ALARM)
1416#define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM, val)
d4d77308
MF
1417#define bfin_read_RTC_PREN() bfin_read16(RTC_PREN)
1418#define bfin_write_RTC_PREN(val) bfin_write16(RTC_PREN, val)
d4d77308
MF
1419#define bfin_read_OTP_CONTROL() bfin_read16(OTP_CONTROL)
1420#define bfin_write_OTP_CONTROL(val) bfin_write16(OTP_CONTROL, val)
d4d77308
MF
1421#define bfin_read_OTP_BEN() bfin_read16(OTP_BEN)
1422#define bfin_write_OTP_BEN(val) bfin_write16(OTP_BEN, val)
d4d77308
MF
1423#define bfin_read_OTP_STATUS() bfin_read16(OTP_STATUS)
1424#define bfin_write_OTP_STATUS(val) bfin_write16(OTP_STATUS, val)
d4d77308
MF
1425#define bfin_read_OTP_TIMING() bfin_read32(OTP_TIMING)
1426#define bfin_write_OTP_TIMING(val) bfin_write32(OTP_TIMING, val)
d4d77308
MF
1427#define bfin_read_SECURE_SYSSWT() bfin_read32(SECURE_SYSSWT)
1428#define bfin_write_SECURE_SYSSWT(val) bfin_write32(SECURE_SYSSWT, val)
d4d77308
MF
1429#define bfin_read_SECURE_CONTROL() bfin_read16(SECURE_CONTROL)
1430#define bfin_write_SECURE_CONTROL(val) bfin_write16(SECURE_CONTROL, val)
d4d77308
MF
1431#define bfin_read_SECURE_STATUS() bfin_read16(SECURE_STATUS)
1432#define bfin_write_SECURE_STATUS(val) bfin_write16(SECURE_STATUS, val)
d4d77308
MF
1433#define bfin_read_OTP_DATA0() bfin_read32(OTP_DATA0)
1434#define bfin_write_OTP_DATA0(val) bfin_write32(OTP_DATA0, val)
d4d77308
MF
1435#define bfin_read_OTP_DATA1() bfin_read32(OTP_DATA1)
1436#define bfin_write_OTP_DATA1(val) bfin_write32(OTP_DATA1, val)
d4d77308
MF
1437#define bfin_read_OTP_DATA2() bfin_read32(OTP_DATA2)
1438#define bfin_write_OTP_DATA2(val) bfin_write32(OTP_DATA2, val)
d4d77308
MF
1439#define bfin_read_OTP_DATA3() bfin_read32(OTP_DATA3)
1440#define bfin_write_OTP_DATA3(val) bfin_write32(OTP_DATA3, val)
d4d77308
MF
1441#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
1442#define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL, val)
d4d77308
MF
1443#define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
1444#define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val)
d4d77308
MF
1445#define bfin_read_VR_CTL() bfin_read16(VR_CTL)
1446#define bfin_write_VR_CTL(val) bfin_write16(VR_CTL, val)
d4d77308
MF
1447#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
1448#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
d4d77308
MF
1449#define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
1450#define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val)
d4d77308
MF
1451#define bfin_read_KPAD_CTL() bfin_read16(KPAD_CTL)
1452#define bfin_write_KPAD_CTL(val) bfin_write16(KPAD_CTL, val)
d4d77308
MF
1453#define bfin_read_KPAD_PRESCALE() bfin_read16(KPAD_PRESCALE)
1454#define bfin_write_KPAD_PRESCALE(val) bfin_write16(KPAD_PRESCALE, val)
d4d77308
MF
1455#define bfin_read_KPAD_MSEL() bfin_read16(KPAD_MSEL)
1456#define bfin_write_KPAD_MSEL(val) bfin_write16(KPAD_MSEL, val)
d4d77308
MF
1457#define bfin_read_KPAD_ROWCOL() bfin_read16(KPAD_ROWCOL)
1458#define bfin_write_KPAD_ROWCOL(val) bfin_write16(KPAD_ROWCOL, val)
d4d77308
MF
1459#define bfin_read_KPAD_STAT() bfin_read16(KPAD_STAT)
1460#define bfin_write_KPAD_STAT(val) bfin_write16(KPAD_STAT, val)
d4d77308
MF
1461#define bfin_read_KPAD_SOFTEVAL() bfin_read16(KPAD_SOFTEVAL)
1462#define bfin_write_KPAD_SOFTEVAL(val) bfin_write16(KPAD_SOFTEVAL, val)
d4d77308
MF
1463#define bfin_read_SDH_PWR_CTL() bfin_read16(SDH_PWR_CTL)
1464#define bfin_write_SDH_PWR_CTL(val) bfin_write16(SDH_PWR_CTL, val)
d4d77308
MF
1465#define bfin_read_SDH_CLK_CTL() bfin_read16(SDH_CLK_CTL)
1466#define bfin_write_SDH_CLK_CTL(val) bfin_write16(SDH_CLK_CTL, val)
d4d77308
MF
1467#define bfin_read_SDH_ARGUMENT() bfin_read32(SDH_ARGUMENT)
1468#define bfin_write_SDH_ARGUMENT(val) bfin_write32(SDH_ARGUMENT, val)
d4d77308
MF
1469#define bfin_read_SDH_COMMAND() bfin_read16(SDH_COMMAND)
1470#define bfin_write_SDH_COMMAND(val) bfin_write16(SDH_COMMAND, val)
d4d77308
MF
1471#define bfin_read_SDH_RESP_CMD() bfin_read16(SDH_RESP_CMD)
1472#define bfin_write_SDH_RESP_CMD(val) bfin_write16(SDH_RESP_CMD, val)
d4d77308
MF
1473#define bfin_read_SDH_RESPONSE0() bfin_read32(SDH_RESPONSE0)
1474#define bfin_write_SDH_RESPONSE0(val) bfin_write32(SDH_RESPONSE0, val)
d4d77308
MF
1475#define bfin_read_SDH_RESPONSE1() bfin_read32(SDH_RESPONSE1)
1476#define bfin_write_SDH_RESPONSE1(val) bfin_write32(SDH_RESPONSE1, val)
d4d77308
MF
1477#define bfin_read_SDH_RESPONSE2() bfin_read32(SDH_RESPONSE2)
1478#define bfin_write_SDH_RESPONSE2(val) bfin_write32(SDH_RESPONSE2, val)
d4d77308
MF
1479#define bfin_read_SDH_RESPONSE3() bfin_read32(SDH_RESPONSE3)
1480#define bfin_write_SDH_RESPONSE3(val) bfin_write32(SDH_RESPONSE3, val)
d4d77308
MF
1481#define bfin_read_SDH_DATA_TIMER() bfin_read32(SDH_DATA_TIMER)
1482#define bfin_write_SDH_DATA_TIMER(val) bfin_write32(SDH_DATA_TIMER, val)
d4d77308
MF
1483#define bfin_read_SDH_DATA_LGTH() bfin_read16(SDH_DATA_LGTH)
1484#define bfin_write_SDH_DATA_LGTH(val) bfin_write16(SDH_DATA_LGTH, val)
d4d77308
MF
1485#define bfin_read_SDH_DATA_CTL() bfin_read16(SDH_DATA_CTL)
1486#define bfin_write_SDH_DATA_CTL(val) bfin_write16(SDH_DATA_CTL, val)
d4d77308
MF
1487#define bfin_read_SDH_DATA_CNT() bfin_read16(SDH_DATA_CNT)
1488#define bfin_write_SDH_DATA_CNT(val) bfin_write16(SDH_DATA_CNT, val)
d4d77308
MF
1489#define bfin_read_SDH_STATUS() bfin_read32(SDH_STATUS)
1490#define bfin_write_SDH_STATUS(val) bfin_write32(SDH_STATUS, val)
d4d77308
MF
1491#define bfin_read_SDH_STATUS_CLR() bfin_read16(SDH_STATUS_CLR)
1492#define bfin_write_SDH_STATUS_CLR(val) bfin_write16(SDH_STATUS_CLR, val)
d4d77308
MF
1493#define bfin_read_SDH_MASK0() bfin_read32(SDH_MASK0)
1494#define bfin_write_SDH_MASK0(val) bfin_write32(SDH_MASK0, val)
d4d77308
MF
1495#define bfin_read_SDH_MASK1() bfin_read32(SDH_MASK1)
1496#define bfin_write_SDH_MASK1(val) bfin_write32(SDH_MASK1, val)
d4d77308
MF
1497#define bfin_read_SDH_FIFO_CNT() bfin_read16(SDH_FIFO_CNT)
1498#define bfin_write_SDH_FIFO_CNT(val) bfin_write16(SDH_FIFO_CNT, val)
d4d77308
MF
1499#define bfin_read_SDH_FIFO() bfin_read32(SDH_FIFO)
1500#define bfin_write_SDH_FIFO(val) bfin_write32(SDH_FIFO, val)
d4d77308
MF
1501#define bfin_read_SDH_E_STATUS() bfin_read16(SDH_E_STATUS)
1502#define bfin_write_SDH_E_STATUS(val) bfin_write16(SDH_E_STATUS, val)
d4d77308
MF
1503#define bfin_read_SDH_E_MASK() bfin_read16(SDH_E_MASK)
1504#define bfin_write_SDH_E_MASK(val) bfin_write16(SDH_E_MASK, val)
d4d77308
MF
1505#define bfin_read_SDH_CFG() bfin_read16(SDH_CFG)
1506#define bfin_write_SDH_CFG(val) bfin_write16(SDH_CFG, val)
d4d77308
MF
1507#define bfin_read_SDH_RD_WAIT_EN() bfin_read16(SDH_RD_WAIT_EN)
1508#define bfin_write_SDH_RD_WAIT_EN(val) bfin_write16(SDH_RD_WAIT_EN, val)
d4d77308
MF
1509#define bfin_read_SDH_PID0() bfin_read16(SDH_PID0)
1510#define bfin_write_SDH_PID0(val) bfin_write16(SDH_PID0, val)
d4d77308
MF
1511#define bfin_read_SDH_PID1() bfin_read16(SDH_PID1)
1512#define bfin_write_SDH_PID1(val) bfin_write16(SDH_PID1, val)
d4d77308
MF
1513#define bfin_read_SDH_PID2() bfin_read16(SDH_PID2)
1514#define bfin_write_SDH_PID2(val) bfin_write16(SDH_PID2, val)
d4d77308
MF
1515#define bfin_read_SDH_PID3() bfin_read16(SDH_PID3)
1516#define bfin_write_SDH_PID3(val) bfin_write16(SDH_PID3, val)
d4d77308
MF
1517#define bfin_read_SDH_PID4() bfin_read16(SDH_PID4)
1518#define bfin_write_SDH_PID4(val) bfin_write16(SDH_PID4, val)
d4d77308
MF
1519#define bfin_read_SDH_PID5() bfin_read16(SDH_PID5)
1520#define bfin_write_SDH_PID5(val) bfin_write16(SDH_PID5, val)
d4d77308
MF
1521#define bfin_read_SDH_PID6() bfin_read16(SDH_PID6)
1522#define bfin_write_SDH_PID6(val) bfin_write16(SDH_PID6, val)
d4d77308
MF
1523#define bfin_read_SDH_PID7() bfin_read16(SDH_PID7)
1524#define bfin_write_SDH_PID7(val) bfin_write16(SDH_PID7, val)
d4d77308
MF
1525#define bfin_read_ATAPI_CONTROL() bfin_read16(ATAPI_CONTROL)
1526#define bfin_write_ATAPI_CONTROL(val) bfin_write16(ATAPI_CONTROL, val)
d4d77308
MF
1527#define bfin_read_ATAPI_STATUS() bfin_read16(ATAPI_STATUS)
1528#define bfin_write_ATAPI_STATUS(val) bfin_write16(ATAPI_STATUS, val)
d4d77308
MF
1529#define bfin_read_ATAPI_DEV_ADDR() bfin_read16(ATAPI_DEV_ADDR)
1530#define bfin_write_ATAPI_DEV_ADDR(val) bfin_write16(ATAPI_DEV_ADDR, val)
d4d77308
MF
1531#define bfin_read_ATAPI_DEV_TXBUF() bfin_read16(ATAPI_DEV_TXBUF)
1532#define bfin_write_ATAPI_DEV_TXBUF(val) bfin_write16(ATAPI_DEV_TXBUF, val)
d4d77308
MF
1533#define bfin_read_ATAPI_DEV_RXBUF() bfin_read16(ATAPI_DEV_RXBUF)
1534#define bfin_write_ATAPI_DEV_RXBUF(val) bfin_write16(ATAPI_DEV_RXBUF, val)
d4d77308
MF
1535#define bfin_read_ATAPI_INT_MASK() bfin_read16(ATAPI_INT_MASK)
1536#define bfin_write_ATAPI_INT_MASK(val) bfin_write16(ATAPI_INT_MASK, val)
d4d77308
MF
1537#define bfin_read_ATAPI_INT_STATUS() bfin_read16(ATAPI_INT_STATUS)
1538#define bfin_write_ATAPI_INT_STATUS(val) bfin_write16(ATAPI_INT_STATUS, val)
d4d77308
MF
1539#define bfin_read_ATAPI_XFER_LEN() bfin_read16(ATAPI_XFER_LEN)
1540#define bfin_write_ATAPI_XFER_LEN(val) bfin_write16(ATAPI_XFER_LEN, val)
d4d77308
MF
1541#define bfin_read_ATAPI_LINE_STATUS() bfin_read16(ATAPI_LINE_STATUS)
1542#define bfin_write_ATAPI_LINE_STATUS(val) bfin_write16(ATAPI_LINE_STATUS, val)
d4d77308
MF
1543#define bfin_read_ATAPI_SM_STATE() bfin_read16(ATAPI_SM_STATE)
1544#define bfin_write_ATAPI_SM_STATE(val) bfin_write16(ATAPI_SM_STATE, val)
d4d77308
MF
1545#define bfin_read_ATAPI_TERMINATE() bfin_read16(ATAPI_TERMINATE)
1546#define bfin_write_ATAPI_TERMINATE(val) bfin_write16(ATAPI_TERMINATE, val)
d4d77308
MF
1547#define bfin_read_ATAPI_PIO_TFRCNT() bfin_read16(ATAPI_PIO_TFRCNT)
1548#define bfin_write_ATAPI_PIO_TFRCNT(val) bfin_write16(ATAPI_PIO_TFRCNT, val)
d4d77308
MF
1549#define bfin_read_ATAPI_DMA_TFRCNT() bfin_read16(ATAPI_DMA_TFRCNT)
1550#define bfin_write_ATAPI_DMA_TFRCNT(val) bfin_write16(ATAPI_DMA_TFRCNT, val)
d4d77308
MF
1551#define bfin_read_ATAPI_UMAIN_TFRCNT() bfin_read16(ATAPI_UMAIN_TFRCNT)
1552#define bfin_write_ATAPI_UMAIN_TFRCNT(val) bfin_write16(ATAPI_UMAIN_TFRCNT, val)
d4d77308
MF
1553#define bfin_read_ATAPI_UDMAOUT_TFRCNT() bfin_read16(ATAPI_UDMAOUT_TFRCNT)
1554#define bfin_write_ATAPI_UDMAOUT_TFRCNT(val) bfin_write16(ATAPI_UDMAOUT_TFRCNT, val)
d4d77308
MF
1555#define bfin_read_ATAPI_REG_TIM_0() bfin_read16(ATAPI_REG_TIM_0)
1556#define bfin_write_ATAPI_REG_TIM_0(val) bfin_write16(ATAPI_REG_TIM_0, val)
d4d77308
MF
1557#define bfin_read_ATAPI_PIO_TIM_0() bfin_read16(ATAPI_PIO_TIM_0)
1558#define bfin_write_ATAPI_PIO_TIM_0(val) bfin_write16(ATAPI_PIO_TIM_0, val)
d4d77308
MF
1559#define bfin_read_ATAPI_PIO_TIM_1() bfin_read16(ATAPI_PIO_TIM_1)
1560#define bfin_write_ATAPI_PIO_TIM_1(val) bfin_write16(ATAPI_PIO_TIM_1, val)
d4d77308
MF
1561#define bfin_read_ATAPI_MULTI_TIM_0() bfin_read16(ATAPI_MULTI_TIM_0)
1562#define bfin_write_ATAPI_MULTI_TIM_0(val) bfin_write16(ATAPI_MULTI_TIM_0, val)
d4d77308
MF
1563#define bfin_read_ATAPI_MULTI_TIM_1() bfin_read16(ATAPI_MULTI_TIM_1)
1564#define bfin_write_ATAPI_MULTI_TIM_1(val) bfin_write16(ATAPI_MULTI_TIM_1, val)
d4d77308
MF
1565#define bfin_read_ATAPI_MULTI_TIM_2() bfin_read16(ATAPI_MULTI_TIM_2)
1566#define bfin_write_ATAPI_MULTI_TIM_2(val) bfin_write16(ATAPI_MULTI_TIM_2, val)
d4d77308
MF
1567#define bfin_read_ATAPI_ULTRA_TIM_0() bfin_read16(ATAPI_ULTRA_TIM_0)
1568#define bfin_write_ATAPI_ULTRA_TIM_0(val) bfin_write16(ATAPI_ULTRA_TIM_0, val)
d4d77308
MF
1569#define bfin_read_ATAPI_ULTRA_TIM_1() bfin_read16(ATAPI_ULTRA_TIM_1)
1570#define bfin_write_ATAPI_ULTRA_TIM_1(val) bfin_write16(ATAPI_ULTRA_TIM_1, val)
d4d77308
MF
1571#define bfin_read_ATAPI_ULTRA_TIM_2() bfin_read16(ATAPI_ULTRA_TIM_2)
1572#define bfin_write_ATAPI_ULTRA_TIM_2(val) bfin_write16(ATAPI_ULTRA_TIM_2, val)
d4d77308
MF
1573#define bfin_read_ATAPI_ULTRA_TIM_3() bfin_read16(ATAPI_ULTRA_TIM_3)
1574#define bfin_write_ATAPI_ULTRA_TIM_3(val) bfin_write16(ATAPI_ULTRA_TIM_3, val)
d4d77308
MF
1575#define bfin_read_NFC_CTL() bfin_read16(NFC_CTL)
1576#define bfin_write_NFC_CTL(val) bfin_write16(NFC_CTL, val)
d4d77308
MF
1577#define bfin_read_NFC_STAT() bfin_read16(NFC_STAT)
1578#define bfin_write_NFC_STAT(val) bfin_write16(NFC_STAT, val)
d4d77308
MF
1579#define bfin_read_NFC_IRQSTAT() bfin_read16(NFC_IRQSTAT)
1580#define bfin_write_NFC_IRQSTAT(val) bfin_write16(NFC_IRQSTAT, val)
d4d77308
MF
1581#define bfin_read_NFC_IRQMASK() bfin_read16(NFC_IRQMASK)
1582#define bfin_write_NFC_IRQMASK(val) bfin_write16(NFC_IRQMASK, val)
d4d77308
MF
1583#define bfin_read_NFC_ECC0() bfin_read16(NFC_ECC0)
1584#define bfin_write_NFC_ECC0(val) bfin_write16(NFC_ECC0, val)
d4d77308
MF
1585#define bfin_read_NFC_ECC1() bfin_read16(NFC_ECC1)
1586#define bfin_write_NFC_ECC1(val) bfin_write16(NFC_ECC1, val)
d4d77308
MF
1587#define bfin_read_NFC_ECC2() bfin_read16(NFC_ECC2)
1588#define bfin_write_NFC_ECC2(val) bfin_write16(NFC_ECC2, val)
d4d77308
MF
1589#define bfin_read_NFC_ECC3() bfin_read16(NFC_ECC3)
1590#define bfin_write_NFC_ECC3(val) bfin_write16(NFC_ECC3, val)
d4d77308
MF
1591#define bfin_read_NFC_COUNT() bfin_read16(NFC_COUNT)
1592#define bfin_write_NFC_COUNT(val) bfin_write16(NFC_COUNT, val)
d4d77308
MF
1593#define bfin_read_NFC_RST() bfin_read16(NFC_RST)
1594#define bfin_write_NFC_RST(val) bfin_write16(NFC_RST, val)
d4d77308
MF
1595#define bfin_read_NFC_PGCTL() bfin_read16(NFC_PGCTL)
1596#define bfin_write_NFC_PGCTL(val) bfin_write16(NFC_PGCTL, val)
d4d77308
MF
1597#define bfin_read_NFC_READ() bfin_read16(NFC_READ)
1598#define bfin_write_NFC_READ(val) bfin_write16(NFC_READ, val)
d4d77308
MF
1599#define bfin_read_NFC_ADDR() bfin_read16(NFC_ADDR)
1600#define bfin_write_NFC_ADDR(val) bfin_write16(NFC_ADDR, val)
d4d77308
MF
1601#define bfin_read_NFC_CMD() bfin_read16(NFC_CMD)
1602#define bfin_write_NFC_CMD(val) bfin_write16(NFC_CMD, val)
d4d77308
MF
1603#define bfin_read_NFC_DATA_WR() bfin_read16(NFC_DATA_WR)
1604#define bfin_write_NFC_DATA_WR(val) bfin_write16(NFC_DATA_WR, val)
d4d77308
MF
1605#define bfin_read_NFC_DATA_RD() bfin_read16(NFC_DATA_RD)
1606#define bfin_write_NFC_DATA_RD(val) bfin_write16(NFC_DATA_RD, val)
d4d77308
MF
1607#define bfin_read_EPPI0_STATUS() bfin_read16(EPPI0_STATUS)
1608#define bfin_write_EPPI0_STATUS(val) bfin_write16(EPPI0_STATUS, val)
d4d77308
MF
1609#define bfin_read_EPPI0_HCOUNT() bfin_read16(EPPI0_HCOUNT)
1610#define bfin_write_EPPI0_HCOUNT(val) bfin_write16(EPPI0_HCOUNT, val)
d4d77308
MF
1611#define bfin_read_EPPI0_HDELAY() bfin_read16(EPPI0_HDELAY)
1612#define bfin_write_EPPI0_HDELAY(val) bfin_write16(EPPI0_HDELAY, val)
d4d77308
MF
1613#define bfin_read_EPPI0_VCOUNT() bfin_read16(EPPI0_VCOUNT)
1614#define bfin_write_EPPI0_VCOUNT(val) bfin_write16(EPPI0_VCOUNT, val)
d4d77308
MF
1615#define bfin_read_EPPI0_VDELAY() bfin_read16(EPPI0_VDELAY)
1616#define bfin_write_EPPI0_VDELAY(val) bfin_write16(EPPI0_VDELAY, val)
d4d77308
MF
1617#define bfin_read_EPPI0_FRAME() bfin_read16(EPPI0_FRAME)
1618#define bfin_write_EPPI0_FRAME(val) bfin_write16(EPPI0_FRAME, val)
d4d77308
MF
1619#define bfin_read_EPPI0_LINE() bfin_read16(EPPI0_LINE)
1620#define bfin_write_EPPI0_LINE(val) bfin_write16(EPPI0_LINE, val)
d4d77308
MF
1621#define bfin_read_EPPI0_CLKDIV() bfin_read16(EPPI0_CLKDIV)
1622#define bfin_write_EPPI0_CLKDIV(val) bfin_write16(EPPI0_CLKDIV, val)
d4d77308
MF
1623#define bfin_read_EPPI0_CONTROL() bfin_read32(EPPI0_CONTROL)
1624#define bfin_write_EPPI0_CONTROL(val) bfin_write32(EPPI0_CONTROL, val)
d4d77308
MF
1625#define bfin_read_EPPI0_FS1W_HBL() bfin_read32(EPPI0_FS1W_HBL)
1626#define bfin_write_EPPI0_FS1W_HBL(val) bfin_write32(EPPI0_FS1W_HBL, val)
d4d77308
MF
1627#define bfin_read_EPPI0_FS1P_AVPL() bfin_read32(EPPI0_FS1P_AVPL)
1628#define bfin_write_EPPI0_FS1P_AVPL(val) bfin_write32(EPPI0_FS1P_AVPL, val)
d4d77308
MF
1629#define bfin_read_EPPI0_FS2W_LVB() bfin_read32(EPPI0_FS2W_LVB)
1630#define bfin_write_EPPI0_FS2W_LVB(val) bfin_write32(EPPI0_FS2W_LVB, val)
d4d77308
MF
1631#define bfin_read_EPPI0_FS2P_LAVF() bfin_read32(EPPI0_FS2P_LAVF)
1632#define bfin_write_EPPI0_FS2P_LAVF(val) bfin_write32(EPPI0_FS2P_LAVF, val)
d4d77308
MF
1633#define bfin_read_EPPI0_CLIP() bfin_read32(EPPI0_CLIP)
1634#define bfin_write_EPPI0_CLIP(val) bfin_write32(EPPI0_CLIP, val)
d4d77308
MF
1635#define bfin_read_EPPI1_STATUS() bfin_read16(EPPI1_STATUS)
1636#define bfin_write_EPPI1_STATUS(val) bfin_write16(EPPI1_STATUS, val)
d4d77308
MF
1637#define bfin_read_EPPI1_HCOUNT() bfin_read16(EPPI1_HCOUNT)
1638#define bfin_write_EPPI1_HCOUNT(val) bfin_write16(EPPI1_HCOUNT, val)
d4d77308
MF
1639#define bfin_read_EPPI1_HDELAY() bfin_read16(EPPI1_HDELAY)
1640#define bfin_write_EPPI1_HDELAY(val) bfin_write16(EPPI1_HDELAY, val)
d4d77308
MF
1641#define bfin_read_EPPI1_VCOUNT() bfin_read16(EPPI1_VCOUNT)
1642#define bfin_write_EPPI1_VCOUNT(val) bfin_write16(EPPI1_VCOUNT, val)
d4d77308
MF
1643#define bfin_read_EPPI1_VDELAY() bfin_read16(EPPI1_VDELAY)
1644#define bfin_write_EPPI1_VDELAY(val) bfin_write16(EPPI1_VDELAY, val)
d4d77308
MF
1645#define bfin_read_EPPI1_FRAME() bfin_read16(EPPI1_FRAME)
1646#define bfin_write_EPPI1_FRAME(val) bfin_write16(EPPI1_FRAME, val)
d4d77308
MF
1647#define bfin_read_EPPI1_LINE() bfin_read16(EPPI1_LINE)
1648#define bfin_write_EPPI1_LINE(val) bfin_write16(EPPI1_LINE, val)
d4d77308
MF
1649#define bfin_read_EPPI1_CLKDIV() bfin_read16(EPPI1_CLKDIV)
1650#define bfin_write_EPPI1_CLKDIV(val) bfin_write16(EPPI1_CLKDIV, val)
d4d77308
MF
1651#define bfin_read_EPPI1_CONTROL() bfin_read32(EPPI1_CONTROL)
1652#define bfin_write_EPPI1_CONTROL(val) bfin_write32(EPPI1_CONTROL, val)
d4d77308
MF
1653#define bfin_read_EPPI1_FS1W_HBL() bfin_read32(EPPI1_FS1W_HBL)
1654#define bfin_write_EPPI1_FS1W_HBL(val) bfin_write32(EPPI1_FS1W_HBL, val)
d4d77308
MF
1655#define bfin_read_EPPI1_FS1P_AVPL() bfin_read32(EPPI1_FS1P_AVPL)
1656#define bfin_write_EPPI1_FS1P_AVPL(val) bfin_write32(EPPI1_FS1P_AVPL, val)
d4d77308
MF
1657#define bfin_read_EPPI1_FS2W_LVB() bfin_read32(EPPI1_FS2W_LVB)
1658#define bfin_write_EPPI1_FS2W_LVB(val) bfin_write32(EPPI1_FS2W_LVB, val)
d4d77308
MF
1659#define bfin_read_EPPI1_FS2P_LAVF() bfin_read32(EPPI1_FS2P_LAVF)
1660#define bfin_write_EPPI1_FS2P_LAVF(val) bfin_write32(EPPI1_FS2P_LAVF, val)
d4d77308
MF
1661#define bfin_read_EPPI1_CLIP() bfin_read32(EPPI1_CLIP)
1662#define bfin_write_EPPI1_CLIP(val) bfin_write32(EPPI1_CLIP, val)
d4d77308
MF
1663#define bfin_read_EPPI2_STATUS() bfin_read16(EPPI2_STATUS)
1664#define bfin_write_EPPI2_STATUS(val) bfin_write16(EPPI2_STATUS, val)
d4d77308
MF
1665#define bfin_read_EPPI2_HCOUNT() bfin_read16(EPPI2_HCOUNT)
1666#define bfin_write_EPPI2_HCOUNT(val) bfin_write16(EPPI2_HCOUNT, val)
d4d77308
MF
1667#define bfin_read_EPPI2_HDELAY() bfin_read16(EPPI2_HDELAY)
1668#define bfin_write_EPPI2_HDELAY(val) bfin_write16(EPPI2_HDELAY, val)
d4d77308
MF
1669#define bfin_read_EPPI2_VCOUNT() bfin_read16(EPPI2_VCOUNT)
1670#define bfin_write_EPPI2_VCOUNT(val) bfin_write16(EPPI2_VCOUNT, val)
d4d77308
MF
1671#define bfin_read_EPPI2_VDELAY() bfin_read16(EPPI2_VDELAY)
1672#define bfin_write_EPPI2_VDELAY(val) bfin_write16(EPPI2_VDELAY, val)
d4d77308
MF
1673#define bfin_read_EPPI2_FRAME() bfin_read16(EPPI2_FRAME)
1674#define bfin_write_EPPI2_FRAME(val) bfin_write16(EPPI2_FRAME, val)
d4d77308
MF
1675#define bfin_read_EPPI2_LINE() bfin_read16(EPPI2_LINE)
1676#define bfin_write_EPPI2_LINE(val) bfin_write16(EPPI2_LINE, val)
d4d77308
MF
1677#define bfin_read_EPPI2_CLKDIV() bfin_read16(EPPI2_CLKDIV)
1678#define bfin_write_EPPI2_CLKDIV(val) bfin_write16(EPPI2_CLKDIV, val)
d4d77308
MF
1679#define bfin_read_EPPI2_CONTROL() bfin_read32(EPPI2_CONTROL)
1680#define bfin_write_EPPI2_CONTROL(val) bfin_write32(EPPI2_CONTROL, val)
d4d77308
MF
1681#define bfin_read_EPPI2_FS1W_HBL() bfin_read32(EPPI2_FS1W_HBL)
1682#define bfin_write_EPPI2_FS1W_HBL(val) bfin_write32(EPPI2_FS1W_HBL, val)
d4d77308
MF
1683#define bfin_read_EPPI2_FS1P_AVPL() bfin_read32(EPPI2_FS1P_AVPL)
1684#define bfin_write_EPPI2_FS1P_AVPL(val) bfin_write32(EPPI2_FS1P_AVPL, val)
d4d77308
MF
1685#define bfin_read_EPPI2_FS2W_LVB() bfin_read32(EPPI2_FS2W_LVB)
1686#define bfin_write_EPPI2_FS2W_LVB(val) bfin_write32(EPPI2_FS2W_LVB, val)
d4d77308
MF
1687#define bfin_read_EPPI2_FS2P_LAVF() bfin_read32(EPPI2_FS2P_LAVF)
1688#define bfin_write_EPPI2_FS2P_LAVF(val) bfin_write32(EPPI2_FS2P_LAVF, val)
d4d77308
MF
1689#define bfin_read_EPPI2_CLIP() bfin_read32(EPPI2_CLIP)
1690#define bfin_write_EPPI2_CLIP(val) bfin_write32(EPPI2_CLIP, val)
d4d77308
MF
1691#define bfin_read_SPI0_CTL() bfin_read16(SPI0_CTL)
1692#define bfin_write_SPI0_CTL(val) bfin_write16(SPI0_CTL, val)
d4d77308
MF
1693#define bfin_read_SPI0_FLG() bfin_read16(SPI0_FLG)
1694#define bfin_write_SPI0_FLG(val) bfin_write16(SPI0_FLG, val)
d4d77308
MF
1695#define bfin_read_SPI0_STAT() bfin_read16(SPI0_STAT)
1696#define bfin_write_SPI0_STAT(val) bfin_write16(SPI0_STAT, val)
d4d77308
MF
1697#define bfin_read_SPI0_TDBR() bfin_read16(SPI0_TDBR)
1698#define bfin_write_SPI0_TDBR(val) bfin_write16(SPI0_TDBR, val)
d4d77308
MF
1699#define bfin_read_SPI0_RDBR() bfin_read16(SPI0_RDBR)
1700#define bfin_write_SPI0_RDBR(val) bfin_write16(SPI0_RDBR, val)
d4d77308
MF
1701#define bfin_read_SPI0_BAUD() bfin_read16(SPI0_BAUD)
1702#define bfin_write_SPI0_BAUD(val) bfin_write16(SPI0_BAUD, val)
d4d77308
MF
1703#define bfin_read_SPI0_SHADOW() bfin_read16(SPI0_SHADOW)
1704#define bfin_write_SPI0_SHADOW(val) bfin_write16(SPI0_SHADOW, val)
d4d77308
MF
1705#define bfin_read_SPI1_CTL() bfin_read16(SPI1_CTL)
1706#define bfin_write_SPI1_CTL(val) bfin_write16(SPI1_CTL, val)
d4d77308
MF
1707#define bfin_read_SPI1_FLG() bfin_read16(SPI1_FLG)
1708#define bfin_write_SPI1_FLG(val) bfin_write16(SPI1_FLG, val)
d4d77308
MF
1709#define bfin_read_SPI1_STAT() bfin_read16(SPI1_STAT)
1710#define bfin_write_SPI1_STAT(val) bfin_write16(SPI1_STAT, val)
d4d77308
MF
1711#define bfin_read_SPI1_TDBR() bfin_read16(SPI1_TDBR)
1712#define bfin_write_SPI1_TDBR(val) bfin_write16(SPI1_TDBR, val)
d4d77308
MF
1713#define bfin_read_SPI1_RDBR() bfin_read16(SPI1_RDBR)
1714#define bfin_write_SPI1_RDBR(val) bfin_write16(SPI1_RDBR, val)
d4d77308
MF
1715#define bfin_read_SPI1_BAUD() bfin_read16(SPI1_BAUD)
1716#define bfin_write_SPI1_BAUD(val) bfin_write16(SPI1_BAUD, val)
d4d77308
MF
1717#define bfin_read_SPI1_SHADOW() bfin_read16(SPI1_SHADOW)
1718#define bfin_write_SPI1_SHADOW(val) bfin_write16(SPI1_SHADOW, val)
d4d77308
MF
1719#define bfin_read_SPI2_CTL() bfin_read16(SPI2_CTL)
1720#define bfin_write_SPI2_CTL(val) bfin_write16(SPI2_CTL, val)
d4d77308
MF
1721#define bfin_read_SPI2_FLG() bfin_read16(SPI2_FLG)
1722#define bfin_write_SPI2_FLG(val) bfin_write16(SPI2_FLG, val)
d4d77308
MF
1723#define bfin_read_SPI2_STAT() bfin_read16(SPI2_STAT)
1724#define bfin_write_SPI2_STAT(val) bfin_write16(SPI2_STAT, val)
d4d77308
MF
1725#define bfin_read_SPI2_TDBR() bfin_read16(SPI2_TDBR)
1726#define bfin_write_SPI2_TDBR(val) bfin_write16(SPI2_TDBR, val)
d4d77308
MF
1727#define bfin_read_SPI2_RDBR() bfin_read16(SPI2_RDBR)
1728#define bfin_write_SPI2_RDBR(val) bfin_write16(SPI2_RDBR, val)
d4d77308
MF
1729#define bfin_read_SPI2_BAUD() bfin_read16(SPI2_BAUD)
1730#define bfin_write_SPI2_BAUD(val) bfin_write16(SPI2_BAUD, val)
d4d77308
MF
1731#define bfin_read_SPI2_SHADOW() bfin_read16(SPI2_SHADOW)
1732#define bfin_write_SPI2_SHADOW(val) bfin_write16(SPI2_SHADOW, val)
d4d77308
MF
1733#define bfin_read_TWI0_CLKDIV() bfin_read16(TWI0_CLKDIV)
1734#define bfin_write_TWI0_CLKDIV(val) bfin_write16(TWI0_CLKDIV, val)
d4d77308
MF
1735#define bfin_read_TWI0_CONTROL() bfin_read16(TWI0_CONTROL)
1736#define bfin_write_TWI0_CONTROL(val) bfin_write16(TWI0_CONTROL, val)
d4d77308
MF
1737#define bfin_read_TWI0_SLAVE_CTL() bfin_read16(TWI0_SLAVE_CTL)
1738#define bfin_write_TWI0_SLAVE_CTL(val) bfin_write16(TWI0_SLAVE_CTL, val)
d4d77308
MF
1739#define bfin_read_TWI0_SLAVE_STAT() bfin_read16(TWI0_SLAVE_STAT)
1740#define bfin_write_TWI0_SLAVE_STAT(val) bfin_write16(TWI0_SLAVE_STAT, val)
d4d77308
MF
1741#define bfin_read_TWI0_SLAVE_ADDR() bfin_read16(TWI0_SLAVE_ADDR)
1742#define bfin_write_TWI0_SLAVE_ADDR(val) bfin_write16(TWI0_SLAVE_ADDR, val)
d4d77308
MF
1743#define bfin_read_TWI0_MASTER_CTL() bfin_read16(TWI0_MASTER_CTL)
1744#define bfin_write_TWI0_MASTER_CTL(val) bfin_write16(TWI0_MASTER_CTL, val)
d4d77308
MF
1745#define bfin_read_TWI0_MASTER_STAT() bfin_read16(TWI0_MASTER_STAT)
1746#define bfin_write_TWI0_MASTER_STAT(val) bfin_write16(TWI0_MASTER_STAT, val)
d4d77308
MF
1747#define bfin_read_TWI0_MASTER_ADDR() bfin_read16(TWI0_MASTER_ADDR)
1748#define bfin_write_TWI0_MASTER_ADDR(val) bfin_write16(TWI0_MASTER_ADDR, val)
d4d77308
MF
1749#define bfin_read_TWI0_INT_STAT() bfin_read16(TWI0_INT_STAT)
1750#define bfin_write_TWI0_INT_STAT(val) bfin_write16(TWI0_INT_STAT, val)
d4d77308
MF
1751#define bfin_read_TWI0_INT_MASK() bfin_read16(TWI0_INT_MASK)
1752#define bfin_write_TWI0_INT_MASK(val) bfin_write16(TWI0_INT_MASK, val)
d4d77308
MF
1753#define bfin_read_TWI0_FIFO_CTL() bfin_read16(TWI0_FIFO_CTL)
1754#define bfin_write_TWI0_FIFO_CTL(val) bfin_write16(TWI0_FIFO_CTL, val)
d4d77308
MF
1755#define bfin_read_TWI0_FIFO_STAT() bfin_read16(TWI0_FIFO_STAT)
1756#define bfin_write_TWI0_FIFO_STAT(val) bfin_write16(TWI0_FIFO_STAT, val)
d4d77308
MF
1757#define bfin_read_TWI0_XMT_DATA8() bfin_read16(TWI0_XMT_DATA8)
1758#define bfin_write_TWI0_XMT_DATA8(val) bfin_write16(TWI0_XMT_DATA8, val)
d4d77308
MF
1759#define bfin_read_TWI0_XMT_DATA16() bfin_read16(TWI0_XMT_DATA16)
1760#define bfin_write_TWI0_XMT_DATA16(val) bfin_write16(TWI0_XMT_DATA16, val)
d4d77308
MF
1761#define bfin_read_TWI0_RCV_DATA8() bfin_read16(TWI0_RCV_DATA8)
1762#define bfin_write_TWI0_RCV_DATA8(val) bfin_write16(TWI0_RCV_DATA8, val)
d4d77308
MF
1763#define bfin_read_TWI0_RCV_DATA16() bfin_read16(TWI0_RCV_DATA16)
1764#define bfin_write_TWI0_RCV_DATA16(val) bfin_write16(TWI0_RCV_DATA16, val)
d4d77308
MF
1765#define bfin_read_TWI1_CLKDIV() bfin_read16(TWI1_CLKDIV)
1766#define bfin_write_TWI1_CLKDIV(val) bfin_write16(TWI1_CLKDIV, val)
d4d77308
MF
1767#define bfin_read_TWI1_CONTROL() bfin_read16(TWI1_CONTROL)
1768#define bfin_write_TWI1_CONTROL(val) bfin_write16(TWI1_CONTROL, val)
d4d77308
MF
1769#define bfin_read_TWI1_SLAVE_CTL() bfin_read16(TWI1_SLAVE_CTL)
1770#define bfin_write_TWI1_SLAVE_CTL(val) bfin_write16(TWI1_SLAVE_CTL, val)
d4d77308
MF
1771#define bfin_read_TWI1_SLAVE_STAT() bfin_read16(TWI1_SLAVE_STAT)
1772#define bfin_write_TWI1_SLAVE_STAT(val) bfin_write16(TWI1_SLAVE_STAT, val)
d4d77308
MF
1773#define bfin_read_TWI1_SLAVE_ADDR() bfin_read16(TWI1_SLAVE_ADDR)
1774#define bfin_write_TWI1_SLAVE_ADDR(val) bfin_write16(TWI1_SLAVE_ADDR, val)
d4d77308
MF
1775#define bfin_read_TWI1_MASTER_CTL() bfin_read16(TWI1_MASTER_CTL)
1776#define bfin_write_TWI1_MASTER_CTL(val) bfin_write16(TWI1_MASTER_CTL, val)
d4d77308
MF
1777#define bfin_read_TWI1_MASTER_STAT() bfin_read16(TWI1_MASTER_STAT)
1778#define bfin_write_TWI1_MASTER_STAT(val) bfin_write16(TWI1_MASTER_STAT, val)
d4d77308
MF
1779#define bfin_read_TWI1_MASTER_ADDR() bfin_read16(TWI1_MASTER_ADDR)
1780#define bfin_write_TWI1_MASTER_ADDR(val) bfin_write16(TWI1_MASTER_ADDR, val)
d4d77308
MF
1781#define bfin_read_TWI1_INT_STAT() bfin_read16(TWI1_INT_STAT)
1782#define bfin_write_TWI1_INT_STAT(val) bfin_write16(TWI1_INT_STAT, val)
d4d77308
MF
1783#define bfin_read_TWI1_INT_MASK() bfin_read16(TWI1_INT_MASK)
1784#define bfin_write_TWI1_INT_MASK(val) bfin_write16(TWI1_INT_MASK, val)
d4d77308
MF
1785#define bfin_read_TWI1_FIFO_CTL() bfin_read16(TWI1_FIFO_CTL)
1786#define bfin_write_TWI1_FIFO_CTL(val) bfin_write16(TWI1_FIFO_CTL, val)
d4d77308
MF
1787#define bfin_read_TWI1_FIFO_STAT() bfin_read16(TWI1_FIFO_STAT)
1788#define bfin_write_TWI1_FIFO_STAT(val) bfin_write16(TWI1_FIFO_STAT, val)
d4d77308
MF
1789#define bfin_read_TWI1_XMT_DATA8() bfin_read16(TWI1_XMT_DATA8)
1790#define bfin_write_TWI1_XMT_DATA8(val) bfin_write16(TWI1_XMT_DATA8, val)
d4d77308
MF
1791#define bfin_read_TWI1_XMT_DATA16() bfin_read16(TWI1_XMT_DATA16)
1792#define bfin_write_TWI1_XMT_DATA16(val) bfin_write16(TWI1_XMT_DATA16, val)
d4d77308
MF
1793#define bfin_read_TWI1_RCV_DATA8() bfin_read16(TWI1_RCV_DATA8)
1794#define bfin_write_TWI1_RCV_DATA8(val) bfin_write16(TWI1_RCV_DATA8, val)
d4d77308
MF
1795#define bfin_read_TWI1_RCV_DATA16() bfin_read16(TWI1_RCV_DATA16)
1796#define bfin_write_TWI1_RCV_DATA16(val) bfin_write16(TWI1_RCV_DATA16, val)
d4d77308
MF
1797#define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
1798#define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val)
d4d77308
MF
1799#define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
1800#define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val)
d4d77308
MF
1801#define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
1802#define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val)
d4d77308
MF
1803#define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
1804#define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val)
d4d77308 1805#define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val)
d4d77308
MF
1806#define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)
1807#define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val)
d4d77308
MF
1808#define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2)
1809#define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2, val)
d4d77308
MF
1810#define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV)
1811#define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV, val)
d4d77308
MF
1812#define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV)
1813#define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV, val)
d4d77308
MF
1814#define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX)
1815#define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val)
d4d77308
MF
1816#define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT)
1817#define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT, val)
d4d77308
MF
1818#define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1)
1819#define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1, val)
d4d77308
MF
1820#define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
1821#define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
d4d77308
MF
1822#define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL)
1823#define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL, val)
d4d77308
MF
1824#define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0)
1825#define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val)
d4d77308
MF
1826#define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1)
1827#define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
d4d77308
MF
1828#define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2)
1829#define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val)
d4d77308
MF
1830#define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3)
1831#define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val)
d4d77308
MF
1832#define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0)
1833#define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val)
d4d77308
MF
1834#define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1)
1835#define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val)
d4d77308
MF
1836#define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2)
1837#define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val)
d4d77308
MF
1838#define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3)
1839#define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val)
d4d77308
MF
1840#define bfin_read_SPORT1_TCR1() bfin_read16(SPORT1_TCR1)
1841#define bfin_write_SPORT1_TCR1(val) bfin_write16(SPORT1_TCR1, val)
d4d77308
MF
1842#define bfin_read_SPORT1_TCR2() bfin_read16(SPORT1_TCR2)
1843#define bfin_write_SPORT1_TCR2(val) bfin_write16(SPORT1_TCR2, val)
d4d77308
MF
1844#define bfin_read_SPORT1_TCLKDIV() bfin_read16(SPORT1_TCLKDIV)
1845#define bfin_write_SPORT1_TCLKDIV(val) bfin_write16(SPORT1_TCLKDIV, val)
d4d77308
MF
1846#define bfin_read_SPORT1_TFSDIV() bfin_read16(SPORT1_TFSDIV)
1847#define bfin_write_SPORT1_TFSDIV(val) bfin_write16(SPORT1_TFSDIV, val)
d4d77308 1848#define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX, val)
d4d77308
MF
1849#define bfin_read_SPORT1_RCR1() bfin_read16(SPORT1_RCR1)
1850#define bfin_write_SPORT1_RCR1(val) bfin_write16(SPORT1_RCR1, val)
d4d77308
MF
1851#define bfin_read_SPORT1_RCR2() bfin_read16(SPORT1_RCR2)
1852#define bfin_write_SPORT1_RCR2(val) bfin_write16(SPORT1_RCR2, val)
d4d77308
MF
1853#define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)
1854#define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV, val)
d4d77308
MF
1855#define bfin_read_SPORT1_RFSDIV() bfin_read16(SPORT1_RFSDIV)
1856#define bfin_write_SPORT1_RFSDIV(val) bfin_write16(SPORT1_RFSDIV, val)
d4d77308
MF
1857#define bfin_read_SPORT1_RX() bfin_read32(SPORT1_RX)
1858#define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX, val)
d4d77308
MF
1859#define bfin_read_SPORT1_STAT() bfin_read16(SPORT1_STAT)
1860#define bfin_write_SPORT1_STAT(val) bfin_write16(SPORT1_STAT, val)
d4d77308
MF
1861#define bfin_read_SPORT1_MCMC1() bfin_read16(SPORT1_MCMC1)
1862#define bfin_write_SPORT1_MCMC1(val) bfin_write16(SPORT1_MCMC1, val)
d4d77308
MF
1863#define bfin_read_SPORT1_MCMC2() bfin_read16(SPORT1_MCMC2)
1864#define bfin_write_SPORT1_MCMC2(val) bfin_write16(SPORT1_MCMC2, val)
d4d77308
MF
1865#define bfin_read_SPORT1_CHNL() bfin_read16(SPORT1_CHNL)
1866#define bfin_write_SPORT1_CHNL(val) bfin_write16(SPORT1_CHNL, val)
d4d77308
MF
1867#define bfin_read_SPORT1_MRCS0() bfin_read32(SPORT1_MRCS0)
1868#define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0, val)
d4d77308
MF
1869#define bfin_read_SPORT1_MRCS1() bfin_read32(SPORT1_MRCS1)
1870#define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1, val)
d4d77308
MF
1871#define bfin_read_SPORT1_MRCS2() bfin_read32(SPORT1_MRCS2)
1872#define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2, val)
d4d77308
MF
1873#define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
1874#define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
d4d77308
MF
1875#define bfin_read_SPORT1_MTCS0() bfin_read32(SPORT1_MTCS0)
1876#define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0, val)
d4d77308
MF
1877#define bfin_read_SPORT1_MTCS1() bfin_read32(SPORT1_MTCS1)
1878#define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1, val)
d4d77308
MF
1879#define bfin_read_SPORT1_MTCS2() bfin_read32(SPORT1_MTCS2)
1880#define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2, val)
d4d77308
MF
1881#define bfin_read_SPORT1_MTCS3() bfin_read32(SPORT1_MTCS3)
1882#define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3, val)
d4d77308
MF
1883#define bfin_read_SPORT2_TCR1() bfin_read16(SPORT2_TCR1)
1884#define bfin_write_SPORT2_TCR1(val) bfin_write16(SPORT2_TCR1, val)
d4d77308
MF
1885#define bfin_read_SPORT2_TCR2() bfin_read16(SPORT2_TCR2)
1886#define bfin_write_SPORT2_TCR2(val) bfin_write16(SPORT2_TCR2, val)
d4d77308
MF
1887#define bfin_read_SPORT2_TCLKDIV() bfin_read16(SPORT2_TCLKDIV)
1888#define bfin_write_SPORT2_TCLKDIV(val) bfin_write16(SPORT2_TCLKDIV, val)
d4d77308
MF
1889#define bfin_read_SPORT2_TFSDIV() bfin_read16(SPORT2_TFSDIV)
1890#define bfin_write_SPORT2_TFSDIV(val) bfin_write16(SPORT2_TFSDIV, val)
d4d77308 1891#define bfin_write_SPORT2_TX(val) bfin_write32(SPORT2_TX, val)
d4d77308
MF
1892#define bfin_read_SPORT2_RCR1() bfin_read16(SPORT2_RCR1)
1893#define bfin_write_SPORT2_RCR1(val) bfin_write16(SPORT2_RCR1, val)
d4d77308
MF
1894#define bfin_read_SPORT2_RCR2() bfin_read16(SPORT2_RCR2)
1895#define bfin_write_SPORT2_RCR2(val) bfin_write16(SPORT2_RCR2, val)
d4d77308
MF
1896#define bfin_read_SPORT2_RCLKDIV() bfin_read16(SPORT2_RCLKDIV)
1897#define bfin_write_SPORT2_RCLKDIV(val) bfin_write16(SPORT2_RCLKDIV, val)
d4d77308
MF
1898#define bfin_read_SPORT2_RFSDIV() bfin_read16(SPORT2_RFSDIV)
1899#define bfin_write_SPORT2_RFSDIV(val) bfin_write16(SPORT2_RFSDIV, val)
d4d77308
MF
1900#define bfin_read_SPORT2_RX() bfin_read32(SPORT2_RX)
1901#define bfin_write_SPORT2_RX(val) bfin_write32(SPORT2_RX, val)
d4d77308
MF
1902#define bfin_read_SPORT2_STAT() bfin_read16(SPORT2_STAT)
1903#define bfin_write_SPORT2_STAT(val) bfin_write16(SPORT2_STAT, val)
d4d77308
MF
1904#define bfin_read_SPORT2_MCMC1() bfin_read16(SPORT2_MCMC1)
1905#define bfin_write_SPORT2_MCMC1(val) bfin_write16(SPORT2_MCMC1, val)
d4d77308
MF
1906#define bfin_read_SPORT2_MCMC2() bfin_read16(SPORT2_MCMC2)
1907#define bfin_write_SPORT2_MCMC2(val) bfin_write16(SPORT2_MCMC2, val)
d4d77308
MF
1908#define bfin_read_SPORT2_CHNL() bfin_read16(SPORT2_CHNL)
1909#define bfin_write_SPORT2_CHNL(val) bfin_write16(SPORT2_CHNL, val)
d4d77308
MF
1910#define bfin_read_SPORT2_MRCS0() bfin_read32(SPORT2_MRCS0)
1911#define bfin_write_SPORT2_MRCS0(val) bfin_write32(SPORT2_MRCS0, val)
d4d77308
MF
1912#define bfin_read_SPORT2_MRCS1() bfin_read32(SPORT2_MRCS1)
1913#define bfin_write_SPORT2_MRCS1(val) bfin_write32(SPORT2_MRCS1, val)
d4d77308
MF
1914#define bfin_read_SPORT2_MRCS2() bfin_read32(SPORT2_MRCS2)
1915#define bfin_write_SPORT2_MRCS2(val) bfin_write32(SPORT2_MRCS2, val)
d4d77308
MF
1916#define bfin_read_SPORT2_MRCS3() bfin_read32(SPORT2_MRCS3)
1917#define bfin_write_SPORT2_MRCS3(val) bfin_write32(SPORT2_MRCS3, val)
d4d77308
MF
1918#define bfin_read_SPORT2_MTCS0() bfin_read32(SPORT2_MTCS0)
1919#define bfin_write_SPORT2_MTCS0(val) bfin_write32(SPORT2_MTCS0, val)
d4d77308
MF
1920#define bfin_read_SPORT2_MTCS1() bfin_read32(SPORT2_MTCS1)
1921#define bfin_write_SPORT2_MTCS1(val) bfin_write32(SPORT2_MTCS1, val)
d4d77308
MF
1922#define bfin_read_SPORT2_MTCS2() bfin_read32(SPORT2_MTCS2)
1923#define bfin_write_SPORT2_MTCS2(val) bfin_write32(SPORT2_MTCS2, val)
d4d77308
MF
1924#define bfin_read_SPORT2_MTCS3() bfin_read32(SPORT2_MTCS3)
1925#define bfin_write_SPORT2_MTCS3(val) bfin_write32(SPORT2_MTCS3, val)
d4d77308
MF
1926#define bfin_read_SPORT3_TCR1() bfin_read16(SPORT3_TCR1)
1927#define bfin_write_SPORT3_TCR1(val) bfin_write16(SPORT3_TCR1, val)
d4d77308
MF
1928#define bfin_read_SPORT3_TCR2() bfin_read16(SPORT3_TCR2)
1929#define bfin_write_SPORT3_TCR2(val) bfin_write16(SPORT3_TCR2, val)
d4d77308
MF
1930#define bfin_read_SPORT3_TCLKDIV() bfin_read16(SPORT3_TCLKDIV)
1931#define bfin_write_SPORT3_TCLKDIV(val) bfin_write16(SPORT3_TCLKDIV, val)
d4d77308
MF
1932#define bfin_read_SPORT3_TFSDIV() bfin_read16(SPORT3_TFSDIV)
1933#define bfin_write_SPORT3_TFSDIV(val) bfin_write16(SPORT3_TFSDIV, val)
d4d77308 1934#define bfin_write_SPORT3_TX(val) bfin_write32(SPORT3_TX, val)
d4d77308
MF
1935#define bfin_read_SPORT3_RCR1() bfin_read16(SPORT3_RCR1)
1936#define bfin_write_SPORT3_RCR1(val) bfin_write16(SPORT3_RCR1, val)
d4d77308
MF
1937#define bfin_read_SPORT3_RCR2() bfin_read16(SPORT3_RCR2)
1938#define bfin_write_SPORT3_RCR2(val) bfin_write16(SPORT3_RCR2, val)
d4d77308
MF
1939#define bfin_read_SPORT3_RCLKDIV() bfin_read16(SPORT3_RCLKDIV)
1940#define bfin_write_SPORT3_RCLKDIV(val) bfin_write16(SPORT3_RCLKDIV, val)
d4d77308
MF
1941#define bfin_read_SPORT3_RFSDIV() bfin_read16(SPORT3_RFSDIV)
1942#define bfin_write_SPORT3_RFSDIV(val) bfin_write16(SPORT3_RFSDIV, val)
d4d77308
MF
1943#define bfin_read_SPORT3_RX() bfin_read32(SPORT3_RX)
1944#define bfin_write_SPORT3_RX(val) bfin_write32(SPORT3_RX, val)
d4d77308
MF
1945#define bfin_read_SPORT3_STAT() bfin_read16(SPORT3_STAT)
1946#define bfin_write_SPORT3_STAT(val) bfin_write16(SPORT3_STAT, val)
d4d77308
MF
1947#define bfin_read_SPORT3_MCMC1() bfin_read16(SPORT3_MCMC1)
1948#define bfin_write_SPORT3_MCMC1(val) bfin_write16(SPORT3_MCMC1, val)
d4d77308
MF
1949#define bfin_read_SPORT3_MCMC2() bfin_read16(SPORT3_MCMC2)
1950#define bfin_write_SPORT3_MCMC2(val) bfin_write16(SPORT3_MCMC2, val)
d4d77308
MF
1951#define bfin_read_SPORT3_CHNL() bfin_read16(SPORT3_CHNL)
1952#define bfin_write_SPORT3_CHNL(val) bfin_write16(SPORT3_CHNL, val)
d4d77308
MF
1953#define bfin_read_SPORT3_MRCS0() bfin_read32(SPORT3_MRCS0)
1954#define bfin_write_SPORT3_MRCS0(val) bfin_write32(SPORT3_MRCS0, val)
d4d77308
MF
1955#define bfin_read_SPORT3_MRCS1() bfin_read32(SPORT3_MRCS1)
1956#define bfin_write_SPORT3_MRCS1(val) bfin_write32(SPORT3_MRCS1, val)
d4d77308
MF
1957#define bfin_read_SPORT3_MRCS2() bfin_read32(SPORT3_MRCS2)
1958#define bfin_write_SPORT3_MRCS2(val) bfin_write32(SPORT3_MRCS2, val)
d4d77308
MF
1959#define bfin_read_SPORT3_MRCS3() bfin_read32(SPORT3_MRCS3)
1960#define bfin_write_SPORT3_MRCS3(val) bfin_write32(SPORT3_MRCS3, val)
d4d77308
MF
1961#define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
1962#define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)
d4d77308
MF
1963#define bfin_read_SPORT3_MTCS1() bfin_read32(SPORT3_MTCS1)
1964#define bfin_write_SPORT3_MTCS1(val) bfin_write32(SPORT3_MTCS1, val)
d4d77308
MF
1965#define bfin_read_SPORT3_MTCS2() bfin_read32(SPORT3_MTCS2)
1966#define bfin_write_SPORT3_MTCS2(val) bfin_write32(SPORT3_MTCS2, val)
d4d77308
MF
1967#define bfin_read_SPORT3_MTCS3() bfin_read32(SPORT3_MTCS3)
1968#define bfin_write_SPORT3_MTCS3(val) bfin_write32(SPORT3_MTCS3, val)
d4d77308
MF
1969#define bfin_read_UART0_DLL() bfin_read16(UART0_DLL)
1970#define bfin_write_UART0_DLL(val) bfin_write16(UART0_DLL, val)
d4d77308
MF
1971#define bfin_read_UART0_DLH() bfin_read16(UART0_DLH)
1972#define bfin_write_UART0_DLH(val) bfin_write16(UART0_DLH, val)
d4d77308
MF
1973#define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
1974#define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
d4d77308
MF
1975#define bfin_read_UART0_LCR() bfin_read16(UART0_LCR)
1976#define bfin_write_UART0_LCR(val) bfin_write16(UART0_LCR, val)
d4d77308
MF
1977#define bfin_read_UART0_MCR() bfin_read16(UART0_MCR)
1978#define bfin_write_UART0_MCR(val) bfin_write16(UART0_MCR, val)
d4d77308
MF
1979#define bfin_read_UART0_LSR() bfin_read16(UART0_LSR)
1980#define bfin_write_UART0_LSR(val) bfin_write16(UART0_LSR, val)
d4d77308
MF
1981#define bfin_read_UART0_MSR() bfin_read16(UART0_MSR)
1982#define bfin_write_UART0_MSR(val) bfin_write16(UART0_MSR, val)
d4d77308
MF
1983#define bfin_read_UART0_SCR() bfin_read16(UART0_SCR)
1984#define bfin_write_UART0_SCR(val) bfin_write16(UART0_SCR, val)
d4d77308
MF
1985#define bfin_read_UART0_IER_SET() bfin_read16(UART0_IER_SET)
1986#define bfin_write_UART0_IER_SET(val) bfin_write16(UART0_IER_SET, val)
d4d77308
MF
1987#define bfin_read_UART0_IER_CLEAR() bfin_read16(UART0_IER_CLEAR)
1988#define bfin_write_UART0_IER_CLEAR(val) bfin_write16(UART0_IER_CLEAR, val)
d4d77308
MF
1989#define bfin_read_UART0_THR() bfin_read16(UART0_THR)
1990#define bfin_write_UART0_THR(val) bfin_write16(UART0_THR, val)
d4d77308
MF
1991#define bfin_read_UART0_RBR() bfin_read16(UART0_RBR)
1992#define bfin_write_UART0_RBR(val) bfin_write16(UART0_RBR, val)
d4d77308
MF
1993#define bfin_read_UART1_DLL() bfin_read16(UART1_DLL)
1994#define bfin_write_UART1_DLL(val) bfin_write16(UART1_DLL, val)
d4d77308
MF
1995#define bfin_read_UART1_DLH() bfin_read16(UART1_DLH)
1996#define bfin_write_UART1_DLH(val) bfin_write16(UART1_DLH, val)
d4d77308
MF
1997#define bfin_read_UART1_GCTL() bfin_read16(UART1_GCTL)
1998#define bfin_write_UART1_GCTL(val) bfin_write16(UART1_GCTL, val)
d4d77308
MF
1999#define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
2000#define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR, val)
d4d77308
MF
2001#define bfin_read_UART1_MCR() bfin_read16(UART1_MCR)
2002#define bfin_write_UART1_MCR(val) bfin_write16(UART1_MCR, val)
d4d77308
MF
2003#define bfin_read_UART1_LSR() bfin_read16(UART1_LSR)
2004#define bfin_write_UART1_LSR(val) bfin_write16(UART1_LSR, val)
d4d77308
MF
2005#define bfin_read_UART1_MSR() bfin_read16(UART1_MSR)
2006#define bfin_write_UART1_MSR(val) bfin_write16(UART1_MSR, val)
d4d77308
MF
2007#define bfin_read_UART1_SCR() bfin_read16(UART1_SCR)
2008#define bfin_write_UART1_SCR(val) bfin_write16(UART1_SCR, val)
d4d77308
MF
2009#define bfin_read_UART1_IER_SET() bfin_read16(UART1_IER_SET)
2010#define bfin_write_UART1_IER_SET(val) bfin_write16(UART1_IER_SET, val)
d4d77308
MF
2011#define bfin_read_UART1_IER_CLEAR() bfin_read16(UART1_IER_CLEAR)
2012#define bfin_write_UART1_IER_CLEAR(val) bfin_write16(UART1_IER_CLEAR, val)
d4d77308
MF
2013#define bfin_read_UART1_THR() bfin_read16(UART1_THR)
2014#define bfin_write_UART1_THR(val) bfin_write16(UART1_THR, val)
d4d77308
MF
2015#define bfin_read_UART1_RBR() bfin_read16(UART1_RBR)
2016#define bfin_write_UART1_RBR(val) bfin_write16(UART1_RBR, val)
d4d77308
MF
2017#define bfin_read_UART2_DLL() bfin_read16(UART2_DLL)
2018#define bfin_write_UART2_DLL(val) bfin_write16(UART2_DLL, val)
d4d77308
MF
2019#define bfin_read_UART2_DLH() bfin_read16(UART2_DLH)
2020#define bfin_write_UART2_DLH(val) bfin_write16(UART2_DLH, val)
d4d77308
MF
2021#define bfin_read_UART2_GCTL() bfin_read16(UART2_GCTL)
2022#define bfin_write_UART2_GCTL(val) bfin_write16(UART2_GCTL, val)
d4d77308
MF
2023#define bfin_read_UART2_LCR() bfin_read16(UART2_LCR)
2024#define bfin_write_UART2_LCR(val) bfin_write16(UART2_LCR, val)
d4d77308
MF
2025#define bfin_read_UART2_MCR() bfin_read16(UART2_MCR)
2026#define bfin_write_UART2_MCR(val) bfin_write16(UART2_MCR, val)
d4d77308
MF
2027#define bfin_read_UART2_LSR() bfin_read16(UART2_LSR)
2028#define bfin_write_UART2_LSR(val) bfin_write16(UART2_LSR, val)
d4d77308
MF
2029#define bfin_read_UART2_MSR() bfin_read16(UART2_MSR)
2030#define bfin_write_UART2_MSR(val) bfin_write16(UART2_MSR, val)
d4d77308
MF
2031#define bfin_read_UART2_SCR() bfin_read16(UART2_SCR)
2032#define bfin_write_UART2_SCR(val) bfin_write16(UART2_SCR, val)
d4d77308
MF
2033#define bfin_read_UART2_IER_SET() bfin_read16(UART2_IER_SET)
2034#define bfin_write_UART2_IER_SET(val) bfin_write16(UART2_IER_SET, val)
d4d77308
MF
2035#define bfin_read_UART2_IER_CLEAR() bfin_read16(UART2_IER_CLEAR)
2036#define bfin_write_UART2_IER_CLEAR(val) bfin_write16(UART2_IER_CLEAR, val)
d4d77308
MF
2037#define bfin_read_UART2_THR() bfin_read16(UART2_THR)
2038#define bfin_write_UART2_THR(val) bfin_write16(UART2_THR, val)
d4d77308
MF
2039#define bfin_read_UART2_RBR() bfin_read16(UART2_RBR)
2040#define bfin_write_UART2_RBR(val) bfin_write16(UART2_RBR, val)
d4d77308
MF
2041#define bfin_read_UART3_DLL() bfin_read16(UART3_DLL)
2042#define bfin_write_UART3_DLL(val) bfin_write16(UART3_DLL, val)
d4d77308
MF
2043#define bfin_read_UART3_DLH() bfin_read16(UART3_DLH)
2044#define bfin_write_UART3_DLH(val) bfin_write16(UART3_DLH, val)
d4d77308
MF
2045#define bfin_read_UART3_GCTL() bfin_read16(UART3_GCTL)
2046#define bfin_write_UART3_GCTL(val) bfin_write16(UART3_GCTL, val)
d4d77308
MF
2047#define bfin_read_UART3_LCR() bfin_read16(UART3_LCR)
2048#define bfin_write_UART3_LCR(val) bfin_write16(UART3_LCR, val)
d4d77308
MF
2049#define bfin_read_UART3_MCR() bfin_read16(UART3_MCR)
2050#define bfin_write_UART3_MCR(val) bfin_write16(UART3_MCR, val)
d4d77308
MF
2051#define bfin_read_UART3_LSR() bfin_read16(UART3_LSR)
2052#define bfin_write_UART3_LSR(val) bfin_write16(UART3_LSR, val)
d4d77308
MF
2053#define bfin_read_UART3_MSR() bfin_read16(UART3_MSR)
2054#define bfin_write_UART3_MSR(val) bfin_write16(UART3_MSR, val)
d4d77308
MF
2055#define bfin_read_UART3_SCR() bfin_read16(UART3_SCR)
2056#define bfin_write_UART3_SCR(val) bfin_write16(UART3_SCR, val)
d4d77308
MF
2057#define bfin_read_UART3_IER_SET() bfin_read16(UART3_IER_SET)
2058#define bfin_write_UART3_IER_SET(val) bfin_write16(UART3_IER_SET, val)
d4d77308
MF
2059#define bfin_read_UART3_IER_CLEAR() bfin_read16(UART3_IER_CLEAR)
2060#define bfin_write_UART3_IER_CLEAR(val) bfin_write16(UART3_IER_CLEAR, val)
d4d77308
MF
2061#define bfin_read_UART3_THR() bfin_read16(UART3_THR)
2062#define bfin_write_UART3_THR(val) bfin_write16(UART3_THR, val)
d4d77308
MF
2063#define bfin_read_UART3_RBR() bfin_read16(UART3_RBR)
2064#define bfin_write_UART3_RBR(val) bfin_write16(UART3_RBR, val)
d4d77308
MF
2065#define bfin_read_USB_FADDR() bfin_read16(USB_FADDR)
2066#define bfin_write_USB_FADDR(val) bfin_write16(USB_FADDR, val)
d4d77308
MF
2067#define bfin_read_USB_POWER() bfin_read16(USB_POWER)
2068#define bfin_write_USB_POWER(val) bfin_write16(USB_POWER, val)
d4d77308
MF
2069#define bfin_read_USB_INTRTX() bfin_read16(USB_INTRTX)
2070#define bfin_write_USB_INTRTX(val) bfin_write16(USB_INTRTX, val)
d4d77308
MF
2071#define bfin_read_USB_INTRRX() bfin_read16(USB_INTRRX)
2072#define bfin_write_USB_INTRRX(val) bfin_write16(USB_INTRRX, val)
d4d77308
MF
2073#define bfin_read_USB_INTRTXE() bfin_read16(USB_INTRTXE)
2074#define bfin_write_USB_INTRTXE(val) bfin_write16(USB_INTRTXE, val)
d4d77308
MF
2075#define bfin_read_USB_INTRRXE() bfin_read16(USB_INTRRXE)
2076#define bfin_write_USB_INTRRXE(val) bfin_write16(USB_INTRRXE, val)
d4d77308
MF
2077#define bfin_read_USB_INTRUSB() bfin_read16(USB_INTRUSB)
2078#define bfin_write_USB_INTRUSB(val) bfin_write16(USB_INTRUSB, val)
d4d77308
MF
2079#define bfin_read_USB_INTRUSBE() bfin_read16(USB_INTRUSBE)
2080#define bfin_write_USB_INTRUSBE(val) bfin_write16(USB_INTRUSBE, val)
d4d77308
MF
2081#define bfin_read_USB_FRAME() bfin_read16(USB_FRAME)
2082#define bfin_write_USB_FRAME(val) bfin_write16(USB_FRAME, val)
d4d77308
MF
2083#define bfin_read_USB_INDEX() bfin_read16(USB_INDEX)
2084#define bfin_write_USB_INDEX(val) bfin_write16(USB_INDEX, val)
d4d77308
MF
2085#define bfin_read_USB_TESTMODE() bfin_read16(USB_TESTMODE)
2086#define bfin_write_USB_TESTMODE(val) bfin_write16(USB_TESTMODE, val)
d4d77308
MF
2087#define bfin_read_USB_GLOBINTR() bfin_read16(USB_GLOBINTR)
2088#define bfin_write_USB_GLOBINTR(val) bfin_write16(USB_GLOBINTR, val)
d4d77308
MF
2089#define bfin_read_USB_GLOBAL_CTL() bfin_read16(USB_GLOBAL_CTL)
2090#define bfin_write_USB_GLOBAL_CTL(val) bfin_write16(USB_GLOBAL_CTL, val)
d4d77308
MF
2091#define bfin_read_USB_TX_MAX_PACKET() bfin_read16(USB_TX_MAX_PACKET)
2092#define bfin_write_USB_TX_MAX_PACKET(val) bfin_write16(USB_TX_MAX_PACKET, val)
d4d77308
MF
2093#define bfin_read_USB_CSR0() bfin_read16(USB_CSR0)
2094#define bfin_write_USB_CSR0(val) bfin_write16(USB_CSR0, val)
d4d77308
MF
2095#define bfin_read_USB_TXCSR() bfin_read16(USB_TXCSR)
2096#define bfin_write_USB_TXCSR(val) bfin_write16(USB_TXCSR, val)
d4d77308
MF
2097#define bfin_read_USB_RX_MAX_PACKET() bfin_read16(USB_RX_MAX_PACKET)
2098#define bfin_write_USB_RX_MAX_PACKET(val) bfin_write16(USB_RX_MAX_PACKET, val)
d4d77308
MF
2099#define bfin_read_USB_RXCSR() bfin_read16(USB_RXCSR)
2100#define bfin_write_USB_RXCSR(val) bfin_write16(USB_RXCSR, val)
d4d77308
MF
2101#define bfin_read_USB_COUNT0() bfin_read16(USB_COUNT0)
2102#define bfin_write_USB_COUNT0(val) bfin_write16(USB_COUNT0, val)
d4d77308
MF
2103#define bfin_read_USB_RXCOUNT() bfin_read16(USB_RXCOUNT)
2104#define bfin_write_USB_RXCOUNT(val) bfin_write16(USB_RXCOUNT, val)
d4d77308
MF
2105#define bfin_read_USB_TXTYPE() bfin_read16(USB_TXTYPE)
2106#define bfin_write_USB_TXTYPE(val) bfin_write16(USB_TXTYPE, val)
d4d77308
MF
2107#define bfin_read_USB_NAKLIMIT0() bfin_read16(USB_NAKLIMIT0)
2108#define bfin_write_USB_NAKLIMIT0(val) bfin_write16(USB_NAKLIMIT0, val)
d4d77308
MF
2109#define bfin_read_USB_TXINTERVAL() bfin_read16(USB_TXINTERVAL)
2110#define bfin_write_USB_TXINTERVAL(val) bfin_write16(USB_TXINTERVAL, val)
d4d77308
MF
2111#define bfin_read_USB_RXTYPE() bfin_read16(USB_RXTYPE)
2112#define bfin_write_USB_RXTYPE(val) bfin_write16(USB_RXTYPE, val)
d4d77308
MF
2113#define bfin_read_USB_RXINTERVAL() bfin_read16(USB_RXINTERVAL)
2114#define bfin_write_USB_RXINTERVAL(val) bfin_write16(USB_RXINTERVAL, val)
d4d77308
MF
2115#define bfin_read_USB_TXCOUNT() bfin_read16(USB_TXCOUNT)
2116#define bfin_write_USB_TXCOUNT(val) bfin_write16(USB_TXCOUNT, val)
d4d77308
MF
2117#define bfin_read_USB_EP0_FIFO() bfin_read16(USB_EP0_FIFO)
2118#define bfin_write_USB_EP0_FIFO(val) bfin_write16(USB_EP0_FIFO, val)
d4d77308
MF
2119#define bfin_read_USB_EP1_FIFO() bfin_read16(USB_EP1_FIFO)
2120#define bfin_write_USB_EP1_FIFO(val) bfin_write16(USB_EP1_FIFO, val)
d4d77308
MF
2121#define bfin_read_USB_EP2_FIFO() bfin_read16(USB_EP2_FIFO)
2122#define bfin_write_USB_EP2_FIFO(val) bfin_write16(USB_EP2_FIFO, val)
d4d77308
MF
2123#define bfin_read_USB_EP3_FIFO() bfin_read16(USB_EP3_FIFO)
2124#define bfin_write_USB_EP3_FIFO(val) bfin_write16(USB_EP3_FIFO, val)
d4d77308
MF
2125#define bfin_read_USB_EP4_FIFO() bfin_read16(USB_EP4_FIFO)
2126#define bfin_write_USB_EP4_FIFO(val) bfin_write16(USB_EP4_FIFO, val)
d4d77308
MF
2127#define bfin_read_USB_EP5_FIFO() bfin_read16(USB_EP5_FIFO)
2128#define bfin_write_USB_EP5_FIFO(val) bfin_write16(USB_EP5_FIFO, val)
d4d77308
MF
2129#define bfin_read_USB_EP6_FIFO() bfin_read16(USB_EP6_FIFO)
2130#define bfin_write_USB_EP6_FIFO(val) bfin_write16(USB_EP6_FIFO, val)
d4d77308
MF
2131#define bfin_read_USB_EP7_FIFO() bfin_read16(USB_EP7_FIFO)
2132#define bfin_write_USB_EP7_FIFO(val) bfin_write16(USB_EP7_FIFO, val)
d4d77308
MF
2133#define bfin_read_USB_OTG_DEV_CTL() bfin_read16(USB_OTG_DEV_CTL)
2134#define bfin_write_USB_OTG_DEV_CTL(val) bfin_write16(USB_OTG_DEV_CTL, val)
d4d77308
MF
2135#define bfin_read_USB_OTG_VBUS_IRQ() bfin_read16(USB_OTG_VBUS_IRQ)
2136#define bfin_write_USB_OTG_VBUS_IRQ(val) bfin_write16(USB_OTG_VBUS_IRQ, val)
d4d77308
MF
2137#define bfin_read_USB_OTG_VBUS_MASK() bfin_read16(USB_OTG_VBUS_MASK)
2138#define bfin_write_USB_OTG_VBUS_MASK(val) bfin_write16(USB_OTG_VBUS_MASK, val)
d4d77308
MF
2139#define bfin_read_USB_LINKINFO() bfin_read16(USB_LINKINFO)
2140#define bfin_write_USB_LINKINFO(val) bfin_write16(USB_LINKINFO, val)
d4d77308
MF
2141#define bfin_read_USB_VPLEN() bfin_read16(USB_VPLEN)
2142#define bfin_write_USB_VPLEN(val) bfin_write16(USB_VPLEN, val)
d4d77308
MF
2143#define bfin_read_USB_HS_EOF1() bfin_read16(USB_HS_EOF1)
2144#define bfin_write_USB_HS_EOF1(val) bfin_write16(USB_HS_EOF1, val)
d4d77308
MF
2145#define bfin_read_USB_FS_EOF1() bfin_read16(USB_FS_EOF1)
2146#define bfin_write_USB_FS_EOF1(val) bfin_write16(USB_FS_EOF1, val)
d4d77308
MF
2147#define bfin_read_USB_LS_EOF1() bfin_read16(USB_LS_EOF1)
2148#define bfin_write_USB_LS_EOF1(val) bfin_write16(USB_LS_EOF1, val)
d4d77308
MF
2149#define bfin_read_USB_APHY_CNTRL() bfin_read16(USB_APHY_CNTRL)
2150#define bfin_write_USB_APHY_CNTRL(val) bfin_write16(USB_APHY_CNTRL, val)
d4d77308
MF
2151#define bfin_read_USB_APHY_CALIB() bfin_read16(USB_APHY_CALIB)
2152#define bfin_write_USB_APHY_CALIB(val) bfin_write16(USB_APHY_CALIB, val)
d4d77308
MF
2153#define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2)
2154#define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val)
d4d77308
MF
2155#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST)
2156#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val)
d4d77308
MF
2157#define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL)
2158#define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val)
d4d77308
MF
2159#define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV)
2160#define bfin_write_USB_SRP_CLKDIV(val) bfin_write16(USB_SRP_CLKDIV, val)
d4d77308
MF
2161#define bfin_read_USB_EP_NI0_TXMAXP() bfin_read16(USB_EP_NI0_TXMAXP)
2162#define bfin_write_USB_EP_NI0_TXMAXP(val) bfin_write16(USB_EP_NI0_TXMAXP, val)
d4d77308
MF
2163#define bfin_read_USB_EP_NI0_TXCSR() bfin_read16(USB_EP_NI0_TXCSR)
2164#define bfin_write_USB_EP_NI0_TXCSR(val) bfin_write16(USB_EP_NI0_TXCSR, val)
d4d77308
MF
2165#define bfin_read_USB_EP_NI0_RXMAXP() bfin_read16(USB_EP_NI0_RXMAXP)
2166#define bfin_write_USB_EP_NI0_RXMAXP(val) bfin_write16(USB_EP_NI0_RXMAXP, val)
d4d77308
MF
2167#define bfin_read_USB_EP_NI0_RXCSR() bfin_read16(USB_EP_NI0_RXCSR)
2168#define bfin_write_USB_EP_NI0_RXCSR(val) bfin_write16(USB_EP_NI0_RXCSR, val)
d4d77308
MF
2169#define bfin_read_USB_EP_NI0_RXCOUNT() bfin_read16(USB_EP_NI0_RXCOUNT)
2170#define bfin_write_USB_EP_NI0_RXCOUNT(val) bfin_write16(USB_EP_NI0_RXCOUNT, val)
d4d77308
MF
2171#define bfin_read_USB_EP_NI0_TXTYPE() bfin_read16(USB_EP_NI0_TXTYPE)
2172#define bfin_write_USB_EP_NI0_TXTYPE(val) bfin_write16(USB_EP_NI0_TXTYPE, val)
d4d77308
MF
2173#define bfin_read_USB_EP_NI0_TXINTERVAL() bfin_read16(USB_EP_NI0_TXINTERVAL)
2174#define bfin_write_USB_EP_NI0_TXINTERVAL(val) bfin_write16(USB_EP_NI0_TXINTERVAL, val)
d4d77308
MF
2175#define bfin_read_USB_EP_NI0_RXTYPE() bfin_read16(USB_EP_NI0_RXTYPE)
2176#define bfin_write_USB_EP_NI0_RXTYPE(val) bfin_write16(USB_EP_NI0_RXTYPE, val)
d4d77308
MF
2177#define bfin_read_USB_EP_NI0_RXINTERVAL() bfin_read16(USB_EP_NI0_RXINTERVAL)
2178#define bfin_write_USB_EP_NI0_RXINTERVAL(val) bfin_write16(USB_EP_NI0_RXINTERVAL, val)
d4d77308
MF
2179#define bfin_read_USB_EP_NI0_TXCOUNT() bfin_read16(USB_EP_NI0_TXCOUNT)
2180#define bfin_write_USB_EP_NI0_TXCOUNT(val) bfin_write16(USB_EP_NI0_TXCOUNT, val)
d4d77308
MF
2181#define bfin_read_USB_EP_NI1_TXMAXP() bfin_read16(USB_EP_NI1_TXMAXP)
2182#define bfin_write_USB_EP_NI1_TXMAXP(val) bfin_write16(USB_EP_NI1_TXMAXP, val)
d4d77308
MF
2183#define bfin_read_USB_EP_NI1_TXCSR() bfin_read16(USB_EP_NI1_TXCSR)
2184#define bfin_write_USB_EP_NI1_TXCSR(val) bfin_write16(USB_EP_NI1_TXCSR, val)
d4d77308
MF
2185#define bfin_read_USB_EP_NI1_RXMAXP() bfin_read16(USB_EP_NI1_RXMAXP)
2186#define bfin_write_USB_EP_NI1_RXMAXP(val) bfin_write16(USB_EP_NI1_RXMAXP, val)
d4d77308
MF
2187#define bfin_read_USB_EP_NI1_RXCSR() bfin_read16(USB_EP_NI1_RXCSR)
2188#define bfin_write_USB_EP_NI1_RXCSR(val) bfin_write16(USB_EP_NI1_RXCSR, val)
d4d77308
MF
2189#define bfin_read_USB_EP_NI1_RXCOUNT() bfin_read16(USB_EP_NI1_RXCOUNT)
2190#define bfin_write_USB_EP_NI1_RXCOUNT(val) bfin_write16(USB_EP_NI1_RXCOUNT, val)
d4d77308
MF
2191#define bfin_read_USB_EP_NI1_TXTYPE() bfin_read16(USB_EP_NI1_TXTYPE)
2192#define bfin_write_USB_EP_NI1_TXTYPE(val) bfin_write16(USB_EP_NI1_TXTYPE, val)
d4d77308
MF
2193#define bfin_read_USB_EP_NI1_TXINTERVAL() bfin_read16(USB_EP_NI1_TXINTERVAL)
2194#define bfin_write_USB_EP_NI1_TXINTERVAL(val) bfin_write16(USB_EP_NI1_TXINTERVAL, val)
d4d77308
MF
2195#define bfin_read_USB_EP_NI1_RXTYPE() bfin_read16(USB_EP_NI1_RXTYPE)
2196#define bfin_write_USB_EP_NI1_RXTYPE(val) bfin_write16(USB_EP_NI1_RXTYPE, val)
d4d77308
MF
2197#define bfin_read_USB_EP_NI1_RXINTERVAL() bfin_read16(USB_EP_NI1_RXINTERVAL)
2198#define bfin_write_USB_EP_NI1_RXINTERVAL(val) bfin_write16(USB_EP_NI1_RXINTERVAL, val)
d4d77308
MF
2199#define bfin_read_USB_EP_NI1_TXCOUNT() bfin_read16(USB_EP_NI1_TXCOUNT)
2200#define bfin_write_USB_EP_NI1_TXCOUNT(val) bfin_write16(USB_EP_NI1_TXCOUNT, val)
d4d77308
MF
2201#define bfin_read_USB_EP_NI2_TXMAXP() bfin_read16(USB_EP_NI2_TXMAXP)
2202#define bfin_write_USB_EP_NI2_TXMAXP(val) bfin_write16(USB_EP_NI2_TXMAXP, val)
d4d77308
MF
2203#define bfin_read_USB_EP_NI2_TXCSR() bfin_read16(USB_EP_NI2_TXCSR)
2204#define bfin_write_USB_EP_NI2_TXCSR(val) bfin_write16(USB_EP_NI2_TXCSR, val)
d4d77308
MF
2205#define bfin_read_USB_EP_NI2_RXMAXP() bfin_read16(USB_EP_NI2_RXMAXP)
2206#define bfin_write_USB_EP_NI2_RXMAXP(val) bfin_write16(USB_EP_NI2_RXMAXP, val)
d4d77308
MF
2207#define bfin_read_USB_EP_NI2_RXCSR() bfin_read16(USB_EP_NI2_RXCSR)
2208#define bfin_write_USB_EP_NI2_RXCSR(val) bfin_write16(USB_EP_NI2_RXCSR, val)
d4d77308
MF
2209#define bfin_read_USB_EP_NI2_RXCOUNT() bfin_read16(USB_EP_NI2_RXCOUNT)
2210#define bfin_write_USB_EP_NI2_RXCOUNT(val) bfin_write16(USB_EP_NI2_RXCOUNT, val)
d4d77308
MF
2211#define bfin_read_USB_EP_NI2_TXTYPE() bfin_read16(USB_EP_NI2_TXTYPE)
2212#define bfin_write_USB_EP_NI2_TXTYPE(val) bfin_write16(USB_EP_NI2_TXTYPE, val)
d4d77308
MF
2213#define bfin_read_USB_EP_NI2_TXINTERVAL() bfin_read16(USB_EP_NI2_TXINTERVAL)
2214#define bfin_write_USB_EP_NI2_TXINTERVAL(val) bfin_write16(USB_EP_NI2_TXINTERVAL, val)
d4d77308
MF
2215#define bfin_read_USB_EP_NI2_RXTYPE() bfin_read16(USB_EP_NI2_RXTYPE)
2216#define bfin_write_USB_EP_NI2_RXTYPE(val) bfin_write16(USB_EP_NI2_RXTYPE, val)
d4d77308
MF
2217#define bfin_read_USB_EP_NI2_RXINTERVAL() bfin_read16(USB_EP_NI2_RXINTERVAL)
2218#define bfin_write_USB_EP_NI2_RXINTERVAL(val) bfin_write16(USB_EP_NI2_RXINTERVAL, val)
d4d77308
MF
2219#define bfin_read_USB_EP_NI2_TXCOUNT() bfin_read16(USB_EP_NI2_TXCOUNT)
2220#define bfin_write_USB_EP_NI2_TXCOUNT(val) bfin_write16(USB_EP_NI2_TXCOUNT, val)
d4d77308
MF
2221#define bfin_read_USB_EP_NI3_TXMAXP() bfin_read16(USB_EP_NI3_TXMAXP)
2222#define bfin_write_USB_EP_NI3_TXMAXP(val) bfin_write16(USB_EP_NI3_TXMAXP, val)
d4d77308
MF
2223#define bfin_read_USB_EP_NI3_TXCSR() bfin_read16(USB_EP_NI3_TXCSR)
2224#define bfin_write_USB_EP_NI3_TXCSR(val) bfin_write16(USB_EP_NI3_TXCSR, val)
d4d77308
MF
2225#define bfin_read_USB_EP_NI3_RXMAXP() bfin_read16(USB_EP_NI3_RXMAXP)
2226#define bfin_write_USB_EP_NI3_RXMAXP(val) bfin_write16(USB_EP_NI3_RXMAXP, val)
d4d77308
MF
2227#define bfin_read_USB_EP_NI3_RXCSR() bfin_read16(USB_EP_NI3_RXCSR)
2228#define bfin_write_USB_EP_NI3_RXCSR(val) bfin_write16(USB_EP_NI3_RXCSR, val)
d4d77308
MF
2229#define bfin_read_USB_EP_NI3_RXCOUNT() bfin_read16(USB_EP_NI3_RXCOUNT)
2230#define bfin_write_USB_EP_NI3_RXCOUNT(val) bfin_write16(USB_EP_NI3_RXCOUNT, val)
d4d77308
MF
2231#define bfin_read_USB_EP_NI3_TXTYPE() bfin_read16(USB_EP_NI3_TXTYPE)
2232#define bfin_write_USB_EP_NI3_TXTYPE(val) bfin_write16(USB_EP_NI3_TXTYPE, val)
d4d77308
MF
2233#define bfin_read_USB_EP_NI3_TXINTERVAL() bfin_read16(USB_EP_NI3_TXINTERVAL)
2234#define bfin_write_USB_EP_NI3_TXINTERVAL(val) bfin_write16(USB_EP_NI3_TXINTERVAL, val)
d4d77308
MF
2235#define bfin_read_USB_EP_NI3_RXTYPE() bfin_read16(USB_EP_NI3_RXTYPE)
2236#define bfin_write_USB_EP_NI3_RXTYPE(val) bfin_write16(USB_EP_NI3_RXTYPE, val)
d4d77308
MF
2237#define bfin_read_USB_EP_NI3_RXINTERVAL() bfin_read16(USB_EP_NI3_RXINTERVAL)
2238#define bfin_write_USB_EP_NI3_RXINTERVAL(val) bfin_write16(USB_EP_NI3_RXINTERVAL, val)
d4d77308
MF
2239#define bfin_read_USB_EP_NI3_TXCOUNT() bfin_read16(USB_EP_NI3_TXCOUNT)
2240#define bfin_write_USB_EP_NI3_TXCOUNT(val) bfin_write16(USB_EP_NI3_TXCOUNT, val)
d4d77308
MF
2241#define bfin_read_USB_EP_NI4_TXMAXP() bfin_read16(USB_EP_NI4_TXMAXP)
2242#define bfin_write_USB_EP_NI4_TXMAXP(val) bfin_write16(USB_EP_NI4_TXMAXP, val)
d4d77308
MF
2243#define bfin_read_USB_EP_NI4_TXCSR() bfin_read16(USB_EP_NI4_TXCSR)
2244#define bfin_write_USB_EP_NI4_TXCSR(val) bfin_write16(USB_EP_NI4_TXCSR, val)
d4d77308
MF
2245#define bfin_read_USB_EP_NI4_RXMAXP() bfin_read16(USB_EP_NI4_RXMAXP)
2246#define bfin_write_USB_EP_NI4_RXMAXP(val) bfin_write16(USB_EP_NI4_RXMAXP, val)
d4d77308
MF
2247#define bfin_read_USB_EP_NI4_RXCSR() bfin_read16(USB_EP_NI4_RXCSR)
2248#define bfin_write_USB_EP_NI4_RXCSR(val) bfin_write16(USB_EP_NI4_RXCSR, val)
d4d77308
MF
2249#define bfin_read_USB_EP_NI4_RXCOUNT() bfin_read16(USB_EP_NI4_RXCOUNT)
2250#define bfin_write_USB_EP_NI4_RXCOUNT(val) bfin_write16(USB_EP_NI4_RXCOUNT, val)
d4d77308
MF
2251#define bfin_read_USB_EP_NI4_TXTYPE() bfin_read16(USB_EP_NI4_TXTYPE)
2252#define bfin_write_USB_EP_NI4_TXTYPE(val) bfin_write16(USB_EP_NI4_TXTYPE, val)
d4d77308
MF
2253#define bfin_read_USB_EP_NI4_TXINTERVAL() bfin_read16(USB_EP_NI4_TXINTERVAL)
2254#define bfin_write_USB_EP_NI4_TXINTERVAL(val) bfin_write16(USB_EP_NI4_TXINTERVAL, val)
d4d77308
MF
2255#define bfin_read_USB_EP_NI4_RXTYPE() bfin_read16(USB_EP_NI4_RXTYPE)
2256#define bfin_write_USB_EP_NI4_RXTYPE(val) bfin_write16(USB_EP_NI4_RXTYPE, val)
d4d77308
MF
2257#define bfin_read_USB_EP_NI4_RXINTERVAL() bfin_read16(USB_EP_NI4_RXINTERVAL)
2258#define bfin_write_USB_EP_NI4_RXINTERVAL(val) bfin_write16(USB_EP_NI4_RXINTERVAL, val)
d4d77308
MF
2259#define bfin_read_USB_EP_NI4_TXCOUNT() bfin_read16(USB_EP_NI4_TXCOUNT)
2260#define bfin_write_USB_EP_NI4_TXCOUNT(val) bfin_write16(USB_EP_NI4_TXCOUNT, val)
d4d77308
MF
2261#define bfin_read_USB_EP_NI5_TXMAXP() bfin_read16(USB_EP_NI5_TXMAXP)
2262#define bfin_write_USB_EP_NI5_TXMAXP(val) bfin_write16(USB_EP_NI5_TXMAXP, val)
d4d77308
MF
2263#define bfin_read_USB_EP_NI5_TXCSR() bfin_read16(USB_EP_NI5_TXCSR)
2264#define bfin_write_USB_EP_NI5_TXCSR(val) bfin_write16(USB_EP_NI5_TXCSR, val)
d4d77308
MF
2265#define bfin_read_USB_EP_NI5_RXMAXP() bfin_read16(USB_EP_NI5_RXMAXP)
2266#define bfin_write_USB_EP_NI5_RXMAXP(val) bfin_write16(USB_EP_NI5_RXMAXP, val)
d4d77308
MF
2267#define bfin_read_USB_EP_NI5_RXCSR() bfin_read16(USB_EP_NI5_RXCSR)
2268#define bfin_write_USB_EP_NI5_RXCSR(val) bfin_write16(USB_EP_NI5_RXCSR, val)
d4d77308
MF
2269#define bfin_read_USB_EP_NI5_RXCOUNT() bfin_read16(USB_EP_NI5_RXCOUNT)
2270#define bfin_write_USB_EP_NI5_RXCOUNT(val) bfin_write16(USB_EP_NI5_RXCOUNT, val)
d4d77308
MF
2271#define bfin_read_USB_EP_NI5_TXTYPE() bfin_read16(USB_EP_NI5_TXTYPE)
2272#define bfin_write_USB_EP_NI5_TXTYPE(val) bfin_write16(USB_EP_NI5_TXTYPE, val)
d4d77308
MF
2273#define bfin_read_USB_EP_NI5_TXINTERVAL() bfin_read16(USB_EP_NI5_TXINTERVAL)
2274#define bfin_write_USB_EP_NI5_TXINTERVAL(val) bfin_write16(USB_EP_NI5_TXINTERVAL, val)
d4d77308
MF
2275#define bfin_read_USB_EP_NI5_RXTYPE() bfin_read16(USB_EP_NI5_RXTYPE)
2276#define bfin_write_USB_EP_NI5_RXTYPE(val) bfin_write16(USB_EP_NI5_RXTYPE, val)
d4d77308
MF
2277#define bfin_read_USB_EP_NI5_RXINTERVAL() bfin_read16(USB_EP_NI5_RXINTERVAL)
2278#define bfin_write_USB_EP_NI5_RXINTERVAL(val) bfin_write16(USB_EP_NI5_RXINTERVAL, val)
d4d77308
MF
2279#define bfin_read_USB_EP_NI5_TXCOUNT() bfin_read16(USB_EP_NI5_TXCOUNT)
2280#define bfin_write_USB_EP_NI5_TXCOUNT(val) bfin_write16(USB_EP_NI5_TXCOUNT, val)
d4d77308
MF
2281#define bfin_read_USB_EP_NI6_TXMAXP() bfin_read16(USB_EP_NI6_TXMAXP)
2282#define bfin_write_USB_EP_NI6_TXMAXP(val) bfin_write16(USB_EP_NI6_TXMAXP, val)
d4d77308
MF
2283#define bfin_read_USB_EP_NI6_TXCSR() bfin_read16(USB_EP_NI6_TXCSR)
2284#define bfin_write_USB_EP_NI6_TXCSR(val) bfin_write16(USB_EP_NI6_TXCSR, val)
d4d77308
MF
2285#define bfin_read_USB_EP_NI6_RXMAXP() bfin_read16(USB_EP_NI6_RXMAXP)
2286#define bfin_write_USB_EP_NI6_RXMAXP(val) bfin_write16(USB_EP_NI6_RXMAXP, val)
d4d77308
MF
2287#define bfin_read_USB_EP_NI6_RXCSR() bfin_read16(USB_EP_NI6_RXCSR)
2288#define bfin_write_USB_EP_NI6_RXCSR(val) bfin_write16(USB_EP_NI6_RXCSR, val)
d4d77308
MF
2289#define bfin_read_USB_EP_NI6_RXCOUNT() bfin_read16(USB_EP_NI6_RXCOUNT)
2290#define bfin_write_USB_EP_NI6_RXCOUNT(val) bfin_write16(USB_EP_NI6_RXCOUNT, val)
d4d77308
MF
2291#define bfin_read_USB_EP_NI6_TXTYPE() bfin_read16(USB_EP_NI6_TXTYPE)
2292#define bfin_write_USB_EP_NI6_TXTYPE(val) bfin_write16(USB_EP_NI6_TXTYPE, val)
d4d77308
MF
2293#define bfin_read_USB_EP_NI6_TXINTERVAL() bfin_read16(USB_EP_NI6_TXINTERVAL)
2294#define bfin_write_USB_EP_NI6_TXINTERVAL(val) bfin_write16(USB_EP_NI6_TXINTERVAL, val)
d4d77308
MF
2295#define bfin_read_USB_EP_NI6_RXTYPE() bfin_read16(USB_EP_NI6_RXTYPE)
2296#define bfin_write_USB_EP_NI6_RXTYPE(val) bfin_write16(USB_EP_NI6_RXTYPE, val)
d4d77308
MF
2297#define bfin_read_USB_EP_NI6_RXINTERVAL() bfin_read16(USB_EP_NI6_RXINTERVAL)
2298#define bfin_write_USB_EP_NI6_RXINTERVAL(val) bfin_write16(USB_EP_NI6_RXINTERVAL, val)
d4d77308
MF
2299#define bfin_read_USB_EP_NI6_TXCOUNT() bfin_read16(USB_EP_NI6_TXCOUNT)
2300#define bfin_write_USB_EP_NI6_TXCOUNT(val) bfin_write16(USB_EP_NI6_TXCOUNT, val)
d4d77308
MF
2301#define bfin_read_USB_EP_NI7_TXMAXP() bfin_read16(USB_EP_NI7_TXMAXP)
2302#define bfin_write_USB_EP_NI7_TXMAXP(val) bfin_write16(USB_EP_NI7_TXMAXP, val)
d4d77308
MF
2303#define bfin_read_USB_EP_NI7_TXCSR() bfin_read16(USB_EP_NI7_TXCSR)
2304#define bfin_write_USB_EP_NI7_TXCSR(val) bfin_write16(USB_EP_NI7_TXCSR, val)
d4d77308
MF
2305#define bfin_read_USB_EP_NI7_RXMAXP() bfin_read16(USB_EP_NI7_RXMAXP)
2306#define bfin_write_USB_EP_NI7_RXMAXP(val) bfin_write16(USB_EP_NI7_RXMAXP, val)
d4d77308
MF
2307#define bfin_read_USB_EP_NI7_RXCSR() bfin_read16(USB_EP_NI7_RXCSR)
2308#define bfin_write_USB_EP_NI7_RXCSR(val) bfin_write16(USB_EP_NI7_RXCSR, val)
d4d77308
MF
2309#define bfin_read_USB_EP_NI7_RXCOUNT() bfin_read16(USB_EP_NI7_RXCOUNT)
2310#define bfin_write_USB_EP_NI7_RXCOUNT(val) bfin_write16(USB_EP_NI7_RXCOUNT, val)
d4d77308
MF
2311#define bfin_read_USB_EP_NI7_TXTYPE() bfin_read16(USB_EP_NI7_TXTYPE)
2312#define bfin_write_USB_EP_NI7_TXTYPE(val) bfin_write16(USB_EP_NI7_TXTYPE, val)
d4d77308
MF
2313#define bfin_read_USB_EP_NI7_TXINTERVAL() bfin_read16(USB_EP_NI7_TXINTERVAL)
2314#define bfin_write_USB_EP_NI7_TXINTERVAL(val) bfin_write16(USB_EP_NI7_TXINTERVAL, val)
d4d77308
MF
2315#define bfin_read_USB_EP_NI7_RXTYPE() bfin_read16(USB_EP_NI7_RXTYPE)
2316#define bfin_write_USB_EP_NI7_RXTYPE(val) bfin_write16(USB_EP_NI7_RXTYPE, val)
d4d77308
MF
2317#define bfin_read_USB_EP_NI7_RXINTERVAL() bfin_read16(USB_EP_NI7_RXINTERVAL)
2318#define bfin_write_USB_EP_NI7_RXINTERVAL(val) bfin_write16(USB_EP_NI7_RXINTERVAL, val)
d4d77308
MF
2319#define bfin_read_USB_EP_NI7_TXCOUNT() bfin_read16(USB_EP_NI7_TXCOUNT)
2320#define bfin_write_USB_EP_NI7_TXCOUNT(val) bfin_write16(USB_EP_NI7_TXCOUNT, val)
d4d77308
MF
2321#define bfin_read_USB_DMA_INTERRUPT() bfin_read16(USB_DMA_INTERRUPT)
2322#define bfin_write_USB_DMA_INTERRUPT(val) bfin_write16(USB_DMA_INTERRUPT, val)
d4d77308
MF
2323#define bfin_read_USB_DMA0_CONTROL() bfin_read16(USB_DMA0_CONTROL)
2324#define bfin_write_USB_DMA0_CONTROL(val) bfin_write16(USB_DMA0_CONTROL, val)
d4d77308
MF
2325#define bfin_read_USB_DMA0_ADDRLOW() bfin_read16(USB_DMA0_ADDRLOW)
2326#define bfin_write_USB_DMA0_ADDRLOW(val) bfin_write16(USB_DMA0_ADDRLOW, val)
d4d77308
MF
2327#define bfin_read_USB_DMA0_ADDRHIGH() bfin_read16(USB_DMA0_ADDRHIGH)
2328#define bfin_write_USB_DMA0_ADDRHIGH(val) bfin_write16(USB_DMA0_ADDRHIGH, val)
d4d77308
MF
2329#define bfin_read_USB_DMA0_COUNTLOW() bfin_read16(USB_DMA0_COUNTLOW)
2330#define bfin_write_USB_DMA0_COUNTLOW(val) bfin_write16(USB_DMA0_COUNTLOW, val)
d4d77308
MF
2331#define bfin_read_USB_DMA0_COUNTHIGH() bfin_read16(USB_DMA0_COUNTHIGH)
2332#define bfin_write_USB_DMA0_COUNTHIGH(val) bfin_write16(USB_DMA0_COUNTHIGH, val)
d4d77308
MF
2333#define bfin_read_USB_DMA1_CONTROL() bfin_read16(USB_DMA1_CONTROL)
2334#define bfin_write_USB_DMA1_CONTROL(val) bfin_write16(USB_DMA1_CONTROL, val)
d4d77308
MF
2335#define bfin_read_USB_DMA1_ADDRLOW() bfin_read16(USB_DMA1_ADDRLOW)
2336#define bfin_write_USB_DMA1_ADDRLOW(val) bfin_write16(USB_DMA1_ADDRLOW, val)
d4d77308
MF
2337#define bfin_read_USB_DMA1_ADDRHIGH() bfin_read16(USB_DMA1_ADDRHIGH)
2338#define bfin_write_USB_DMA1_ADDRHIGH(val) bfin_write16(USB_DMA1_ADDRHIGH, val)
d4d77308
MF
2339#define bfin_read_USB_DMA1_COUNTLOW() bfin_read16(USB_DMA1_COUNTLOW)
2340#define bfin_write_USB_DMA1_COUNTLOW(val) bfin_write16(USB_DMA1_COUNTLOW, val)
d4d77308
MF
2341#define bfin_read_USB_DMA1_COUNTHIGH() bfin_read16(USB_DMA1_COUNTHIGH)
2342#define bfin_write_USB_DMA1_COUNTHIGH(val) bfin_write16(USB_DMA1_COUNTHIGH, val)
d4d77308
MF
2343#define bfin_read_USB_DMA2_CONTROL() bfin_read16(USB_DMA2_CONTROL)
2344#define bfin_write_USB_DMA2_CONTROL(val) bfin_write16(USB_DMA2_CONTROL, val)
d4d77308
MF
2345#define bfin_read_USB_DMA2_ADDRLOW() bfin_read16(USB_DMA2_ADDRLOW)
2346#define bfin_write_USB_DMA2_ADDRLOW(val) bfin_write16(USB_DMA2_ADDRLOW, val)
d4d77308
MF
2347#define bfin_read_USB_DMA2_ADDRHIGH() bfin_read16(USB_DMA2_ADDRHIGH)
2348#define bfin_write_USB_DMA2_ADDRHIGH(val) bfin_write16(USB_DMA2_ADDRHIGH, val)
d4d77308
MF
2349#define bfin_read_USB_DMA2_COUNTLOW() bfin_read16(USB_DMA2_COUNTLOW)
2350#define bfin_write_USB_DMA2_COUNTLOW(val) bfin_write16(USB_DMA2_COUNTLOW, val)
d4d77308
MF
2351#define bfin_read_USB_DMA2_COUNTHIGH() bfin_read16(USB_DMA2_COUNTHIGH)
2352#define bfin_write_USB_DMA2_COUNTHIGH(val) bfin_write16(USB_DMA2_COUNTHIGH, val)
d4d77308
MF
2353#define bfin_read_USB_DMA3_CONTROL() bfin_read16(USB_DMA3_CONTROL)
2354#define bfin_write_USB_DMA3_CONTROL(val) bfin_write16(USB_DMA3_CONTROL, val)
d4d77308
MF
2355#define bfin_read_USB_DMA3_ADDRLOW() bfin_read16(USB_DMA3_ADDRLOW)
2356#define bfin_write_USB_DMA3_ADDRLOW(val) bfin_write16(USB_DMA3_ADDRLOW, val)
d4d77308
MF
2357#define bfin_read_USB_DMA3_ADDRHIGH() bfin_read16(USB_DMA3_ADDRHIGH)
2358#define bfin_write_USB_DMA3_ADDRHIGH(val) bfin_write16(USB_DMA3_ADDRHIGH, val)
d4d77308
MF
2359#define bfin_read_USB_DMA3_COUNTLOW() bfin_read16(USB_DMA3_COUNTLOW)
2360#define bfin_write_USB_DMA3_COUNTLOW(val) bfin_write16(USB_DMA3_COUNTLOW, val)
d4d77308
MF
2361#define bfin_read_USB_DMA3_COUNTHIGH() bfin_read16(USB_DMA3_COUNTHIGH)
2362#define bfin_write_USB_DMA3_COUNTHIGH(val) bfin_write16(USB_DMA3_COUNTHIGH, val)
d4d77308
MF
2363#define bfin_read_USB_DMA4_CONTROL() bfin_read16(USB_DMA4_CONTROL)
2364#define bfin_write_USB_DMA4_CONTROL(val) bfin_write16(USB_DMA4_CONTROL, val)
d4d77308
MF
2365#define bfin_read_USB_DMA4_ADDRLOW() bfin_read16(USB_DMA4_ADDRLOW)
2366#define bfin_write_USB_DMA4_ADDRLOW(val) bfin_write16(USB_DMA4_ADDRLOW, val)
d4d77308
MF
2367#define bfin_read_USB_DMA4_ADDRHIGH() bfin_read16(USB_DMA4_ADDRHIGH)
2368#define bfin_write_USB_DMA4_ADDRHIGH(val) bfin_write16(USB_DMA4_ADDRHIGH, val)
d4d77308
MF
2369#define bfin_read_USB_DMA4_COUNTLOW() bfin_read16(USB_DMA4_COUNTLOW)
2370#define bfin_write_USB_DMA4_COUNTLOW(val) bfin_write16(USB_DMA4_COUNTLOW, val)
d4d77308
MF
2371#define bfin_read_USB_DMA4_COUNTHIGH() bfin_read16(USB_DMA4_COUNTHIGH)
2372#define bfin_write_USB_DMA4_COUNTHIGH(val) bfin_write16(USB_DMA4_COUNTHIGH, val)
d4d77308
MF
2373#define bfin_read_USB_DMA5_CONTROL() bfin_read16(USB_DMA5_CONTROL)
2374#define bfin_write_USB_DMA5_CONTROL(val) bfin_write16(USB_DMA5_CONTROL, val)
d4d77308
MF
2375#define bfin_read_USB_DMA5_ADDRLOW() bfin_read16(USB_DMA5_ADDRLOW)
2376#define bfin_write_USB_DMA5_ADDRLOW(val) bfin_write16(USB_DMA5_ADDRLOW, val)
d4d77308
MF
2377#define bfin_read_USB_DMA5_ADDRHIGH() bfin_read16(USB_DMA5_ADDRHIGH)
2378#define bfin_write_USB_DMA5_ADDRHIGH(val) bfin_write16(USB_DMA5_ADDRHIGH, val)
d4d77308
MF
2379#define bfin_read_USB_DMA5_COUNTLOW() bfin_read16(USB_DMA5_COUNTLOW)
2380#define bfin_write_USB_DMA5_COUNTLOW(val) bfin_write16(USB_DMA5_COUNTLOW, val)
d4d77308
MF
2381#define bfin_read_USB_DMA5_COUNTHIGH() bfin_read16(USB_DMA5_COUNTHIGH)
2382#define bfin_write_USB_DMA5_COUNTHIGH(val) bfin_write16(USB_DMA5_COUNTHIGH, val)
d4d77308
MF
2383#define bfin_read_USB_DMA6_CONTROL() bfin_read16(USB_DMA6_CONTROL)
2384#define bfin_write_USB_DMA6_CONTROL(val) bfin_write16(USB_DMA6_CONTROL, val)
d4d77308
MF
2385#define bfin_read_USB_DMA6_ADDRLOW() bfin_read16(USB_DMA6_ADDRLOW)
2386#define bfin_write_USB_DMA6_ADDRLOW(val) bfin_write16(USB_DMA6_ADDRLOW, val)
d4d77308
MF
2387#define bfin_read_USB_DMA6_ADDRHIGH() bfin_read16(USB_DMA6_ADDRHIGH)
2388#define bfin_write_USB_DMA6_ADDRHIGH(val) bfin_write16(USB_DMA6_ADDRHIGH, val)
d4d77308
MF
2389#define bfin_read_USB_DMA6_COUNTLOW() bfin_read16(USB_DMA6_COUNTLOW)
2390#define bfin_write_USB_DMA6_COUNTLOW(val) bfin_write16(USB_DMA6_COUNTLOW, val)
d4d77308
MF
2391#define bfin_read_USB_DMA6_COUNTHIGH() bfin_read16(USB_DMA6_COUNTHIGH)
2392#define bfin_write_USB_DMA6_COUNTHIGH(val) bfin_write16(USB_DMA6_COUNTHIGH, val)
d4d77308
MF
2393#define bfin_read_USB_DMA7_CONTROL() bfin_read16(USB_DMA7_CONTROL)
2394#define bfin_write_USB_DMA7_CONTROL(val) bfin_write16(USB_DMA7_CONTROL, val)
d4d77308
MF
2395#define bfin_read_USB_DMA7_ADDRLOW() bfin_read16(USB_DMA7_ADDRLOW)
2396#define bfin_write_USB_DMA7_ADDRLOW(val) bfin_write16(USB_DMA7_ADDRLOW, val)
d4d77308
MF
2397#define bfin_read_USB_DMA7_ADDRHIGH() bfin_read16(USB_DMA7_ADDRHIGH)
2398#define bfin_write_USB_DMA7_ADDRHIGH(val) bfin_write16(USB_DMA7_ADDRHIGH, val)
d4d77308
MF
2399#define bfin_read_USB_DMA7_COUNTLOW() bfin_read16(USB_DMA7_COUNTLOW)
2400#define bfin_write_USB_DMA7_COUNTLOW(val) bfin_write16(USB_DMA7_COUNTLOW, val)
d4d77308
MF
2401#define bfin_read_USB_DMA7_COUNTHIGH() bfin_read16(USB_DMA7_COUNTHIGH)
2402#define bfin_write_USB_DMA7_COUNTHIGH(val) bfin_write16(USB_DMA7_COUNTHIGH, val)
2403
2404#endif /* __BFIN_CDEF_ADSP_EDN_BF547_extended__ */