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dc6bc645 MF |
1 | /* |
2 | * Common Blackfin memory map | |
3 | * | |
4 | * Copyright 2004-2009 Analog Devices Inc. | |
5 | * Licensed under the GPL-2 or later. | |
6 | */ | |
7 | ||
8 | #ifndef __BFIN_MEM_MAP_H__ | |
9 | #define __BFIN_MEM_MAP_H__ | |
10 | ||
11 | /* Every Blackfin so far has MMRs like this */ | |
12 | #ifndef COREMMR_BASE | |
13 | # define COREMMR_BASE 0xFFE00000 | |
14 | #endif | |
15 | #ifndef SYSMMR_BASE | |
16 | # define SYSMMR_BASE 0xFFC00000 | |
17 | #endif | |
18 | ||
19 | /* Every Blackfin so far has on-chip Scratch Pad SRAM like this */ | |
20 | #ifndef L1_SRAM_SCRATCH | |
21 | # define L1_SRAM_SCRATCH 0xFFB00000 | |
22 | # define L1_SRAM_SCRATCH_SIZE 0x1000 | |
23 | # define L1_SRAM_SCRATCH_END (L1_SRAM_SCRATCH + L1_SRAM_SCRATCH_SIZE) | |
24 | #endif | |
25 | ||
26 | #endif |