[people/ms/u-boot.git] / arch / blackfin / include / asm / system.h

/*
 * U-boot - system.h
 *
 * Copyright (c) 2005-2007 Analog Devices Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _BLACKFIN_SYSTEM_H
#define _BLACKFIN_SYSTEM_H

/*
 * Interrupt configuring macros.
 */

extern int irq_flags;

#define local_irq_enable() \
	__asm__ __volatile__ ( \
		"sti %0;" \
		: \
		: "d" (irq_flags) \
	)

#define local_irq_disable() \
	do { \
		int __tmp_dummy; \
		__asm__ __volatile__ ( \
			"cli %0;" \
			: "=d" (__tmp_dummy) \
		); \
	} while (0)

# define local_irq_save(x) \
	__asm__ __volatile__ ( \
		"cli %0;" \
		: "=&d" (x) \
	)

#define local_save_flags(x) \
	__asm__ __volatile__ ( \
		"cli %0;" \
		"sti %0;" \
		: "=d" (x) \
	)

#define irqs_enabled_from_flags(x) ((x) != 0x1f)

#define local_irq_restore(x) \
	do { \
		if (irqs_enabled_from_flags(x)) \
			local_irq_enable(); \
	} while (0)

/*
 * Force strict CPU ordering.
 */
#define nop()			asm volatile ("nop;\n\t"::)
#define mb()			asm volatile (""   : : :"memory")
#define rmb()			asm volatile (""   : : :"memory")
#define wmb()			asm volatile (""   : : :"memory")
#define set_rmb(var, value)	do { xchg(&var, value); } while (0)
#define set_mb(var, value)	set_rmb(var, value)
#define set_wmb(var, value)	do { var = value; wmb(); } while (0)

#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))

struct __xchg_dummy {
	unsigned long a[100];
};
#define __xg(x) ((volatile struct __xchg_dummy *)(x))

static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
				   int size)
{
	unsigned long tmp = 0;
	unsigned long flags = 0;

	local_irq_save(flags);

	switch (size) {
	case 1:
		__asm__ __volatile__
			("%0 = b%2 (z);\n\t"
			 "b%2 = %1;\n\t"
			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
		break;
	case 2:
		__asm__ __volatile__
			("%0 = w%2 (z);\n\t"
			 "w%2 = %1;\n\t"
			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
		break;
	case 4:
		__asm__ __volatile__
			("%0 = %2;\n\t"
			 "%2 = %1;\n\t"
			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
		break;
	}
	local_irq_restore(flags);
	return tmp;
}

void bfin_reset_boot_spi_cs(unsigned short pin);

#endif	/* _BLACKFIN_SYSTEM_H */
Commit	Line	Data
6cb142fa WD	1	/*
	2	* U-boot - system.h
	3	*
155fd766	4	* Copyright (c) 2005-2007 Analog Devices Inc.
6cb142fa	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
6cb142fa WD	7	*/
	8
	9	#ifndef _BLACKFIN_SYSTEM_H
	10	#define _BLACKFIN_SYSTEM_H
	11
6cb142fa WD	12	/*
	13	* Interrupt configuring macros.
	14	*/
	15
	16	extern int irq_flags;
	17
d4d77308 MF	18	#define local_irq_enable() \
	19	__asm__ __volatile__ ( \
	20	"sti %0;" \
	21	: \
	22	: "d" (irq_flags) \
	23	)
	24
	25	#define local_irq_disable() \
	26	do { \
	27	int __tmp_dummy; \
	28	__asm__ __volatile__ ( \
	29	"cli %0;" \
	30	: "=d" (__tmp_dummy) \
	31	); \
	32	} while (0)
	33
	34	# define local_irq_save(x) \
	35	__asm__ __volatile__ ( \
	36	"cli %0;" \
	37	: "=&d" (x) \
	38	)
	39
	40	#define local_save_flags(x) \
	41	__asm__ __volatile__ ( \
	42	"cli %0;" \
	43	"sti %0;" \
	44	: "=d" (x) \
	45	)
	46
	47	#define irqs_enabled_from_flags(x) ((x) != 0x1f)
	48
	49	#define local_irq_restore(x) \
	50	do { \
	51	if (irqs_enabled_from_flags(x)) \
	52	local_irq_enable(); \
	53	} while (0)
6cb142fa WD	54
	55	/*
	56	* Force strict CPU ordering.
	57	*/
	58	#define nop() asm volatile ("nop;\n\t"::)
	59	#define mb() asm volatile ("" : : :"memory")
	60	#define rmb() asm volatile ("" : : :"memory")
	61	#define wmb() asm volatile ("" : : :"memory")
	62	#define set_rmb(var, value) do { xchg(&var, value); } while (0)
	63	#define set_mb(var, value) set_rmb(var, value)
	64	#define set_wmb(var, value) do { var = value; wmb(); } while (0)
	65
d4d77308	66	#define xchg(ptr,x) ((__typeof__((ptr)))__xchg((unsigned long)(x),(ptr),sizeof((ptr))))
6cb142fa WD	67
	68	struct __xchg_dummy {
	69	unsigned long a[100];
	70	};
d4d77308	71	#define __xg(x) ((volatile struct __xchg_dummy *)(x))
6cb142fa WD	72
	73	static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
	74	int size)
	75	{
d4d77308	76	unsigned long tmp = 0;
6cb142fa WD	77	unsigned long flags = 0;
6cb142fa WD	78
d4d77308	79	local_irq_save(flags);
6cb142fa WD	80
	81	switch (size) {
	82	case 1:
d4d77308 MF	83	__asm__ __volatile__
	84	("%0 = b%2 (z);\n\t"
	85	"b%2 = %1;\n\t"
	86	: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
6cb142fa WD	87	break;
6cb142fa WD	88	case 2:
d4d77308 MF	89	__asm__ __volatile__
	90	("%0 = w%2 (z);\n\t"
	91	"w%2 = %1;\n\t"
	92	: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
6cb142fa WD	93	break;
6cb142fa WD	94	case 4:
d4d77308 MF	95	__asm__ __volatile__
	96	("%0 = %2;\n\t"
	97	"%2 = %1;\n\t"
	98	: "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
6cb142fa WD	99	break;
6cb142fa WD	100	}
d4d77308	101	local_irq_restore(flags);
6cb142fa WD	102	return tmp;
	103	}
	104
4638b21f MF	105	void bfin_reset_boot_spi_cs(unsigned short pin);
4638b21f MF	106
6cb142fa	107	#endif /* _BLACKFIN_SYSTEM_H */