[people/ms/u-boot.git] / arch / m68k / include / asm / io.h

/*
 * IO header file
 *
 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef __ASM_M68K_IO_H__
#define __ASM_M68K_IO_H__

#include <asm/byteorder.h>

#ifndef _IO_BASE
#define _IO_BASE 0
#endif

#define __raw_readb(addr) (*(volatile u8 *)(addr))
#define __raw_readw(addr) (*(volatile u16 *)(addr))
#define __raw_readl(addr) (*(volatile u32 *)(addr))

#define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b))
#define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w))
#define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l))

#define readb(addr)		in_8((volatile u8 *)(addr))
#define writeb(b,addr)		out_8((volatile u8 *)(addr), (b))
#if !defined(__BIG_ENDIAN)
#define readw(addr)		(*(volatile u16 *) (addr))
#define readl(addr)		(*(volatile u32 *) (addr))
#define writew(b,addr)		((*(volatile u16 *) (addr)) = (b))
#define writel(b,addr)		((*(volatile u32 *) (addr)) = (b))
#else
#define readw(addr)		in_le16((volatile u16 *)(addr))
#define readl(addr)		in_le32((volatile u32 *)(addr))
#define writew(b,addr)		out_le16((volatile u16 *)(addr),(b))
#define writel(b,addr)		out_le32((volatile u32 *)(addr),(b))
#endif

/*
 * The insw/outsw/insl/outsl macros don't do byte-swapping.
 * They are only used in practice for transferring buffers which
 * are arrays of bytes, and byte-swapping is not appropriate in
 * that case.  - paulus
 */
#define insb(port, buf, ns)	_insb((u8 *)((port)+_IO_BASE), (buf), (ns))
#define outsb(port, buf, ns)	_outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
#define insw(port, buf, ns)	_insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
#define outsw(port, buf, ns)	_outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
#define insl(port, buf, nl)	_insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
#define outsl(port, buf, nl)	_outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))

#define inb(port)		in_8((u8 *)((port)+_IO_BASE))
#define outb(val, port)		out_8((u8 *)((port)+_IO_BASE), (val))
#if !defined(__BIG_ENDIAN)
#define inw(port)		in_be16((u16 *)((port)+_IO_BASE))
#define outw(val, port)		out_be16((u16 *)((port)+_IO_BASE), (val))
#define inl(port)		in_be32((u32 *)((port)+_IO_BASE))
#define outl(val, port)		out_be32((u32 *)((port)+_IO_BASE), (val))
#else
#define inw(port)		in_le16((u16 *)((port)+_IO_BASE))
#define outw(val, port)		out_le16((u16 *)((port)+_IO_BASE), (val))
#define inl(port)		in_le32((u32 *)((port)+_IO_BASE))
#define outl(val, port)		out_le32((u32 *)((port)+_IO_BASE), (val))
#endif

#define mb() __asm__ __volatile__ ("" : : : "memory")

extern inline void _insb(volatile u8 * port, void *buf, int ns)
{
	u8 *data = (u8 *) buf;
	while (ns--)
		*data++ = *port;
}

extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
{
	u8 *data = (u8 *) buf;
	while (ns--)
		*port = *data++;
}

extern inline void _insw(volatile u16 * port, void *buf, int ns)
{
	u16 *data = (u16 *) buf;
	while (ns--)
		*data++ = __sw16(*port);
}

extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
{
	u16 *data = (u16 *) buf;
	while (ns--) {
		*port = __sw16(*data);
		data++;
	}
}

extern inline void _insl(volatile u32 * port, void *buf, int nl)
{
	u32 *data = (u32 *) buf;
	while (nl--)
		*data++ = __sw32(*port);
}

extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
{
	u32 *data = (u32 *) buf;
	while (nl--) {
		*port = __sw32(*data);
		data++;
	}
}

extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
{
	u16 *data = (u16 *) buf;
	while (ns--)
		*data++ = *port;
}

extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
{
	u16 *data = (u16 *) buf;
	while (ns--) {
		*port = *data++;
	}
}

extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
{
	u32 *data = (u32 *) buf;
	while (nl--)
		*data++ = *port;
}

extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
{
	u32 *data = (u32 *) buf;
	while (nl--) {
		*port = *data;
		data++;
	}
}

/*
 * The *_ns versions below don't do byte-swapping.
 * Neither do the standard versions now, these are just here
 * for older code.
 */
#define insw_ns(port, buf, ns)	_insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
#define outsw_ns(port, buf, ns)	_outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
#define insl_ns(port, buf, nl)	_insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
#define outsl_ns(port, buf, nl)	_outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))

#define IO_SPACE_LIMIT ~0

/*
 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
 */
extern inline int in_8(volatile u8 * addr)
{
	return (int)*addr;
}

extern inline void out_8(volatile u8 * addr, int val)
{
	*addr = (u8) val;
}

extern inline int in_le16(volatile u16 * addr)
{
	return __sw16(*addr);
}

extern inline int in_be16(volatile u16 * addr)
{
	return (*addr & 0xFFFF);
}

extern inline void out_le16(volatile u16 * addr, int val)
{
	*addr = __sw16(val);
}

extern inline void out_be16(volatile u16 * addr, int val)
{
	*addr = (u16) val;
}

extern inline unsigned in_le32(volatile u32 * addr)
{
	return __sw32(*addr);
}

extern inline unsigned in_be32(volatile u32 * addr)
{
	return (*addr);
}

extern inline void out_le32(volatile unsigned *addr, int val)
{
	*addr = __sw32(val);
}

extern inline void out_be32(volatile unsigned *addr, int val)
{
	*addr = val;
}

/* Clear and set bits in one shot. These macros can be used to clear and
 * set multiple bits in a register using a single call. These macros can
 * also be used to set a multiple-bit bit pattern using a mask, by
 * specifying the mask in the 'clear' parameter and the new bit pattern
 * in the 'set' parameter.
 */

#define clrbits(type, addr, clear) \
	out_##type((addr), in_##type(addr) & ~(clear))

#define setbits(type, addr, set) \
	out_##type((addr), in_##type(addr) | (set))

#define clrsetbits(type, addr, clear, set) \
	out_##type((addr), (in_##type(addr) & ~(clear)) | (set))

#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
#define setbits_be32(addr, set) setbits(be32, addr, set)
#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)

#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
#define setbits_le32(addr, set) setbits(le32, addr, set)
#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)

#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
#define setbits_be16(addr, set) setbits(be16, addr, set)
#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)

#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
#define setbits_le16(addr, set) setbits(le16, addr, set)
#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)

#define clrbits_8(addr, clear) clrbits(8, addr, clear)
#define setbits_8(addr, set) setbits(8, addr, set)
#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)

static inline void sync(void)
{
	/* This sync function is for PowerPC or other architecture instruction
	 * ColdFire does not have this instruction. Dummy function, added for
	 * compatibility (CFI driver)
	 */
}

/*
 * Given a physical address and a length, return a virtual address
 * that can be used to access the memory range with the caching
 * properties specified by "flags".
 */
#define MAP_NOCACHE	(0)
#define MAP_WRCOMBINE	(0)
#define MAP_WRBACK	(0)
#define MAP_WRTHROUGH	(0)

static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
				unsigned long flags)
{
	return (void *)paddr;
}

/*
 * Take down a mapping set up by map_physmem().
 */
static inline void unmap_physmem(void *vaddr, unsigned long flags)
{

}

static inline phys_addr_t virt_to_phys(void * vaddr)
{
	return (phys_addr_t)(vaddr);
}

#endif				/* __ASM_M68K_IO_H__ */
Commit	Line	Data
8e585f02 TL	1	/*
	2	* IO header file
	3	*
33d44119	4	* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
8e585f02 TL	5	* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
8e585f02 TL	6	*
1a459660	7	* SPDX-License-Identifier: GPL-2.0+
8e585f02	8	*/
3a197b2f	9
8cd5cd6d	10	#ifndef __ASM_M68K_IO_H__
8e585f02 TL	11	#define __ASM_M68K_IO_H__
	12
	13	#include <asm/byteorder.h>
	14
88c811b1 TL	15	#ifndef _IO_BASE
	16	#define _IO_BASE 0
	17	#endif
	18
397b7b81 TL	19	#define __raw_readb(addr) ((volatile u8 )(addr))
	20	#define __raw_readw(addr) ((volatile u16 )(addr))
	21	#define __raw_readl(addr) ((volatile u32 )(addr))
812711ce	22
397b7b81 TL	23	#define __raw_writeb(b,addr) (((volatile u8 ) (addr)) = (b))
	24	#define __raw_writew(w,addr) (((volatile u16 ) (addr)) = (w))
	25	#define __raw_writel(l,addr) (((volatile u32 ) (addr)) = (l))
812711ce	26
ab77bc54 TL	27	#define readb(addr) in_8((volatile u8 *)(addr))
ab77bc54 TL	28	#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
8e585f02	29	#if !defined(__BIG_ENDIAN)
ab77bc54 TL	30	#define readw(addr) ((volatile u16 ) (addr))
	31	#define readl(addr) ((volatile u32 ) (addr))
	32	#define writew(b,addr) (((volatile u16 ) (addr)) = (b))
	33	#define writel(b,addr) (((volatile u32 ) (addr)) = (b))
8e585f02	34	#else
ab77bc54 TL	35	#define readw(addr) in_le16((volatile u16 *)(addr))
	36	#define readl(addr) in_le32((volatile u32 *)(addr))
	37	#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
	38	#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
8e585f02 TL	39	#endif
	40
	41	/*
	42	* The insw/outsw/insl/outsl macros don't do byte-swapping.
	43	* They are only used in practice for transferring buffers which
	44	* are arrays of bytes, and byte-swapping is not appropriate in
	45	* that case. - paulus
	46	*/
ab77bc54 TL	47	#define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
	48	#define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
	49	#define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
	50	#define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
	51	#define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
	52	#define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
	53
	54	#define inb(port) in_8((u8 *)((port)+_IO_BASE))
	55	#define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
8e585f02	56	#if !defined(__BIG_ENDIAN)
ab77bc54 TL	57	#define inw(port) in_be16((u16 *)((port)+_IO_BASE))
	58	#define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
	59	#define inl(port) in_be32((u32 *)((port)+_IO_BASE))
	60	#define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
8e585f02	61	#else
ab77bc54 TL	62	#define inw(port) in_le16((u16 *)((port)+_IO_BASE))
	63	#define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
	64	#define inl(port) in_le32((u32 *)((port)+_IO_BASE))
	65	#define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
8e585f02 TL	66	#endif
8e585f02 TL	67
6752da6b JJ	68	#define mb() __asm__ __volatile__ ("" : : : "memory")
6752da6b JJ	69
8e585f02 TL	70	extern inline void _insb(volatile u8 * port, void *buf, int ns)
	71	{
	72	u8 data = (u8 ) buf;
	73	while (ns--)
	74	data++ = port;
	75	}
	76
	77	extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
	78	{
	79	u8 data = (u8 ) buf;
	80	while (ns--)
	81	port = data++;
	82	}
	83
	84	extern inline void _insw(volatile u16 * port, void *buf, int ns)
	85	{
	86	u16 data = (u16 ) buf;
	87	while (ns--)
	88	data++ = __sw16(port);
	89	}
	90
	91	extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
	92	{
	93	u16 data = (u16 ) buf;
	94	while (ns--) {
	95	port = __sw16(data);
	96	data++;
	97	}
	98	}
	99
	100	extern inline void _insl(volatile u32 * port, void *buf, int nl)
	101	{
	102	u32 data = (u32 ) buf;
	103	while (nl--)
	104	data++ = __sw32(port);
	105	}
	106
	107	extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
	108	{
	109	u32 data = (u32 ) buf;
	110	while (nl--) {
	111	port = __sw32(data);
	112	data++;
	113	}
	114	}
	115
	116	extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
	117	{
	118	u16 data = (u16 ) buf;
	119	while (ns--)
	120	data++ = port;
	121	}
	122
	123	extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
	124	{
	125	u16 data = (u16 ) buf;
	126	while (ns--) {
	127	port = data++;
	128	}
	129	}
	130
	131	extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
	132	{
	133	u32 data = (u32 ) buf;
134	while (nl--)
135	data++ = port;
136	}
137
138	extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
139	{
140	u32 data = (u32 ) buf;
141	while (nl--) {
142	port = data;
143	data++;
144	}
145	}
146
147	/*
148	* The *_ns versions below don't do byte-swapping.
149	* Neither do the standard versions now, these are just here
150	* for older code.
151	*/
ab77bc54 TL	152	#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
	153	#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
	154	#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
	155	#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
8e585f02 TL	156
	157	#define IO_SPACE_LIMIT ~0
	158
	159	/*
	160	* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
	161	*/
	162	extern inline int in_8(volatile u8 * addr)
	163	{
	164	return (int)*addr;
	165	}
	166
	167	extern inline void out_8(volatile u8 * addr, int val)
	168	{
	169	*addr = (u8) val;
	170	}
	171
	172	extern inline int in_le16(volatile u16 * addr)
	173	{
	174	return __sw16(*addr);
	175	}
	176
	177	extern inline int in_be16(volatile u16 * addr)
	178	{
	179	return (*addr & 0xFFFF);
	180	}
	181
	182	extern inline void out_le16(volatile u16 * addr, int val)
	183	{
	184	*addr = __sw16(val);
	185	}
	186
	187	extern inline void out_be16(volatile u16 * addr, int val)
	188	{
	189	*addr = (u16) val;
	190	}
	191
	192	extern inline unsigned in_le32(volatile u32 * addr)
	193	{
	194	return __sw32(*addr);
	195	}
	196
	197	extern inline unsigned in_be32(volatile u32 * addr)
	198	{
	199	return (*addr);
	200	}
	201
	202	extern inline void out_le32(volatile unsigned *addr, int val)
	203	{
	204	*addr = __sw32(val);
	205	}
	206
	207	extern inline void out_be32(volatile unsigned *addr, int val)
3a197b2f	208	{
8e585f02	209	*addr = val;
3a197b2f HW	210	}
3a197b2f HW	211
33d44119 AW	212	/* Clear and set bits in one shot. These macros can be used to clear and
	213	* set multiple bits in a register using a single call. These macros can
	214	* also be used to set a multiple-bit bit pattern using a mask, by
	215	* specifying the mask in the 'clear' parameter and the new bit pattern
	216	* in the 'set' parameter.
	217	*/
	218
	219	#define clrbits(type, addr, clear) \
	220	out_##type((addr), in_##type(addr) & ~(clear))
	221
	222	#define setbits(type, addr, set) \
	223	out_##type((addr), in_##type(addr) \| (set))
	224
	225	#define clrsetbits(type, addr, clear, set) \
	226	out_##type((addr), (in_##type(addr) & ~(clear)) \| (set))
	227
	228	#define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
	229	#define setbits_be32(addr, set) setbits(be32, addr, set)
	230	#define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
	231
	232	#define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
	233	#define setbits_le32(addr, set) setbits(le32, addr, set)
	234	#define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
	235
	236	#define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
	237	#define setbits_be16(addr, set) setbits(be16, addr, set)
	238	#define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
	239
	240	#define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
	241	#define setbits_le16(addr, set) setbits(le16, addr, set)
	242	#define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
	243
	244	#define clrbits_8(addr, clear) clrbits(8, addr, clear)
	245	#define setbits_8(addr, set) setbits(8, addr, set)
	246	#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
	247
6fde84a4 TL	248	static inline void sync(void)
	249	{
	250	/* This sync function is for PowerPC or other architecture instruction
	251	* ColdFire does not have this instruction. Dummy function, added for
	252	* compatibility (CFI driver)
	253	*/
	254	}
4d7d6936 HS	255
	256	/*
	257	* Given a physical address and a length, return a virtual address
	258	* that can be used to access the memory range with the caching
	259	* properties specified by "flags".
	260	*/
4d7d6936 HS	261	#define MAP_NOCACHE (0)
	262	#define MAP_WRCOMBINE (0)
	263	#define MAP_WRBACK (0)
	264	#define MAP_WRTHROUGH (0)
	265
397b7b81 TL	266	static inline void *map_physmem(phys_addr_t paddr, unsigned long len,
397b7b81 TL	267	unsigned long flags)
4d7d6936 HS	268	{
	269	return (void *)paddr;
	270	}
	271
	272	/*
	273	* Take down a mapping set up by map_physmem().
	274	*/
	275	static inline void unmap_physmem(void *vaddr, unsigned long flags)
	276	{
	277
	278	}
	279
65e43a10 KG	280	static inline phys_addr_t virt_to_phys(void * vaddr)
	281	{
	282	return (phys_addr_t)(vaddr);
	283	}
	284
8e585f02	285	#endif /* __ASM_M68K_IO_H__ */