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8e585f02 TL |
1 | /* |
2 | * IO header file | |
3 | * | |
4 | * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. | |
5 | * TsiChung Liew (Tsi-Chung.Liew@freescale.com) | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
3a197b2f | 25 | |
8cd5cd6d | 26 | #ifndef __ASM_M68K_IO_H__ |
8e585f02 TL |
27 | #define __ASM_M68K_IO_H__ |
28 | ||
29 | #include <asm/byteorder.h> | |
30 | ||
88c811b1 TL |
31 | #ifndef _IO_BASE |
32 | #define _IO_BASE 0 | |
33 | #endif | |
34 | ||
397b7b81 TL |
35 | #define __raw_readb(addr) (*(volatile u8 *)(addr)) |
36 | #define __raw_readw(addr) (*(volatile u16 *)(addr)) | |
37 | #define __raw_readl(addr) (*(volatile u32 *)(addr)) | |
812711ce | 38 | |
397b7b81 TL |
39 | #define __raw_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b)) |
40 | #define __raw_writew(w,addr) ((*(volatile u16 *) (addr)) = (w)) | |
41 | #define __raw_writel(l,addr) ((*(volatile u32 *) (addr)) = (l)) | |
812711ce | 42 | |
ab77bc54 TL |
43 | #define readb(addr) in_8((volatile u8 *)(addr)) |
44 | #define writeb(b,addr) out_8((volatile u8 *)(addr), (b)) | |
8e585f02 | 45 | #if !defined(__BIG_ENDIAN) |
ab77bc54 TL |
46 | #define readw(addr) (*(volatile u16 *) (addr)) |
47 | #define readl(addr) (*(volatile u32 *) (addr)) | |
48 | #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b)) | |
49 | #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b)) | |
8e585f02 | 50 | #else |
ab77bc54 TL |
51 | #define readw(addr) in_le16((volatile u16 *)(addr)) |
52 | #define readl(addr) in_le32((volatile u32 *)(addr)) | |
53 | #define writew(b,addr) out_le16((volatile u16 *)(addr),(b)) | |
54 | #define writel(b,addr) out_le32((volatile u32 *)(addr),(b)) | |
8e585f02 TL |
55 | #endif |
56 | ||
57 | /* | |
58 | * The insw/outsw/insl/outsl macros don't do byte-swapping. | |
59 | * They are only used in practice for transferring buffers which | |
60 | * are arrays of bytes, and byte-swapping is not appropriate in | |
61 | * that case. - paulus | |
62 | */ | |
ab77bc54 TL |
63 | #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns)) |
64 | #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns)) | |
65 | #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) | |
66 | #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) | |
67 | #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
68 | #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
69 | ||
70 | #define inb(port) in_8((u8 *)((port)+_IO_BASE)) | |
71 | #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val)) | |
8e585f02 | 72 | #if !defined(__BIG_ENDIAN) |
ab77bc54 TL |
73 | #define inw(port) in_be16((u16 *)((port)+_IO_BASE)) |
74 | #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val)) | |
75 | #define inl(port) in_be32((u32 *)((port)+_IO_BASE)) | |
76 | #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val)) | |
8e585f02 | 77 | #else |
ab77bc54 TL |
78 | #define inw(port) in_le16((u16 *)((port)+_IO_BASE)) |
79 | #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val)) | |
80 | #define inl(port) in_le32((u32 *)((port)+_IO_BASE)) | |
81 | #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val)) | |
8e585f02 TL |
82 | #endif |
83 | ||
84 | extern inline void _insb(volatile u8 * port, void *buf, int ns) | |
85 | { | |
86 | u8 *data = (u8 *) buf; | |
87 | while (ns--) | |
88 | *data++ = *port; | |
89 | } | |
90 | ||
91 | extern inline void _outsb(volatile u8 * port, const void *buf, int ns) | |
92 | { | |
93 | u8 *data = (u8 *) buf; | |
94 | while (ns--) | |
95 | *port = *data++; | |
96 | } | |
97 | ||
98 | extern inline void _insw(volatile u16 * port, void *buf, int ns) | |
99 | { | |
100 | u16 *data = (u16 *) buf; | |
101 | while (ns--) | |
102 | *data++ = __sw16(*port); | |
103 | } | |
104 | ||
105 | extern inline void _outsw(volatile u16 * port, const void *buf, int ns) | |
106 | { | |
107 | u16 *data = (u16 *) buf; | |
108 | while (ns--) { | |
109 | *port = __sw16(*data); | |
110 | data++; | |
111 | } | |
112 | } | |
113 | ||
114 | extern inline void _insl(volatile u32 * port, void *buf, int nl) | |
115 | { | |
116 | u32 *data = (u32 *) buf; | |
117 | while (nl--) | |
118 | *data++ = __sw32(*port); | |
119 | } | |
120 | ||
121 | extern inline void _outsl(volatile u32 * port, const void *buf, int nl) | |
122 | { | |
123 | u32 *data = (u32 *) buf; | |
124 | while (nl--) { | |
125 | *port = __sw32(*data); | |
126 | data++; | |
127 | } | |
128 | } | |
129 | ||
130 | extern inline void _insw_ns(volatile u16 * port, void *buf, int ns) | |
131 | { | |
132 | u16 *data = (u16 *) buf; | |
133 | while (ns--) | |
134 | *data++ = *port; | |
135 | } | |
136 | ||
137 | extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns) | |
138 | { | |
139 | u16 *data = (u16 *) buf; | |
140 | while (ns--) { | |
141 | *port = *data++; | |
142 | } | |
143 | } | |
144 | ||
145 | extern inline void _insl_ns(volatile u32 * port, void *buf, int nl) | |
146 | { | |
147 | u32 *data = (u32 *) buf; | |
148 | while (nl--) | |
149 | *data++ = *port; | |
150 | } | |
151 | ||
152 | extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl) | |
153 | { | |
154 | u32 *data = (u32 *) buf; | |
155 | while (nl--) { | |
156 | *port = *data; | |
157 | data++; | |
158 | } | |
159 | } | |
160 | ||
161 | /* | |
162 | * The *_ns versions below don't do byte-swapping. | |
163 | * Neither do the standard versions now, these are just here | |
164 | * for older code. | |
165 | */ | |
ab77bc54 TL |
166 | #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) |
167 | #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns)) | |
168 | #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
169 | #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl)) | |
8e585f02 TL |
170 | |
171 | #define IO_SPACE_LIMIT ~0 | |
172 | ||
173 | /* | |
174 | * 8, 16 and 32 bit, big and little endian I/O operations, with barrier. | |
175 | */ | |
176 | extern inline int in_8(volatile u8 * addr) | |
177 | { | |
178 | return (int)*addr; | |
179 | } | |
180 | ||
181 | extern inline void out_8(volatile u8 * addr, int val) | |
182 | { | |
183 | *addr = (u8) val; | |
184 | } | |
185 | ||
186 | extern inline int in_le16(volatile u16 * addr) | |
187 | { | |
188 | return __sw16(*addr); | |
189 | } | |
190 | ||
191 | extern inline int in_be16(volatile u16 * addr) | |
192 | { | |
193 | return (*addr & 0xFFFF); | |
194 | } | |
195 | ||
196 | extern inline void out_le16(volatile u16 * addr, int val) | |
197 | { | |
198 | *addr = __sw16(val); | |
199 | } | |
200 | ||
201 | extern inline void out_be16(volatile u16 * addr, int val) | |
202 | { | |
203 | *addr = (u16) val; | |
204 | } | |
205 | ||
206 | extern inline unsigned in_le32(volatile u32 * addr) | |
207 | { | |
208 | return __sw32(*addr); | |
209 | } | |
210 | ||
211 | extern inline unsigned in_be32(volatile u32 * addr) | |
212 | { | |
213 | return (*addr); | |
214 | } | |
215 | ||
216 | extern inline void out_le32(volatile unsigned *addr, int val) | |
217 | { | |
218 | *addr = __sw32(val); | |
219 | } | |
220 | ||
221 | extern inline void out_be32(volatile unsigned *addr, int val) | |
3a197b2f | 222 | { |
8e585f02 | 223 | *addr = val; |
3a197b2f HW |
224 | } |
225 | ||
6fde84a4 TL |
226 | static inline void sync(void) |
227 | { | |
228 | /* This sync function is for PowerPC or other architecture instruction | |
229 | * ColdFire does not have this instruction. Dummy function, added for | |
230 | * compatibility (CFI driver) | |
231 | */ | |
232 | } | |
4d7d6936 HS |
233 | |
234 | /* | |
235 | * Given a physical address and a length, return a virtual address | |
236 | * that can be used to access the memory range with the caching | |
237 | * properties specified by "flags". | |
238 | */ | |
4d7d6936 HS |
239 | #define MAP_NOCACHE (0) |
240 | #define MAP_WRCOMBINE (0) | |
241 | #define MAP_WRBACK (0) | |
242 | #define MAP_WRTHROUGH (0) | |
243 | ||
397b7b81 TL |
244 | static inline void *map_physmem(phys_addr_t paddr, unsigned long len, |
245 | unsigned long flags) | |
4d7d6936 HS |
246 | { |
247 | return (void *)paddr; | |
248 | } | |
249 | ||
250 | /* | |
251 | * Take down a mapping set up by map_physmem(). | |
252 | */ | |
253 | static inline void unmap_physmem(void *vaddr, unsigned long flags) | |
254 | { | |
255 | ||
256 | } | |
257 | ||
65e43a10 KG |
258 | static inline phys_addr_t virt_to_phys(void * vaddr) |
259 | { | |
260 | return (phys_addr_t)(vaddr); | |
261 | } | |
262 | ||
8e585f02 | 263 | #endif /* __ASM_M68K_IO_H__ */ |