]> git.ipfire.org Git - people/ms/u-boot.git/blame - arch/mips/cpu/mips32/incaip/incaip_clock.c
Add GPL-2.0+ SPDX-License-Identifier to source files
[people/ms/u-boot.git] / arch / mips / cpu / mips32 / incaip / incaip_clock.c
CommitLineData
c021880a
WD
1/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
1a459660 5 * SPDX-License-Identifier: GPL-2.0+
c021880a
WD
6 */
7
8#include <common.h>
9#include <asm/inca-ip.h>
10
11
c021880a
WD
12/*******************************************************************************
13*
8bde7f77 14* get_cpuclk - returns the frequency of the CPU.
c021880a
WD
15*
16* Gets the value directly from the INCA-IP hardware.
17*
8bde7f77 18* RETURNS:
c021880a 19* 150.000.000 for 150 MHz
8ed44d91
WD
20* 133.333.333 for 133 MHz (= 400MHz/3)
21* 100.000.000 for 100 MHz (= 400MHz/4)
c021880a
WD
22* NOTE:
23* This functions should be used by the hardware driver to get the correct
24* frequency of the CPU. Don't use the macros, which are set to init the CPU
25* frequency in the ROM code.
26*/
a2f34be7 27uint incaip_get_cpuclk (void)
c021880a 28{
a2f34be7
WD
29 /*-------------------------------------------------------------------------*/
30 /* CPU Clock Input Multiplexer (MUX I) */
31 /* Multiplexer MUX I selects the maximum input clock to the CPU. */
32 /*-------------------------------------------------------------------------*/
33 if (*((volatile ulong *) INCA_IP_CGU_CGU_MUXCR) &
34 INCA_IP_CGU_CGU_MUXCR_MUXI) {
35 /* MUX I set to 150 MHz clock */
36 return 150000000;
37 } else {
38 /* MUX I set to 100/133 MHz clock */
39 if (*((volatile ulong *) INCA_IP_CGU_CGU_DIVCR) & 0x40) {
40 /* Division value is 1/3, maximum CPU operating */
41 /* frequency is 133.3 MHz */
ef978730 42 return 133333333;
a2f34be7
WD
43 } else {
44 /* Division value is 1/4, maximum CPU operating */
45 /* frequency is 100 MHz */
46 return 100000000;
47 }
48 }
c021880a
WD
49}
50
51/*******************************************************************************
52*
8bde7f77 53* get_fpiclk - returns the frequency of the FPI bus.
c021880a
WD
54*
55* Gets the value directly from the INCA-IP hardware.
56*
57* RETURNS: Frquency in Hz
58*
59* NOTE:
60* This functions should be used by the hardware driver to get the correct
61* frequency of the CPU. Don't use the macros, which are set to init the CPU
62* frequency in the ROM code.
8bde7f77 63* The calculation for the
c021880a 64*/
a2f34be7 65uint incaip_get_fpiclk (void)
c021880a 66{
a2f34be7 67 uint clkCPU;
8bde7f77 68
a2f34be7 69 clkCPU = incaip_get_cpuclk ();
8bde7f77 70
a2f34be7
WD
71 switch (*((volatile ulong *) INCA_IP_CGU_CGU_DIVCR) & 0xC) {
72 case 0x4:
73 return clkCPU >> 1; /* devided by 2 */
74 break;
75 case 0x8:
76 return clkCPU >> 2; /* devided by 4 */
77 break;
78 default:
79 return clkCPU;
80 break;
81 }
c021880a 82}
7cb22f97 83
a2f34be7 84int incaip_set_cpuclk (void)
7cb22f97 85{
a2f34be7
WD
86 extern void ebu_init(long);
87 extern void cgu_init(long);
68766094 88 extern void sdram_init(long);
f013dacf 89 char tmp[64];
7cb22f97
WD
90 ulong cpuclk;
91
cdb74977 92 if (getenv_f("cpuclk", tmp, sizeof (tmp)) > 0) {
a2f34be7 93 cpuclk = simple_strtoul (tmp, NULL, 10) * 1000000;
a2f34be7 94 cgu_init (cpuclk);
68766094
WD
95 ebu_init (cpuclk);
96 sdram_init (cpuclk);
7cb22f97
WD
97 }
98
99 return 0;
100}