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1/*
2 * (C) Copyright 2011
3 * Julius Baxter, julius@opencores.org
4 *
5 * (C) Copyright 2003, Psyent Corporation <www.psyent.com>
6 * Scott McNutt <smcnutt@psyent.com>
7 *
8 * (C) Copyright 2000-2002
9 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
10 *
11 *
1a459660 12 * SPDX-License-Identifier: GPL-2.0+
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13 */
14
15#include <common.h>
16#include <stdio_dev.h>
17#include <watchdog.h>
18#include <malloc.h>
19#include <mmc.h>
20#include <net.h>
21#ifdef CONFIG_STATUS_LED
22#include <status_led.h>
23#endif
24#ifdef CONFIG_CMD_NAND
25#include <nand.h> /* cannot even include nand.h if it isnt configured */
26#endif
27
28#include <timestamp.h>
29#include <version.h>
30
31DECLARE_GLOBAL_DATA_PTR;
32
33/*
34 * All attempts to come up with a "common" initialization sequence
35 * that works for all boards and architectures failed: some of the
36 * requirements are just _too_ different. To get rid of the resulting
37 * mess of board dependend #ifdef'ed code we now make the whole
38 * initialization sequence configurable to the user.
39 *
40 * The requirements for any new initalization function is simple: it
41 * receives a pointer to the "global data" structure as it's only
42 * argument, and returns an integer return code, where 0 means
43 * "continue" and != 0 means "fatal error, hang the system".
44 */
45
46extern int cache_init(void);
47
48/*
49 * Initialization sequence
50 */
51static int (* const init_sequence[])(void) = {
52 cache_init,
53 timer_init, /* initialize timer */
54 env_init,
55 serial_init,
56 console_init_f,
57 display_options,
58 checkcpu,
59 checkboard,
60};
61
62
63/***********************************************************************/
64void board_init(void)
65{
66 bd_t *bd;
67 int i;
68
69 gd = (gd_t *)CONFIG_SYS_GBL_DATA_ADDR;
70
71 memset((void *)gd, 0, GENERATED_GBL_DATA_SIZE);
72
73 gd->bd = (bd_t *)(gd+1); /* At end of global data */
74 gd->baudrate = CONFIG_BAUDRATE;
75 gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
76
77 bd = gd->bd;
78 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
79 bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
80#ifndef CONFIG_SYS_NO_FLASH
81 bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
82#endif
83#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
84 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;
85 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
86#endif
87 bd->bi_baudrate = CONFIG_BAUDRATE;
88
89 for (i = 0; i < ARRAY_SIZE(init_sequence); i++) {
90 WATCHDOG_RESET();
91 if (init_sequence[i]())
92 hang();
93 }
94
95 WATCHDOG_RESET();
96
97 /* The Malloc area is immediately below the monitor copy in RAM */
98 mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
99
100#ifndef CONFIG_SYS_NO_FLASH
101 WATCHDOG_RESET();
102 bd->bi_flashsize = flash_init();
103#endif
104
105#ifdef CONFIG_CMD_NAND
106 puts("NAND: ");
107 nand_init();
108#endif
109
110#ifdef CONFIG_GENERIC_MMC
111 puts("MMC: ");
112 mmc_initialize(bd);
113#endif
114
115 WATCHDOG_RESET();
116 env_relocate();
117
118 WATCHDOG_RESET();
119 stdio_init();
120 jumptable_init();
121 console_init_r();
122
123 WATCHDOG_RESET();
124 interrupt_init();
125
126#if defined(CONFIG_BOARD_LATE_INIT)
127 board_late_init();
128#endif
129
130#if defined(CONFIG_CMD_NET)
131 puts("NET: ");
132 eth_initialize(bd);
133#endif
134
135 /* main_loop */
136 for (;;) {
137 WATCHDOG_RESET();
138 main_loop();
139 }
140}