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mpc512x: add ifm ac14xx board
[people/ms/u-boot.git] / arch / powerpc / cpu / mpc512x / iopin.c
CommitLineData
6689484c
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1/*
2 * (C) Copyright 2008
3 * Martha J Marx, Silicon Turnkey Express, mmarx@silicontkx.com
4 * mpc512x I/O pin/pad initialization for the ADS5121 board
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <linux/types.h>
843efb11 26#include <asm/io.h>
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27
28void iopin_initialize(iopin_t *ioregs_init, int len)
29{
c9c101c6 30 short i, j, p;
19dc7e17 31 u32 *reg;
6d0f6bcf 32 immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
6689484c 33
19dc7e17 34 reg = (u32 *)&(im->io_ctrl);
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35
36 if (sizeof(ioregs_init) == 0)
37 return;
38
39 for (i = 0; i < len; i++) {
40 for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long);
41 p < ioregs_init[i].nr_pins; p++, j++) {
42 if (ioregs_init[i].bit_or)
843efb11 43 setbits_be32(reg + j, ioregs_init[i].val);
6689484c 44 else
843efb11 45 out_be32 (reg + j, ioregs_init[i].val);
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46 }
47 }
48 return;
49}
fcc7fe42
AG
50
51void iopin_initialize_bits(iopin_t *ioregs_init, int len)
52{
53 short i, j, p;
54 u32 *reg, mask;
55 immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
56
57 reg = (u32 *)&(im->io_ctrl);
58
59 /* iterate over table entries */
60 for (i = 0; i < len; i++) {
61 /* iterate over pins within a table entry */
62 for (p = 0, j = ioregs_init[i].p_offset / sizeof(u_long);
63 p < ioregs_init[i].nr_pins; p++, j++) {
64 if (ioregs_init[i].bit_or & IO_PIN_OVER_EACH) {
65 /* replace all settings at once */
66 out_be32(reg + j, ioregs_init[i].val);
67 } else {
68 /*
69 * only replace individual parts, but
70 * REPLACE them instead of just ORing
71 * them in and "inheriting" previously
72 * set bits which we don't want
73 */
74 mask = 0;
75 if (ioregs_init[i].bit_or & IO_PIN_OVER_FMUX)
76 mask |= IO_PIN_FMUX(3);
77
78 if (ioregs_init[i].bit_or & IO_PIN_OVER_HOLD)
79 mask |= IO_PIN_HOLD(3);
80
81 if (ioregs_init[i].bit_or & IO_PIN_OVER_PULL)
82 mask |= IO_PIN_PUD(1) | IO_PIN_PUE(1);
83
84 if (ioregs_init[i].bit_or & IO_PIN_OVER_STRIG)
85 mask |= IO_PIN_ST(1);
86
87 if (ioregs_init[i].bit_or & IO_PIN_OVER_DRVSTR)
88 mask |= IO_PIN_DS(3);
89 /*
90 * DON'T do the "mask, then insert"
91 * in place on the register, it may
92 * break access to external hardware
93 * (like boot ROMs) when configuring
94 * LPB related pins, while the code to
95 * configure the pin is read from this
96 * very address region
97 */
98 clrsetbits_be32(reg + j, mask,
99 ioregs_init[i].val & mask);
100 }
101 }
102 }
103}