[people/ms/u-boot.git] / arch / powerpc / cpu / mpc8220 / uart.c

/*
 * (C) Copyright 2004, Freescale, Inc
 * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 *
 */

/*
 * Minimal serial functions needed to use one of the PSC ports
 * as serial console interface.
 */

#include <common.h>
#include <mpc8220.h>
#include <serial.h>
#include <linux/compiler.h>

DECLARE_GLOBAL_DATA_PTR;

#define PSC_BASE   MMAP_PSC1

#if defined(CONFIG_PSC_CONSOLE)
static int mpc8220_serial_init(void)
{
	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
	u32 counter;

	/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
	psc->cr = 0;
	psc->ipcr_acr = 0;
	psc->isr_imr = 0;

	/* write to CSR: RX/TX baud rate from timers */
	psc->sr_csr = 0xdd000000;

	psc->mr1_2 = PSC_MR1_BITS_CHAR_8 | PSC_MR1_NO_PARITY | PSC_MR2_STOP_BITS_1;

	/* Setting up BaudRate */
	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
	counter++;

	/* write to CTUR: divide counter upper byte */
	psc->ctur = ((counter & 0xff00) << 16);
	/* write to CTLR: divide counter lower byte */
	psc->ctlr = ((counter & 0x00ff) << 24);

	psc->cr = PSC_CR_RST_RX_CMD;
	psc->cr = PSC_CR_RST_TX_CMD;
	psc->cr = PSC_CR_RST_ERR_STS_CMD;
	psc->cr = PSC_CR_RST_BRK_INT_CMD;
	psc->cr = PSC_CR_RST_MR_PTR_CMD;

	psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
	return (0);
}

static void mpc8220_serial_putc(const char c)
{
	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;

	if (c == '\n')
		serial_putc ('\r');

	/* Wait for last character to go. */
	while (!(psc->sr_csr & PSC_SR_TXRDY));

	psc->xmitbuf[0] = c;
}

static int mpc8220_serial_getc(void)
{
	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;

	/* Wait for a character to arrive. */
	while (!(psc->sr_csr & PSC_SR_RXRDY));
	return psc->xmitbuf[2];
}

static int mpc8220_serial_tstc(void)
{
	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;

	return (psc->sr_csr & PSC_SR_RXRDY);
}

static void mpc8220_serial_setbrg(void)
{
	volatile psc8220_t *psc = (psc8220_t *) PSC_BASE;
	u32 counter;

	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
	counter++;

	/* write to CTUR: divide counter upper byte */
	psc->ctur = ((counter & 0xff00) << 16);
	/* write to CTLR: divide counter lower byte */
	psc->ctlr = ((counter & 0x00ff) << 24);

	psc->cr = PSC_CR_RST_RX_CMD;
	psc->cr = PSC_CR_RST_TX_CMD;

	psc->cr = PSC_CR_RX_ENABLE | PSC_CR_TX_ENABLE;
}

static struct serial_device mpc8220_serial_drv = {
	.name	= "mpc8220_serial",
	.start	= mpc8220_serial_init,
	.stop	= NULL,
	.setbrg	= mpc8220_serial_setbrg,
	.putc	= mpc8220_serial_putc,
	.puts	= default_serial_puts,
	.getc	= mpc8220_serial_getc,
	.tstc	= mpc8220_serial_tstc,
};

void mpc8220_serial_initialize(void)
{
	serial_register(&mpc8220_serial_drv);
}

__weak struct serial_device *default_serial_console(void)
{
	return &mpc8220_serial_drv;
}
#endif /* CONFIG_PSC_CONSOLE */
Commit	Line	Data
983fda83 WD	1	/*
	2	* (C) Copyright 2004, Freescale, Inc
	3	* TsiChung Liew, Tsi-Chung.Liew@freescale.com.
	4	*
	5	* See file CREDITS for list of people who contributed to this
	6	* project.
	7	*
	8	* This program is free software; you can redistribute it and/or
	9	* modify it under the terms of the GNU General Public License as
	10	* published by the Free Software Foundation; either version 2 of
	11	* the License, or (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
	21	* MA 02111-1307 USA
	22	*
	23	*/
	24
	25	/*
	26	* Minimal serial functions needed to use one of the PSC ports
	27	* as serial console interface.
	28	*/
	29
	30	#include <common.h>
	31	#include <mpc8220.h>
2063a54e MV	32	#include <serial.h>
2063a54e MV	33	#include <linux/compiler.h>
983fda83	34
d87080b7 WD	35	DECLARE_GLOBAL_DATA_PTR;
d87080b7 WD	36
983fda83 WD	37	#define PSC_BASE MMAP_PSC1
	38
	39	#if defined(CONFIG_PSC_CONSOLE)
2063a54e	40	static int mpc8220_serial_init(void)
983fda83	41	{
983fda83 WD	42	volatile psc8220_t psc = (psc8220_t ) PSC_BASE;
	43	u32 counter;
	44
	45	/* write to SICR: SIM2 = uart mode,dcd does not affect rx */
	46	psc->cr = 0;
	47	psc->ipcr_acr = 0;
	48	psc->isr_imr = 0;
	49
	50	/* write to CSR: RX/TX baud rate from timers */
	51	psc->sr_csr = 0xdd000000;
	52
3c2b3d45	53	psc->mr1_2 = PSC_MR1_BITS_CHAR_8 \| PSC_MR1_NO_PARITY \| PSC_MR2_STOP_BITS_1;
983fda83 WD	54
	55	/* Setting up BaudRate */
	56	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
	57	counter++;
	58
	59	/* write to CTUR: divide counter upper byte */
	60	psc->ctur = ((counter & 0xff00) << 16);
	61	/* write to CTLR: divide counter lower byte */
	62	psc->ctlr = ((counter & 0x00ff) << 24);
	63
	64	psc->cr = PSC_CR_RST_RX_CMD;
	65	psc->cr = PSC_CR_RST_TX_CMD;
	66	psc->cr = PSC_CR_RST_ERR_STS_CMD;
	67	psc->cr = PSC_CR_RST_BRK_INT_CMD;
	68	psc->cr = PSC_CR_RST_MR_PTR_CMD;
	69
	70	psc->cr = PSC_CR_RX_ENABLE \| PSC_CR_TX_ENABLE;
	71	return (0);
	72	}
	73
2063a54e	74	static void mpc8220_serial_putc(const char c)
983fda83 WD	75	{
	76	volatile psc8220_t psc = (psc8220_t ) PSC_BASE;
	77
	78	if (c == '\n')
	79	serial_putc ('\r');
	80
	81	/* Wait for last character to go. */
12b43d51	82	while (!(psc->sr_csr & PSC_SR_TXRDY));
983fda83 WD	83
	84	psc->xmitbuf[0] = c;
	85	}
	86
2063a54e	87	static int mpc8220_serial_getc(void)
983fda83 WD	88	{
	89	volatile psc8220_t psc = (psc8220_t ) PSC_BASE;
	90
	91	/* Wait for a character to arrive. */
	92	while (!(psc->sr_csr & PSC_SR_RXRDY));
	93	return psc->xmitbuf[2];
	94	}
	95
2063a54e	96	static int mpc8220_serial_tstc(void)
983fda83 WD	97	{
	98	volatile psc8220_t psc = (psc8220_t ) PSC_BASE;
	99
	100	return (psc->sr_csr & PSC_SR_RXRDY);
	101	}
	102
2063a54e	103	static void mpc8220_serial_setbrg(void)
983fda83	104	{
983fda83 WD	105	volatile psc8220_t psc = (psc8220_t ) PSC_BASE;
	106	u32 counter;
	107
	108	counter = ((gd->bus_clk / gd->baudrate)) >> 5;
	109	counter++;
	110
	111	/* write to CTUR: divide counter upper byte */
	112	psc->ctur = ((counter & 0xff00) << 16);
	113	/* write to CTLR: divide counter lower byte */
	114	psc->ctlr = ((counter & 0x00ff) << 24);
	115
	116	psc->cr = PSC_CR_RST_RX_CMD;
	117	psc->cr = PSC_CR_RST_TX_CMD;
	118
	119	psc->cr = PSC_CR_RX_ENABLE \| PSC_CR_TX_ENABLE;
	120	}
2063a54e	121
2063a54e MV	122	static struct serial_device mpc8220_serial_drv = {
	123	.name = "mpc8220_serial",
	124	.start = mpc8220_serial_init,
	125	.stop = NULL,
	126	.setbrg = mpc8220_serial_setbrg,
	127	.putc = mpc8220_serial_putc,
ec3fd689	128	.puts = default_serial_puts,
2063a54e MV	129	.getc = mpc8220_serial_getc,
	130	.tstc = mpc8220_serial_tstc,
	131	};
	132
	133	void mpc8220_serial_initialize(void)
	134	{
	135	serial_register(&mpc8220_serial_drv);
	136	}
	137
	138	__weak struct serial_device *default_serial_console(void)
	139	{
	140	return &mpc8220_serial_drv;
	141	}
983fda83	142	#endif /* CONFIG_PSC_CONSOLE */