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327f7a02 WD |
1 | CONTENT: |
2 | ||
3 | epic.h | |
4 | epic1.c | |
5 | epic2.s | |
6 | ||
7 | WHAT ARE THESE FILES: | |
8 | ||
9 | These files contain MPC8240 (Kahlua) EPIC | |
10 | driver routines. The driver routines are not | |
11 | written for any specific operating system. | |
12 | They serves the purpose of code sample, and | |
13 | jump-start for using the MPC8240 EPIC unit. | |
14 | ||
15 | For the reason of correctness of C language | |
16 | syntax, these files are compiled by Metaware | |
17 | C compiler and assembler. | |
18 | ||
19 | ENDIAN NOTATION: | |
20 | ||
21 | The algorithm is designed for big-endian mode, | |
22 | software is responsible for byte swapping. | |
23 | ||
24 | USAGE: | |
25 | ||
26 | 1. The host system that is running on MPC8240 | |
27 | shall link the files listed here. The memory | |
28 | location of driver routines shall take into | |
29 | account of that driver routines need to run | |
30 | in supervisor mode and they process external | |
31 | interrupts. | |
32 | ||
33 | The routine epic_exception shall be called by | |
34 | exception vector at location 0x500, i.e., | |
35 | 603e core external exception vector. | |
36 | ||
37 | 2. The host system is responsible for configuring | |
38 | the MPC8240 including Embedded Utilities Memory | |
39 | Block. All EPIC driver functions require the | |
40 | content of Embedded Utilities Memory Block | |
41 | Base Address Register, EUMBBAR, as the first | |
42 | parameter. | |
43 | ||
44 | 3. Before EPIC unit of MPC8240 can be used, | |
45 | initialize EPIC unit by calling epicInit | |
46 | with the corresponding parameters. | |
47 | ||
48 | The initialization shall disable the 603e | |
49 | core External Exception by calling CoreExtIntDisable( ). | |
50 | Next, call epicInit( ). Last, enable the 603e core | |
51 | External Exception by calling CoreExtIntEnable( ). | |
52 | ||
53 | 4. After EPIC unit has been successfully initialized, | |
54 | epicIntSourceSet( ) shall be used to register each | |
55 | external interrupt source. Anytime, an external | |
56 | interrupt source can be disabled or enabled by | |
57 | calling corresponding function, epicIntDisable( ), | |
58 | or epicIntEnable( ). | |
59 | ||
60 | Global Timers' resource, base count and frequency, | |
61 | can be changed by calling epicTmFrequencySet( ) | |
62 | and epicTmBaseSet( ). | |
63 | ||
64 | To stop counting a specific global timer, use | |
65 | the function, epicTmInhibit while epicTmEnable | |
66 | can be used to start counting a timer. | |
67 | ||
68 | 5. To mask a set of external interrupts that are | |
69 | are certain level below, epicIntPrioritySet( ) | |
70 | can be used. For example, if the processor's | |
71 | current task priority register is set to 0x7, | |
72 | only interrupts of priority 0x8 or higher will | |
73 | be passed to the processor. | |
74 | ||
75 | Be careful when using this function. It may | |
76 | corrupt the current interrupt pending, selector, | |
77 | and request registers, resulting an invalid vetor. | |
78 | ||
79 | After enabling an interrupt, disable it may also | |
80 | cause an invalid vector. User may consider using | |
81 | the spurious vector interrupt service routine to | |
82 | handle this case. | |
83 | ||
84 | 6. The EPIC driver routines contains a set | |
85 | of utilities, Set and Get, for host system | |
86 | to query and modify the desired EPIC source | |
87 | registers. | |
88 | ||
89 | 7. Each external interrupt source shall register | |
90 | its interrupt service routine. The routine | |
91 | shall contain all interrupt source specific | |
92 | processes and keep as short as possible. | |
93 | ||
94 | Special customized end of interrupt routine | |
95 | is optional. If it is needed, it shall contain | |
96 | the external interrupt source specific end of | |
97 | interrupt process. | |
98 | ||
99 | External interrupt exception vector at 0x500 | |
100 | shall always call the epicEOI just before | |
101 | rfi instruction. Refer to the routine, | |
102 | epic_exception, for a code sample. |