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Commit | Line | Data |
---|---|---|
dd84058d MY |
1 | menu "mpc85xx CPU" |
2 | depends on MPC85xx | |
3 | ||
4 | config SYS_CPU | |
dd84058d MY |
5 | default "mpc85xx" |
6 | ||
7 | choice | |
8 | prompt "Target select" | |
a26cd049 | 9 | optional |
dd84058d MY |
10 | |
11 | config TARGET_SBC8548 | |
12 | bool "Support sbc8548" | |
281ed4c7 | 13 | select ARCH_MPC8548 |
dd84058d MY |
14 | |
15 | config TARGET_SOCRATES | |
16 | bool "Support socrates" | |
25cb74b3 | 17 | select ARCH_MPC8544 |
dd84058d | 18 | |
45a8d117 YS |
19 | config TARGET_B4420QDS |
20 | bool "Support B4420QDS" | |
b41f192b | 21 | select ARCH_B4420 |
45a8d117 YS |
22 | select SUPPORT_SPL |
23 | select PHYS_64BIT | |
24 | ||
dd84058d MY |
25 | config TARGET_B4860QDS |
26 | bool "Support B4860QDS" | |
3006ebc3 | 27 | select ARCH_B4860 |
e5ec4815 | 28 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 29 | select SUPPORT_SPL |
bb6b142f | 30 | select PHYS_64BIT |
dd84058d MY |
31 | |
32 | config TARGET_BSC9131RDB | |
33 | bool "Support BSC9131RDB" | |
115d60c0 | 34 | select ARCH_BSC9131 |
02627356 | 35 | select SUPPORT_SPL |
a5d67547 | 36 | select BOARD_EARLY_INIT_F |
dd84058d MY |
37 | |
38 | config TARGET_BSC9132QDS | |
39 | bool "Support BSC9132QDS" | |
115d60c0 | 40 | select ARCH_BSC9132 |
e5ec4815 | 41 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 42 | select SUPPORT_SPL |
a5d67547 | 43 | select BOARD_EARLY_INIT_F |
dd84058d MY |
44 | |
45 | config TARGET_C29XPCIE | |
46 | bool "Support C29XPCIE" | |
4fd64746 | 47 | select ARCH_C29X |
e5ec4815 | 48 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 49 | select SUPPORT_SPL |
cf6bbe4c | 50 | select SUPPORT_TPL |
bb6b142f | 51 | select PHYS_64BIT |
dd84058d MY |
52 | |
53 | config TARGET_P3041DS | |
54 | bool "Support P3041DS" | |
bb6b142f | 55 | select PHYS_64BIT |
5e5fdd2d | 56 | select ARCH_P3041 |
e5ec4815 | 57 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
58 | |
59 | config TARGET_P4080DS | |
60 | bool "Support P4080DS" | |
bb6b142f | 61 | select PHYS_64BIT |
e71372cb | 62 | select ARCH_P4080 |
e5ec4815 | 63 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
64 | |
65 | config TARGET_P5020DS | |
66 | bool "Support P5020DS" | |
bb6b142f | 67 | select PHYS_64BIT |
cefe11cd | 68 | select ARCH_P5020 |
e5ec4815 | 69 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
70 | |
71 | config TARGET_P5040DS | |
72 | bool "Support P5040DS" | |
bb6b142f | 73 | select PHYS_64BIT |
95390360 | 74 | select ARCH_P5040 |
e5ec4815 | 75 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
dd84058d MY |
76 | |
77 | config TARGET_MPC8536DS | |
78 | bool "Support MPC8536DS" | |
24ad75ae | 79 | select ARCH_MPC8536 |
d26e34c4 YS |
80 | # Use DDR3 controller with DDR2 DIMMs on this board |
81 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
82 | |
83 | config TARGET_MPC8540ADS | |
84 | bool "Support MPC8540ADS" | |
7f825218 | 85 | select ARCH_MPC8540 |
dd84058d MY |
86 | |
87 | config TARGET_MPC8541CDS | |
88 | bool "Support MPC8541CDS" | |
3aff3082 | 89 | select ARCH_MPC8541 |
dd84058d MY |
90 | |
91 | config TARGET_MPC8544DS | |
92 | bool "Support MPC8544DS" | |
25cb74b3 | 93 | select ARCH_MPC8544 |
dd84058d MY |
94 | |
95 | config TARGET_MPC8548CDS | |
96 | bool "Support MPC8548CDS" | |
281ed4c7 | 97 | select ARCH_MPC8548 |
dd84058d MY |
98 | |
99 | config TARGET_MPC8555CDS | |
100 | bool "Support MPC8555CDS" | |
3c3d8ab5 | 101 | select ARCH_MPC8555 |
dd84058d MY |
102 | |
103 | config TARGET_MPC8560ADS | |
104 | bool "Support MPC8560ADS" | |
99d0a312 | 105 | select ARCH_MPC8560 |
dd84058d MY |
106 | |
107 | config TARGET_MPC8568MDS | |
108 | bool "Support MPC8568MDS" | |
d07c3843 | 109 | select ARCH_MPC8568 |
dd84058d MY |
110 | |
111 | config TARGET_MPC8569MDS | |
112 | bool "Support MPC8569MDS" | |
23b36a7d | 113 | select ARCH_MPC8569 |
dd84058d MY |
114 | |
115 | config TARGET_MPC8572DS | |
116 | bool "Support MPC8572DS" | |
c8f48474 | 117 | select ARCH_MPC8572 |
d26e34c4 YS |
118 | # Use DDR3 controller with DDR2 DIMMs on this board |
119 | select SYS_FSL_DDRC_GEN3 | |
dd84058d | 120 | |
7601686c YS |
121 | config TARGET_P1010RDB_PA |
122 | bool "Support P1010RDB_PA" | |
123 | select ARCH_P1010 | |
e5ec4815 | 124 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
7601686c YS |
125 | select SUPPORT_SPL |
126 | select SUPPORT_TPL | |
a1dc980d | 127 | imply CMD_EEPROM |
7601686c YS |
128 | |
129 | config TARGET_P1010RDB_PB | |
130 | bool "Support P1010RDB_PB" | |
7d5f9f84 | 131 | select ARCH_P1010 |
e5ec4815 | 132 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 133 | select SUPPORT_SPL |
cf6bbe4c | 134 | select SUPPORT_TPL |
a1dc980d | 135 | imply CMD_EEPROM |
dd84058d MY |
136 | |
137 | config TARGET_P1022DS | |
138 | bool "Support P1022DS" | |
feb9e25b | 139 | select ARCH_P1022 |
02627356 | 140 | select SUPPORT_SPL |
cf6bbe4c | 141 | select SUPPORT_TPL |
dd84058d MY |
142 | |
143 | config TARGET_P1023RDB | |
144 | bool "Support P1023RDB" | |
9bb1d6bc | 145 | select ARCH_P1023 |
a1dc980d | 146 | imply CMD_EEPROM |
dd84058d | 147 | |
fedae6eb YS |
148 | config TARGET_P1020MBG |
149 | bool "Support P1020MBG-PC" | |
150 | select SUPPORT_SPL | |
151 | select SUPPORT_TPL | |
484fff64 | 152 | select ARCH_P1020 |
a1dc980d | 153 | imply CMD_EEPROM |
484fff64 | 154 | |
aa14620c YS |
155 | config TARGET_P1020RDB_PC |
156 | bool "Support P1020RDB-PC" | |
157 | select SUPPORT_SPL | |
158 | select SUPPORT_TPL | |
484fff64 | 159 | select ARCH_P1020 |
a1dc980d | 160 | imply CMD_EEPROM |
aa14620c | 161 | |
f404b66c YS |
162 | config TARGET_P1020RDB_PD |
163 | bool "Support P1020RDB-PD" | |
164 | select SUPPORT_SPL | |
165 | select SUPPORT_TPL | |
484fff64 | 166 | select ARCH_P1020 |
a1dc980d | 167 | imply CMD_EEPROM |
f404b66c | 168 | |
e9bc8a8f YS |
169 | config TARGET_P1020UTM |
170 | bool "Support P1020UTM" | |
171 | select SUPPORT_SPL | |
172 | select SUPPORT_TPL | |
484fff64 | 173 | select ARCH_P1020 |
a1dc980d | 174 | imply CMD_EEPROM |
fedae6eb | 175 | |
da439db3 YS |
176 | config TARGET_P1021RDB |
177 | bool "Support P1021RDB" | |
178 | select SUPPORT_SPL | |
179 | select SUPPORT_TPL | |
a990799d | 180 | select ARCH_P1021 |
a1dc980d | 181 | imply CMD_EEPROM |
da439db3 | 182 | |
4eedabfe YS |
183 | config TARGET_P1024RDB |
184 | bool "Support P1024RDB" | |
185 | select SUPPORT_SPL | |
186 | select SUPPORT_TPL | |
52b6f13d | 187 | select ARCH_P1024 |
a1dc980d | 188 | imply CMD_EEPROM |
4eedabfe | 189 | |
b0c98b4b YS |
190 | config TARGET_P1025RDB |
191 | bool "Support P1025RDB" | |
192 | select SUPPORT_SPL | |
193 | select SUPPORT_TPL | |
4167a67d | 194 | select ARCH_P1025 |
a1dc980d | 195 | imply CMD_EEPROM |
b0c98b4b | 196 | |
8435aa77 YS |
197 | config TARGET_P2020RDB |
198 | bool "Support P2020RDB-PC" | |
199 | select SUPPORT_SPL | |
200 | select SUPPORT_TPL | |
4593637b | 201 | select ARCH_P2020 |
a1dc980d | 202 | imply CMD_EEPROM |
8435aa77 | 203 | |
dd84058d MY |
204 | config TARGET_P1_TWR |
205 | bool "Support p1_twr" | |
4167a67d | 206 | select ARCH_P1025 |
dd84058d | 207 | |
dd84058d MY |
208 | config TARGET_P2041RDB |
209 | bool "Support P2041RDB" | |
ce040c83 | 210 | select ARCH_P2041 |
e5ec4815 | 211 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 212 | select PHYS_64BIT |
dd84058d MY |
213 | |
214 | config TARGET_QEMU_PPCE500 | |
215 | bool "Support qemu-ppce500" | |
10343403 | 216 | select ARCH_QEMU_E500 |
bb6b142f | 217 | select PHYS_64BIT |
dd84058d | 218 | |
6f53bd47 YS |
219 | config TARGET_T1024QDS |
220 | bool "Support T1024QDS" | |
e5d5f5a8 | 221 | select ARCH_T1024 |
e5ec4815 | 222 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
aba80048 | 223 | select SUPPORT_SPL |
bb6b142f | 224 | select PHYS_64BIT |
a1dc980d | 225 | imply CMD_EEPROM |
aba80048 | 226 | |
08c75292 YS |
227 | config TARGET_T1023RDB |
228 | bool "Support T1023RDB" | |
5ff3f41d | 229 | select ARCH_T1023 |
e5ec4815 | 230 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
08c75292 YS |
231 | select SUPPORT_SPL |
232 | select PHYS_64BIT | |
a1dc980d | 233 | imply CMD_EEPROM |
08c75292 YS |
234 | |
235 | config TARGET_T1024RDB | |
236 | bool "Support T1024RDB" | |
e5d5f5a8 | 237 | select ARCH_T1024 |
e5ec4815 | 238 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
48c6f328 | 239 | select SUPPORT_SPL |
bb6b142f | 240 | select PHYS_64BIT |
a1dc980d | 241 | imply CMD_EEPROM |
48c6f328 | 242 | |
dd84058d MY |
243 | config TARGET_T1040QDS |
244 | bool "Support T1040QDS" | |
5d737010 | 245 | select ARCH_T1040 |
e5ec4815 | 246 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
bb6b142f | 247 | select PHYS_64BIT |
a1dc980d | 248 | imply CMD_EEPROM |
dd84058d | 249 | |
95a809b9 YS |
250 | config TARGET_T1040RDB |
251 | bool "Support T1040RDB" | |
5d737010 | 252 | select ARCH_T1040 |
e5ec4815 | 253 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
95a809b9 YS |
254 | select SUPPORT_SPL |
255 | select PHYS_64BIT | |
256 | ||
a016735c YS |
257 | config TARGET_T1040D4RDB |
258 | bool "Support T1040D4RDB" | |
259 | select ARCH_T1040 | |
e5ec4815 | 260 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
a016735c YS |
261 | select SUPPORT_SPL |
262 | select PHYS_64BIT | |
263 | ||
95a809b9 YS |
264 | config TARGET_T1042RDB |
265 | bool "Support T1042RDB" | |
5449c98a | 266 | select ARCH_T1042 |
e5ec4815 | 267 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 268 | select SUPPORT_SPL |
bb6b142f | 269 | select PHYS_64BIT |
dd84058d | 270 | |
319ed24a YS |
271 | config TARGET_T1042D4RDB |
272 | bool "Support T1042D4RDB" | |
273 | select ARCH_T1042 | |
e5ec4815 | 274 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
319ed24a YS |
275 | select SUPPORT_SPL |
276 | select PHYS_64BIT | |
277 | ||
55ed8ae3 YS |
278 | config TARGET_T1042RDB_PI |
279 | bool "Support T1042RDB_PI" | |
280 | select ARCH_T1042 | |
e5ec4815 | 281 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
55ed8ae3 YS |
282 | select SUPPORT_SPL |
283 | select PHYS_64BIT | |
284 | ||
638d5be0 YS |
285 | config TARGET_T2080QDS |
286 | bool "Support T2080QDS" | |
0f3d80e9 | 287 | select ARCH_T2080 |
e5ec4815 | 288 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 289 | select SUPPORT_SPL |
bb6b142f | 290 | select PHYS_64BIT |
dd84058d | 291 | |
01671e66 YS |
292 | config TARGET_T2080RDB |
293 | bool "Support T2080RDB" | |
0f3d80e9 | 294 | select ARCH_T2080 |
e5ec4815 | 295 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 296 | select SUPPORT_SPL |
bb6b142f | 297 | select PHYS_64BIT |
dd84058d | 298 | |
638d5be0 YS |
299 | config TARGET_T2081QDS |
300 | bool "Support T2081QDS" | |
0f3d80e9 | 301 | select ARCH_T2081 |
638d5be0 YS |
302 | select SUPPORT_SPL |
303 | select PHYS_64BIT | |
304 | ||
9c21d06c YS |
305 | config TARGET_T4160QDS |
306 | bool "Support T4160QDS" | |
652a7bbd | 307 | select ARCH_T4160 |
e5ec4815 | 308 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
9c21d06c YS |
309 | select SUPPORT_SPL |
310 | select PHYS_64BIT | |
311 | ||
12ffdb3b YS |
312 | config TARGET_T4160RDB |
313 | bool "Support T4160RDB" | |
652a7bbd | 314 | select ARCH_T4160 |
12ffdb3b YS |
315 | select SUPPORT_SPL |
316 | select PHYS_64BIT | |
317 | ||
dd84058d MY |
318 | config TARGET_T4240QDS |
319 | bool "Support T4240QDS" | |
26bc57da | 320 | select ARCH_T4240 |
e5ec4815 | 321 | select BOARD_LATE_INIT if CHAIN_OF_TRUST |
02627356 | 322 | select SUPPORT_SPL |
bb6b142f | 323 | select PHYS_64BIT |
dd84058d MY |
324 | |
325 | config TARGET_T4240RDB | |
326 | bool "Support T4240RDB" | |
26bc57da | 327 | select ARCH_T4240 |
373762c3 | 328 | select SUPPORT_SPL |
bb6b142f | 329 | select PHYS_64BIT |
dd84058d MY |
330 | |
331 | config TARGET_CONTROLCENTERD | |
332 | bool "Support controlcenterd" | |
feb9e25b | 333 | select ARCH_P1022 |
dd84058d MY |
334 | |
335 | config TARGET_KMP204X | |
336 | bool "Support kmp204x" | |
ce040c83 | 337 | select ARCH_P2041 |
bb6b142f | 338 | select PHYS_64BIT |
97072747 | 339 | imply CMD_CRAMFS |
80e44cfe | 340 | imply FS_CRAMFS |
dd84058d | 341 | |
dd84058d MY |
342 | config TARGET_XPEDITE520X |
343 | bool "Support xpedite520x" | |
281ed4c7 | 344 | select ARCH_MPC8548 |
dd84058d MY |
345 | |
346 | config TARGET_XPEDITE537X | |
347 | bool "Support xpedite537x" | |
c8f48474 | 348 | select ARCH_MPC8572 |
d26e34c4 YS |
349 | # Use DDR3 controller with DDR2 DIMMs on this board |
350 | select SYS_FSL_DDRC_GEN3 | |
dd84058d MY |
351 | |
352 | config TARGET_XPEDITE550X | |
353 | bool "Support xpedite550x" | |
4593637b | 354 | select ARCH_P2020 |
dd84058d | 355 | |
8b0044ff OZ |
356 | config TARGET_UCP1020 |
357 | bool "Support uCP1020" | |
484fff64 | 358 | select ARCH_P1020 |
8b0044ff | 359 | |
22a1b99a YS |
360 | config TARGET_CYRUS_P5020 |
361 | bool "Support Varisys Cyrus P5020" | |
362 | select ARCH_P5020 | |
363 | select PHYS_64BIT | |
364 | ||
365 | config TARGET_CYRUS_P5040 | |
366 | bool "Support Varisys Cyrus P5040" | |
367 | select ARCH_P5040 | |
bb6b142f | 368 | select PHYS_64BIT |
87e29878 | 369 | |
dd84058d MY |
370 | endchoice |
371 | ||
b41f192b YS |
372 | config ARCH_B4420 |
373 | bool | |
f8dee360 | 374 | select E500MC |
9ec10107 | 375 | select E6500 |
05cb79a7 | 376 | select FSL_LAW |
22120f11 | 377 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
378 | select SYS_FSL_ERRATUM_A004477 |
379 | select SYS_FSL_ERRATUM_A005871 | |
380 | select SYS_FSL_ERRATUM_A006379 | |
381 | select SYS_FSL_ERRATUM_A006384 | |
382 | select SYS_FSL_ERRATUM_A006475 | |
383 | select SYS_FSL_ERRATUM_A006593 | |
384 | select SYS_FSL_ERRATUM_A007075 | |
385 | select SYS_FSL_ERRATUM_A007186 | |
386 | select SYS_FSL_ERRATUM_A007212 | |
387 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 388 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 389 | select SYS_FSL_HAS_SEC |
7371774a | 390 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 391 | select SYS_FSL_SEC_BE |
2c2e2c9e | 392 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 393 | select SYS_PPC64 |
d98b98d6 | 394 | select FSL_IFC |
a1dc980d | 395 | imply CMD_EEPROM |
b41f192b | 396 | |
3006ebc3 YS |
397 | config ARCH_B4860 |
398 | bool | |
f8dee360 | 399 | select E500MC |
9ec10107 | 400 | select E6500 |
05cb79a7 | 401 | select FSL_LAW |
22120f11 | 402 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
403 | select SYS_FSL_ERRATUM_A004477 |
404 | select SYS_FSL_ERRATUM_A005871 | |
405 | select SYS_FSL_ERRATUM_A006379 | |
406 | select SYS_FSL_ERRATUM_A006384 | |
407 | select SYS_FSL_ERRATUM_A006475 | |
408 | select SYS_FSL_ERRATUM_A006593 | |
409 | select SYS_FSL_ERRATUM_A007075 | |
410 | select SYS_FSL_ERRATUM_A007186 | |
411 | select SYS_FSL_ERRATUM_A007212 | |
06ad970b | 412 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 413 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 414 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 415 | select SYS_FSL_HAS_SEC |
7371774a | 416 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 417 | select SYS_FSL_SEC_BE |
2c2e2c9e | 418 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 419 | select SYS_PPC64 |
d98b98d6 | 420 | select FSL_IFC |
a1dc980d | 421 | imply CMD_EEPROM |
3006ebc3 | 422 | |
115d60c0 YS |
423 | config ARCH_BSC9131 |
424 | bool | |
05cb79a7 | 425 | select FSL_LAW |
22120f11 | 426 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
427 | select SYS_FSL_ERRATUM_A004477 |
428 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a | 429 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 430 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 431 | select SYS_FSL_HAS_SEC |
90b80386 | 432 | select SYS_FSL_SEC_BE |
2c2e2c9e | 433 | select SYS_FSL_SEC_COMPAT_4 |
d98b98d6 | 434 | select FSL_IFC |
a1dc980d | 435 | imply CMD_EEPROM |
115d60c0 YS |
436 | |
437 | config ARCH_BSC9132 | |
438 | bool | |
05cb79a7 | 439 | select FSL_LAW |
22120f11 | 440 | select SYS_FSL_DDR_VER_46 |
63659ff3 YS |
441 | select SYS_FSL_ERRATUM_A004477 |
442 | select SYS_FSL_ERRATUM_A005125 | |
443 | select SYS_FSL_ERRATUM_A005434 | |
c01e4a1a | 444 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
445 | select SYS_FSL_ERRATUM_I2C_A004447 |
446 | select SYS_FSL_ERRATUM_IFC_A002769 | |
d26e34c4 | 447 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 448 | select SYS_FSL_HAS_SEC |
90b80386 | 449 | select SYS_FSL_SEC_BE |
2c2e2c9e | 450 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 451 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 452 | select FSL_IFC |
a1dc980d | 453 | imply CMD_EEPROM |
115d60c0 | 454 | |
4fd64746 YS |
455 | config ARCH_C29X |
456 | bool | |
05cb79a7 | 457 | select FSL_LAW |
22120f11 | 458 | select SYS_FSL_DDR_VER_46 |
63659ff3 | 459 | select SYS_FSL_ERRATUM_A005125 |
c01e4a1a | 460 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 461 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 462 | select SYS_FSL_HAS_SEC |
90b80386 | 463 | select SYS_FSL_SEC_BE |
2c2e2c9e | 464 | select SYS_FSL_SEC_COMPAT_6 |
53c95384 | 465 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 466 | select FSL_IFC |
4fd64746 | 467 | |
24ad75ae YS |
468 | config ARCH_MPC8536 |
469 | bool | |
05cb79a7 | 470 | select FSL_LAW |
63659ff3 YS |
471 | select SYS_FSL_ERRATUM_A004508 |
472 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 YS |
473 | select SYS_FSL_HAS_DDR2 |
474 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 475 | select SYS_FSL_HAS_SEC |
90b80386 | 476 | select SYS_FSL_SEC_BE |
2c2e2c9e | 477 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 478 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 479 | select FSL_ELBC |
24ad75ae | 480 | |
7f825218 YS |
481 | config ARCH_MPC8540 |
482 | bool | |
05cb79a7 | 483 | select FSL_LAW |
d26e34c4 | 484 | select SYS_FSL_HAS_DDR1 |
7f825218 | 485 | |
3aff3082 YS |
486 | config ARCH_MPC8541 |
487 | bool | |
05cb79a7 | 488 | select FSL_LAW |
d26e34c4 | 489 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 490 | select SYS_FSL_HAS_SEC |
90b80386 | 491 | select SYS_FSL_SEC_BE |
2c2e2c9e | 492 | select SYS_FSL_SEC_COMPAT_2 |
3aff3082 | 493 | |
25cb74b3 YS |
494 | config ARCH_MPC8544 |
495 | bool | |
05cb79a7 | 496 | select FSL_LAW |
63659ff3 | 497 | select SYS_FSL_ERRATUM_A005125 |
d26e34c4 | 498 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 499 | select SYS_FSL_HAS_SEC |
90b80386 | 500 | select SYS_FSL_SEC_BE |
2c2e2c9e | 501 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 502 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 503 | select FSL_ELBC |
25cb74b3 | 504 | |
281ed4c7 YS |
505 | config ARCH_MPC8548 |
506 | bool | |
05cb79a7 | 507 | select FSL_LAW |
63659ff3 YS |
508 | select SYS_FSL_ERRATUM_A005125 |
509 | select SYS_FSL_ERRATUM_NMG_DDR120 | |
510 | select SYS_FSL_ERRATUM_NMG_LBC103 | |
511 | select SYS_FSL_ERRATUM_NMG_ETSEC129 | |
512 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 YS |
513 | select SYS_FSL_HAS_DDR2 |
514 | select SYS_FSL_HAS_DDR1 | |
2c2e2c9e | 515 | select SYS_FSL_HAS_SEC |
90b80386 | 516 | select SYS_FSL_SEC_BE |
2c2e2c9e | 517 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 518 | select SYS_PPC_E500_USE_DEBUG_TLB |
281ed4c7 | 519 | |
3c3d8ab5 YS |
520 | config ARCH_MPC8555 |
521 | bool | |
05cb79a7 | 522 | select FSL_LAW |
d26e34c4 | 523 | select SYS_FSL_HAS_DDR1 |
2c2e2c9e | 524 | select SYS_FSL_HAS_SEC |
90b80386 | 525 | select SYS_FSL_SEC_BE |
2c2e2c9e | 526 | select SYS_FSL_SEC_COMPAT_2 |
3c3d8ab5 | 527 | |
99d0a312 YS |
528 | config ARCH_MPC8560 |
529 | bool | |
05cb79a7 | 530 | select FSL_LAW |
d26e34c4 | 531 | select SYS_FSL_HAS_DDR1 |
99d0a312 | 532 | |
d07c3843 YS |
533 | config ARCH_MPC8568 |
534 | bool | |
05cb79a7 | 535 | select FSL_LAW |
d26e34c4 | 536 | select SYS_FSL_HAS_DDR2 |
2c2e2c9e | 537 | select SYS_FSL_HAS_SEC |
90b80386 | 538 | select SYS_FSL_SEC_BE |
2c2e2c9e | 539 | select SYS_FSL_SEC_COMPAT_2 |
d07c3843 | 540 | |
23b36a7d YS |
541 | config ARCH_MPC8569 |
542 | bool | |
05cb79a7 | 543 | select FSL_LAW |
63659ff3 YS |
544 | select SYS_FSL_ERRATUM_A004508 |
545 | select SYS_FSL_ERRATUM_A005125 | |
d26e34c4 | 546 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 547 | select SYS_FSL_HAS_SEC |
90b80386 | 548 | select SYS_FSL_SEC_BE |
2c2e2c9e | 549 | select SYS_FSL_SEC_COMPAT_2 |
06878977 | 550 | select FSL_ELBC |
23b36a7d | 551 | |
c8f48474 YS |
552 | config ARCH_MPC8572 |
553 | bool | |
05cb79a7 | 554 | select FSL_LAW |
63659ff3 YS |
555 | select SYS_FSL_ERRATUM_A004508 |
556 | select SYS_FSL_ERRATUM_A005125 | |
557 | select SYS_FSL_ERRATUM_DDR_115 | |
558 | select SYS_FSL_ERRATUM_DDR111_DDR134 | |
d26e34c4 YS |
559 | select SYS_FSL_HAS_DDR2 |
560 | select SYS_FSL_HAS_DDR3 | |
2c2e2c9e | 561 | select SYS_FSL_HAS_SEC |
90b80386 | 562 | select SYS_FSL_SEC_BE |
2c2e2c9e | 563 | select SYS_FSL_SEC_COMPAT_2 |
d26e34c4 | 564 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 565 | select FSL_ELBC |
c8f48474 | 566 | |
7d5f9f84 YS |
567 | config ARCH_P1010 |
568 | bool | |
05cb79a7 | 569 | select FSL_LAW |
63659ff3 YS |
570 | select SYS_FSL_ERRATUM_A004477 |
571 | select SYS_FSL_ERRATUM_A004508 | |
572 | select SYS_FSL_ERRATUM_A005125 | |
573 | select SYS_FSL_ERRATUM_A006261 | |
574 | select SYS_FSL_ERRATUM_A007075 | |
c01e4a1a | 575 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
576 | select SYS_FSL_ERRATUM_I2C_A004447 |
577 | select SYS_FSL_ERRATUM_IFC_A002769 | |
578 | select SYS_FSL_ERRATUM_P1010_A003549 | |
579 | select SYS_FSL_ERRATUM_SEC_A003571 | |
580 | select SYS_FSL_ERRATUM_IFC_A003399 | |
d26e34c4 | 581 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 582 | select SYS_FSL_HAS_SEC |
90b80386 | 583 | select SYS_FSL_SEC_BE |
2c2e2c9e | 584 | select SYS_FSL_SEC_COMPAT_4 |
53c95384 | 585 | select SYS_PPC_E500_USE_DEBUG_TLB |
d98b98d6 | 586 | select FSL_IFC |
a1dc980d | 587 | imply CMD_EEPROM |
7d5f9f84 | 588 | |
1cdd96f3 YS |
589 | config ARCH_P1011 |
590 | bool | |
05cb79a7 | 591 | select FSL_LAW |
63659ff3 YS |
592 | select SYS_FSL_ERRATUM_A004508 |
593 | select SYS_FSL_ERRATUM_A005125 | |
594 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 595 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 596 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 597 | select SYS_FSL_HAS_SEC |
90b80386 | 598 | select SYS_FSL_SEC_BE |
2c2e2c9e | 599 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 600 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 601 | select FSL_ELBC |
1cdd96f3 | 602 | |
484fff64 YS |
603 | config ARCH_P1020 |
604 | bool | |
05cb79a7 | 605 | select FSL_LAW |
63659ff3 YS |
606 | select SYS_FSL_ERRATUM_A004508 |
607 | select SYS_FSL_ERRATUM_A005125 | |
608 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 609 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 610 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 611 | select SYS_FSL_HAS_SEC |
90b80386 | 612 | select SYS_FSL_SEC_BE |
2c2e2c9e | 613 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 614 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 615 | select FSL_ELBC |
484fff64 | 616 | |
a990799d YS |
617 | config ARCH_P1021 |
618 | bool | |
05cb79a7 | 619 | select FSL_LAW |
63659ff3 YS |
620 | select SYS_FSL_ERRATUM_A004508 |
621 | select SYS_FSL_ERRATUM_A005125 | |
622 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 623 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 624 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 625 | select SYS_FSL_HAS_SEC |
90b80386 | 626 | select SYS_FSL_SEC_BE |
2c2e2c9e | 627 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 628 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 629 | select FSL_ELBC |
a990799d | 630 | |
feb9e25b YS |
631 | config ARCH_P1022 |
632 | bool | |
05cb79a7 | 633 | select FSL_LAW |
63659ff3 YS |
634 | select SYS_FSL_ERRATUM_A004477 |
635 | select SYS_FSL_ERRATUM_A004508 | |
636 | select SYS_FSL_ERRATUM_A005125 | |
637 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 638 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 639 | select SYS_FSL_ERRATUM_SATA_A001 |
d26e34c4 | 640 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 641 | select SYS_FSL_HAS_SEC |
90b80386 | 642 | select SYS_FSL_SEC_BE |
2c2e2c9e | 643 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 644 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 645 | select FSL_ELBC |
feb9e25b | 646 | |
9bb1d6bc YS |
647 | config ARCH_P1023 |
648 | bool | |
05cb79a7 | 649 | select FSL_LAW |
63659ff3 YS |
650 | select SYS_FSL_ERRATUM_A004508 |
651 | select SYS_FSL_ERRATUM_A005125 | |
652 | select SYS_FSL_ERRATUM_I2C_A004447 | |
d26e34c4 | 653 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 654 | select SYS_FSL_HAS_SEC |
90b80386 | 655 | select SYS_FSL_SEC_BE |
2c2e2c9e | 656 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 657 | select FSL_ELBC |
9bb1d6bc | 658 | |
52b6f13d YS |
659 | config ARCH_P1024 |
660 | bool | |
05cb79a7 | 661 | select FSL_LAW |
63659ff3 YS |
662 | select SYS_FSL_ERRATUM_A004508 |
663 | select SYS_FSL_ERRATUM_A005125 | |
664 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 665 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 666 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 667 | select SYS_FSL_HAS_SEC |
90b80386 | 668 | select SYS_FSL_SEC_BE |
2c2e2c9e | 669 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 670 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 671 | select FSL_ELBC |
a1dc980d | 672 | imply CMD_EEPROM |
52b6f13d | 673 | |
4167a67d YS |
674 | config ARCH_P1025 |
675 | bool | |
05cb79a7 | 676 | select FSL_LAW |
63659ff3 YS |
677 | select SYS_FSL_ERRATUM_A004508 |
678 | select SYS_FSL_ERRATUM_A005125 | |
679 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a | 680 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 681 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 682 | select SYS_FSL_HAS_SEC |
90b80386 | 683 | select SYS_FSL_SEC_BE |
2c2e2c9e | 684 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 685 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 686 | select FSL_ELBC |
4167a67d | 687 | |
4593637b YS |
688 | config ARCH_P2020 |
689 | bool | |
05cb79a7 | 690 | select FSL_LAW |
63659ff3 YS |
691 | select SYS_FSL_ERRATUM_A004477 |
692 | select SYS_FSL_ERRATUM_A004508 | |
693 | select SYS_FSL_ERRATUM_A005125 | |
c01e4a1a YS |
694 | select SYS_FSL_ERRATUM_ESDHC111 |
695 | select SYS_FSL_ERRATUM_ESDHC_A001 | |
d26e34c4 | 696 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 697 | select SYS_FSL_HAS_SEC |
90b80386 | 698 | select SYS_FSL_SEC_BE |
2c2e2c9e | 699 | select SYS_FSL_SEC_COMPAT_2 |
53c95384 | 700 | select SYS_PPC_E500_USE_DEBUG_TLB |
06878977 | 701 | select FSL_ELBC |
a1dc980d | 702 | imply CMD_EEPROM |
4593637b | 703 | |
ce040c83 YS |
704 | config ARCH_P2041 |
705 | bool | |
f8dee360 | 706 | select E500MC |
05cb79a7 | 707 | select FSL_LAW |
63659ff3 YS |
708 | select SYS_FSL_ERRATUM_A004510 |
709 | select SYS_FSL_ERRATUM_A004849 | |
710 | select SYS_FSL_ERRATUM_A006261 | |
711 | select SYS_FSL_ERRATUM_CPU_A003999 | |
712 | select SYS_FSL_ERRATUM_DDR_A003 | |
713 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 714 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
715 | select SYS_FSL_ERRATUM_I2C_A004447 |
716 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
717 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
718 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 719 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 720 | select SYS_FSL_HAS_SEC |
7371774a | 721 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 722 | select SYS_FSL_SEC_BE |
2c2e2c9e | 723 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 724 | select FSL_ELBC |
ce040c83 | 725 | |
5e5fdd2d YS |
726 | config ARCH_P3041 |
727 | bool | |
f8dee360 | 728 | select E500MC |
05cb79a7 | 729 | select FSL_LAW |
22120f11 | 730 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
731 | select SYS_FSL_ERRATUM_A004510 |
732 | select SYS_FSL_ERRATUM_A004849 | |
733 | select SYS_FSL_ERRATUM_A005812 | |
734 | select SYS_FSL_ERRATUM_A006261 | |
735 | select SYS_FSL_ERRATUM_CPU_A003999 | |
736 | select SYS_FSL_ERRATUM_DDR_A003 | |
737 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 738 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
739 | select SYS_FSL_ERRATUM_I2C_A004447 |
740 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
741 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
742 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 743 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 744 | select SYS_FSL_HAS_SEC |
7371774a | 745 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 746 | select SYS_FSL_SEC_BE |
2c2e2c9e | 747 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 748 | select FSL_ELBC |
5e5fdd2d | 749 | |
e71372cb YS |
750 | config ARCH_P4080 |
751 | bool | |
f8dee360 | 752 | select E500MC |
05cb79a7 | 753 | select FSL_LAW |
22120f11 | 754 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
755 | select SYS_FSL_ERRATUM_A004510 |
756 | select SYS_FSL_ERRATUM_A004580 | |
757 | select SYS_FSL_ERRATUM_A004849 | |
758 | select SYS_FSL_ERRATUM_A005812 | |
759 | select SYS_FSL_ERRATUM_A007075 | |
760 | select SYS_FSL_ERRATUM_CPC_A002 | |
761 | select SYS_FSL_ERRATUM_CPC_A003 | |
762 | select SYS_FSL_ERRATUM_CPU_A003999 | |
763 | select SYS_FSL_ERRATUM_DDR_A003 | |
764 | select SYS_FSL_ERRATUM_DDR_A003474 | |
765 | select SYS_FSL_ERRATUM_ELBC_A001 | |
c01e4a1a YS |
766 | select SYS_FSL_ERRATUM_ESDHC111 |
767 | select SYS_FSL_ERRATUM_ESDHC13 | |
768 | select SYS_FSL_ERRATUM_ESDHC135 | |
63659ff3 YS |
769 | select SYS_FSL_ERRATUM_I2C_A004447 |
770 | select SYS_FSL_ERRATUM_NMG_CPU_A011 | |
771 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
772 | select SYS_P4080_ERRATUM_CPU22 | |
773 | select SYS_P4080_ERRATUM_PCIE_A003 | |
774 | select SYS_P4080_ERRATUM_SERDES8 | |
775 | select SYS_P4080_ERRATUM_SERDES9 | |
776 | select SYS_P4080_ERRATUM_SERDES_A001 | |
777 | select SYS_P4080_ERRATUM_SERDES_A005 | |
d26e34c4 | 778 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 779 | select SYS_FSL_HAS_SEC |
7371774a | 780 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 781 | select SYS_FSL_SEC_BE |
2c2e2c9e | 782 | select SYS_FSL_SEC_COMPAT_4 |
06878977 | 783 | select FSL_ELBC |
e71372cb | 784 | |
cefe11cd YS |
785 | config ARCH_P5020 |
786 | bool | |
f8dee360 | 787 | select E500MC |
05cb79a7 | 788 | select FSL_LAW |
22120f11 | 789 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
790 | select SYS_FSL_ERRATUM_A004510 |
791 | select SYS_FSL_ERRATUM_A006261 | |
792 | select SYS_FSL_ERRATUM_DDR_A003 | |
793 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 794 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 YS |
795 | select SYS_FSL_ERRATUM_I2C_A004447 |
796 | select SYS_FSL_ERRATUM_SRIO_A004034 | |
797 | select SYS_FSL_ERRATUM_USB14 | |
d26e34c4 | 798 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 799 | select SYS_FSL_HAS_SEC |
7371774a | 800 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 801 | select SYS_FSL_SEC_BE |
2c2e2c9e | 802 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 803 | select SYS_PPC64 |
06878977 | 804 | select FSL_ELBC |
cefe11cd | 805 | |
95390360 YS |
806 | config ARCH_P5040 |
807 | bool | |
f8dee360 | 808 | select E500MC |
05cb79a7 | 809 | select FSL_LAW |
22120f11 | 810 | select SYS_FSL_DDR_VER_44 |
63659ff3 YS |
811 | select SYS_FSL_ERRATUM_A004510 |
812 | select SYS_FSL_ERRATUM_A004699 | |
813 | select SYS_FSL_ERRATUM_A005812 | |
814 | select SYS_FSL_ERRATUM_A006261 | |
815 | select SYS_FSL_ERRATUM_DDR_A003 | |
816 | select SYS_FSL_ERRATUM_DDR_A003474 | |
c01e4a1a | 817 | select SYS_FSL_ERRATUM_ESDHC111 |
63659ff3 | 818 | select SYS_FSL_ERRATUM_USB14 |
d26e34c4 | 819 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 820 | select SYS_FSL_HAS_SEC |
7371774a | 821 | select SYS_FSL_QORIQ_CHASSIS1 |
90b80386 | 822 | select SYS_FSL_SEC_BE |
2c2e2c9e | 823 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 824 | select SYS_PPC64 |
06878977 | 825 | select FSL_ELBC |
95390360 | 826 | |
10343403 YS |
827 | config ARCH_QEMU_E500 |
828 | bool | |
829 | ||
5ff3f41d YS |
830 | config ARCH_T1023 |
831 | bool | |
f8dee360 | 832 | select E500MC |
05cb79a7 | 833 | select FSL_LAW |
22120f11 | 834 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
835 | select SYS_FSL_ERRATUM_A008378 |
836 | select SYS_FSL_ERRATUM_A009663 | |
837 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 838 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
839 | select SYS_FSL_HAS_DDR3 |
840 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 841 | select SYS_FSL_HAS_SEC |
7371774a | 842 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 843 | select SYS_FSL_SEC_BE |
2c2e2c9e | 844 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 845 | select FSL_IFC |
a1dc980d | 846 | imply CMD_EEPROM |
5ff3f41d | 847 | |
e5d5f5a8 YS |
848 | config ARCH_T1024 |
849 | bool | |
f8dee360 | 850 | select E500MC |
05cb79a7 | 851 | select FSL_LAW |
22120f11 | 852 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
853 | select SYS_FSL_ERRATUM_A008378 |
854 | select SYS_FSL_ERRATUM_A009663 | |
855 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 856 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
857 | select SYS_FSL_HAS_DDR3 |
858 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 859 | select SYS_FSL_HAS_SEC |
7371774a | 860 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 861 | select SYS_FSL_SEC_BE |
2c2e2c9e | 862 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 863 | select FSL_IFC |
a1dc980d | 864 | imply CMD_EEPROM |
e5d5f5a8 | 865 | |
5d737010 YS |
866 | config ARCH_T1040 |
867 | bool | |
f8dee360 | 868 | select E500MC |
05cb79a7 | 869 | select FSL_LAW |
22120f11 | 870 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
871 | select SYS_FSL_ERRATUM_A008044 |
872 | select SYS_FSL_ERRATUM_A008378 | |
873 | select SYS_FSL_ERRATUM_A009663 | |
874 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 875 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
876 | select SYS_FSL_HAS_DDR3 |
877 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 878 | select SYS_FSL_HAS_SEC |
7371774a | 879 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 880 | select SYS_FSL_SEC_BE |
2c2e2c9e | 881 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 882 | select FSL_IFC |
5d737010 | 883 | |
5449c98a YS |
884 | config ARCH_T1042 |
885 | bool | |
f8dee360 | 886 | select E500MC |
05cb79a7 | 887 | select FSL_LAW |
22120f11 | 888 | select SYS_FSL_DDR_VER_50 |
63659ff3 YS |
889 | select SYS_FSL_ERRATUM_A008044 |
890 | select SYS_FSL_ERRATUM_A008378 | |
891 | select SYS_FSL_ERRATUM_A009663 | |
892 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 893 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 YS |
894 | select SYS_FSL_HAS_DDR3 |
895 | select SYS_FSL_HAS_DDR4 | |
2c2e2c9e | 896 | select SYS_FSL_HAS_SEC |
7371774a | 897 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 898 | select SYS_FSL_SEC_BE |
2c2e2c9e | 899 | select SYS_FSL_SEC_COMPAT_5 |
d98b98d6 | 900 | select FSL_IFC |
5449c98a | 901 | |
0f3d80e9 YS |
902 | config ARCH_T2080 |
903 | bool | |
f8dee360 | 904 | select E500MC |
9ec10107 | 905 | select E6500 |
05cb79a7 | 906 | select FSL_LAW |
22120f11 | 907 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
908 | select SYS_FSL_ERRATUM_A006379 |
909 | select SYS_FSL_ERRATUM_A006593 | |
910 | select SYS_FSL_ERRATUM_A007186 | |
911 | select SYS_FSL_ERRATUM_A007212 | |
09bfd962 | 912 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 913 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 914 | select SYS_FSL_ERRATUM_A009942 |
c01e4a1a | 915 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 916 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 917 | select SYS_FSL_HAS_SEC |
7371774a | 918 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 919 | select SYS_FSL_SEC_BE |
2c2e2c9e | 920 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 921 | select SYS_PPC64 |
d98b98d6 | 922 | select FSL_IFC |
0f3d80e9 YS |
923 | |
924 | config ARCH_T2081 | |
925 | bool | |
f8dee360 | 926 | select E500MC |
9ec10107 | 927 | select E6500 |
05cb79a7 | 928 | select FSL_LAW |
22120f11 | 929 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
930 | select SYS_FSL_ERRATUM_A006379 |
931 | select SYS_FSL_ERRATUM_A006593 | |
932 | select SYS_FSL_ERRATUM_A007186 | |
933 | select SYS_FSL_ERRATUM_A007212 | |
934 | select SYS_FSL_ERRATUM_A009942 | |
c01e4a1a | 935 | select SYS_FSL_ERRATUM_ESDHC111 |
d26e34c4 | 936 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 937 | select SYS_FSL_HAS_SEC |
7371774a | 938 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 939 | select SYS_FSL_SEC_BE |
2c2e2c9e | 940 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 941 | select SYS_PPC64 |
d98b98d6 | 942 | select FSL_IFC |
0f3d80e9 | 943 | |
652a7bbd YS |
944 | config ARCH_T4160 |
945 | bool | |
f8dee360 | 946 | select E500MC |
9ec10107 | 947 | select E6500 |
05cb79a7 | 948 | select FSL_LAW |
22120f11 | 949 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
950 | select SYS_FSL_ERRATUM_A004468 |
951 | select SYS_FSL_ERRATUM_A005871 | |
952 | select SYS_FSL_ERRATUM_A006379 | |
953 | select SYS_FSL_ERRATUM_A006593 | |
954 | select SYS_FSL_ERRATUM_A007186 | |
955 | select SYS_FSL_ERRATUM_A007798 | |
956 | select SYS_FSL_ERRATUM_A009942 | |
d26e34c4 | 957 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 958 | select SYS_FSL_HAS_SEC |
7371774a | 959 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 960 | select SYS_FSL_SEC_BE |
2c2e2c9e | 961 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 962 | select SYS_PPC64 |
d98b98d6 | 963 | select FSL_IFC |
652a7bbd | 964 | |
26bc57da YS |
965 | config ARCH_T4240 |
966 | bool | |
f8dee360 | 967 | select E500MC |
9ec10107 | 968 | select E6500 |
05cb79a7 | 969 | select FSL_LAW |
22120f11 | 970 | select SYS_FSL_DDR_VER_47 |
63659ff3 YS |
971 | select SYS_FSL_ERRATUM_A004468 |
972 | select SYS_FSL_ERRATUM_A005871 | |
973 | select SYS_FSL_ERRATUM_A006261 | |
974 | select SYS_FSL_ERRATUM_A006379 | |
975 | select SYS_FSL_ERRATUM_A006593 | |
976 | select SYS_FSL_ERRATUM_A007186 | |
977 | select SYS_FSL_ERRATUM_A007798 | |
09bfd962 | 978 | select SYS_FSL_ERRATUM_A007815 |
06ad970b | 979 | select SYS_FSL_ERRATUM_A007907 |
63659ff3 | 980 | select SYS_FSL_ERRATUM_A009942 |
d26e34c4 | 981 | select SYS_FSL_HAS_DDR3 |
2c2e2c9e | 982 | select SYS_FSL_HAS_SEC |
7371774a | 983 | select SYS_FSL_QORIQ_CHASSIS2 |
90b80386 | 984 | select SYS_FSL_SEC_BE |
2c2e2c9e | 985 | select SYS_FSL_SEC_COMPAT_4 |
4851278e | 986 | select SYS_PPC64 |
d98b98d6 | 987 | select FSL_IFC |
05cb79a7 | 988 | |
f8dee360 YS |
989 | config BOOKE |
990 | bool | |
991 | default y | |
992 | ||
993 | config E500 | |
994 | bool | |
995 | default y | |
996 | help | |
997 | Enable PowerPC E500 cores, including e500v1, e500v2, e500mc | |
998 | ||
999 | config E500MC | |
1000 | bool | |
1001 | help | |
1002 | Enble PowerPC E500MC core | |
1003 | ||
9ec10107 YS |
1004 | config E6500 |
1005 | bool | |
1006 | help | |
1007 | Enable PowerPC E6500 core | |
1008 | ||
05cb79a7 YS |
1009 | config FSL_LAW |
1010 | bool | |
1011 | help | |
1012 | Use Freescale common code for Local Access Window | |
26bc57da | 1013 | |
c6e6bda3 YS |
1014 | config SECURE_BOOT |
1015 | bool "Secure Boot" | |
1016 | help | |
1017 | Enable Freescale Secure Boot feature. Normally selected | |
1018 | by defconfig. If unsure, do not change. | |
1019 | ||
3f82b56d YS |
1020 | config MAX_CPUS |
1021 | int "Maximum number of CPUs permitted for MPC85xx" | |
1022 | default 12 if ARCH_T4240 | |
1023 | default 8 if ARCH_P4080 || \ | |
1024 | ARCH_T4160 | |
1025 | default 4 if ARCH_B4860 || \ | |
1026 | ARCH_P2041 || \ | |
1027 | ARCH_P3041 || \ | |
1028 | ARCH_P5040 || \ | |
1029 | ARCH_T1040 || \ | |
1030 | ARCH_T1042 || \ | |
1031 | ARCH_T2080 || \ | |
1032 | ARCH_T2081 | |
1033 | default 2 if ARCH_B4420 || \ | |
1034 | ARCH_BSC9132 || \ | |
1035 | ARCH_MPC8572 || \ | |
1036 | ARCH_P1020 || \ | |
1037 | ARCH_P1021 || \ | |
1038 | ARCH_P1022 || \ | |
1039 | ARCH_P1023 || \ | |
1040 | ARCH_P1024 || \ | |
1041 | ARCH_P1025 || \ | |
1042 | ARCH_P2020 || \ | |
1043 | ARCH_P5020 || \ | |
3f82b56d YS |
1044 | ARCH_T1023 || \ |
1045 | ARCH_T1024 | |
1046 | default 1 | |
1047 | help | |
1048 | Set this number to the maximum number of possible CPUs in the SoC. | |
1049 | SoCs may have multiple clusters with each cluster may have multiple | |
1050 | ports. If some ports are reserved but higher ports are used for | |
1051 | cores, count the reserved ports. This will allocate enough memory | |
1052 | in spin table to properly handle all cores. | |
1053 | ||
830fc1bf YS |
1054 | config SYS_CCSRBAR_DEFAULT |
1055 | hex "Default CCSRBAR address" | |
1056 | default 0xff700000 if ARCH_BSC9131 || \ | |
1057 | ARCH_BSC9132 || \ | |
1058 | ARCH_C29X || \ | |
1059 | ARCH_MPC8536 || \ | |
1060 | ARCH_MPC8540 || \ | |
1061 | ARCH_MPC8541 || \ | |
1062 | ARCH_MPC8544 || \ | |
1063 | ARCH_MPC8548 || \ | |
1064 | ARCH_MPC8555 || \ | |
1065 | ARCH_MPC8560 || \ | |
1066 | ARCH_MPC8568 || \ | |
1067 | ARCH_MPC8569 || \ | |
1068 | ARCH_MPC8572 || \ | |
1069 | ARCH_P1010 || \ | |
1070 | ARCH_P1011 || \ | |
1071 | ARCH_P1020 || \ | |
1072 | ARCH_P1021 || \ | |
1073 | ARCH_P1022 || \ | |
1074 | ARCH_P1024 || \ | |
1075 | ARCH_P1025 || \ | |
1076 | ARCH_P2020 | |
1077 | default 0xff600000 if ARCH_P1023 | |
1078 | default 0xfe000000 if ARCH_B4420 || \ | |
1079 | ARCH_B4860 || \ | |
1080 | ARCH_P2041 || \ | |
1081 | ARCH_P3041 || \ | |
1082 | ARCH_P4080 || \ | |
1083 | ARCH_P5020 || \ | |
1084 | ARCH_P5040 || \ | |
830fc1bf YS |
1085 | ARCH_T1023 || \ |
1086 | ARCH_T1024 || \ | |
1087 | ARCH_T1040 || \ | |
1088 | ARCH_T1042 || \ | |
1089 | ARCH_T2080 || \ | |
1090 | ARCH_T2081 || \ | |
1091 | ARCH_T4160 || \ | |
1092 | ARCH_T4240 | |
1093 | default 0xe0000000 if ARCH_QEMU_E500 | |
1094 | help | |
1095 | Default value of CCSRBAR comes from power-on-reset. It | |
1096 | is fixed on each SoC. Some SoCs can have different value | |
1097 | if changed by pre-boot regime. The value here must match | |
1098 | the current value in SoC. If not sure, do not change. | |
1099 | ||
63659ff3 YS |
1100 | config SYS_FSL_ERRATUM_A004468 |
1101 | bool | |
1102 | ||
1103 | config SYS_FSL_ERRATUM_A004477 | |
1104 | bool | |
1105 | ||
1106 | config SYS_FSL_ERRATUM_A004508 | |
1107 | bool | |
1108 | ||
1109 | config SYS_FSL_ERRATUM_A004580 | |
1110 | bool | |
1111 | ||
1112 | config SYS_FSL_ERRATUM_A004699 | |
1113 | bool | |
1114 | ||
1115 | config SYS_FSL_ERRATUM_A004849 | |
1116 | bool | |
1117 | ||
1118 | config SYS_FSL_ERRATUM_A004510 | |
1119 | bool | |
1120 | ||
1121 | config SYS_FSL_ERRATUM_A004510_SVR_REV | |
1122 | hex | |
1123 | depends on SYS_FSL_ERRATUM_A004510 | |
1124 | default 0x20 if ARCH_P4080 | |
1125 | default 0x10 | |
1126 | ||
1127 | config SYS_FSL_ERRATUM_A004510_SVR_REV2 | |
1128 | hex | |
1129 | depends on (SYS_FSL_ERRATUM_A004510 && (ARCH_P2041 || ARCH_P3041)) | |
1130 | default 0x11 | |
1131 | ||
1132 | config SYS_FSL_ERRATUM_A005125 | |
1133 | bool | |
1134 | ||
1135 | config SYS_FSL_ERRATUM_A005434 | |
1136 | bool | |
1137 | ||
1138 | config SYS_FSL_ERRATUM_A005812 | |
1139 | bool | |
1140 | ||
1141 | config SYS_FSL_ERRATUM_A005871 | |
1142 | bool | |
1143 | ||
1144 | config SYS_FSL_ERRATUM_A006261 | |
1145 | bool | |
1146 | ||
1147 | config SYS_FSL_ERRATUM_A006379 | |
1148 | bool | |
1149 | ||
1150 | config SYS_FSL_ERRATUM_A006384 | |
1151 | bool | |
1152 | ||
1153 | config SYS_FSL_ERRATUM_A006475 | |
1154 | bool | |
1155 | ||
1156 | config SYS_FSL_ERRATUM_A006593 | |
1157 | bool | |
1158 | ||
1159 | config SYS_FSL_ERRATUM_A007075 | |
1160 | bool | |
1161 | ||
1162 | config SYS_FSL_ERRATUM_A007186 | |
1163 | bool | |
1164 | ||
1165 | config SYS_FSL_ERRATUM_A007212 | |
1166 | bool | |
1167 | ||
09bfd962 TB |
1168 | config SYS_FSL_ERRATUM_A007815 |
1169 | bool | |
1170 | ||
63659ff3 YS |
1171 | config SYS_FSL_ERRATUM_A007798 |
1172 | bool | |
1173 | ||
06ad970b DD |
1174 | config SYS_FSL_ERRATUM_A007907 |
1175 | bool | |
1176 | ||
63659ff3 YS |
1177 | config SYS_FSL_ERRATUM_A008044 |
1178 | bool | |
1179 | ||
1180 | config SYS_FSL_ERRATUM_CPC_A002 | |
1181 | bool | |
1182 | ||
1183 | config SYS_FSL_ERRATUM_CPC_A003 | |
1184 | bool | |
1185 | ||
1186 | config SYS_FSL_ERRATUM_CPU_A003999 | |
1187 | bool | |
1188 | ||
1189 | config SYS_FSL_ERRATUM_ELBC_A001 | |
1190 | bool | |
1191 | ||
1192 | config SYS_FSL_ERRATUM_I2C_A004447 | |
1193 | bool | |
1194 | ||
1195 | config SYS_FSL_A004447_SVR_REV | |
1196 | hex | |
1197 | depends on SYS_FSL_ERRATUM_I2C_A004447 | |
1198 | default 0x00 if ARCH_MPC8548 | |
1199 | default 0x10 if ARCH_P1010 | |
1200 | default 0x11 if ARCH_P1023 || ARCH_P2041 || ARCH_BSC9132 | |
1201 | default 0x20 if ARCH_P3041 || ARCH_P4080 || ARCH_P5020 | |
1202 | ||
1203 | config SYS_FSL_ERRATUM_IFC_A002769 | |
1204 | bool | |
1205 | ||
1206 | config SYS_FSL_ERRATUM_IFC_A003399 | |
1207 | bool | |
1208 | ||
1209 | config SYS_FSL_ERRATUM_NMG_CPU_A011 | |
1210 | bool | |
1211 | ||
1212 | config SYS_FSL_ERRATUM_NMG_ETSEC129 | |
1213 | bool | |
1214 | ||
1215 | config SYS_FSL_ERRATUM_NMG_LBC103 | |
1216 | bool | |
1217 | ||
1218 | config SYS_FSL_ERRATUM_P1010_A003549 | |
1219 | bool | |
1220 | ||
1221 | config SYS_FSL_ERRATUM_SATA_A001 | |
1222 | bool | |
1223 | ||
1224 | config SYS_FSL_ERRATUM_SEC_A003571 | |
1225 | bool | |
1226 | ||
1227 | config SYS_FSL_ERRATUM_SRIO_A004034 | |
1228 | bool | |
1229 | ||
1230 | config SYS_FSL_ERRATUM_USB14 | |
1231 | bool | |
1232 | ||
1233 | config SYS_P4080_ERRATUM_CPU22 | |
1234 | bool | |
1235 | ||
1236 | config SYS_P4080_ERRATUM_PCIE_A003 | |
1237 | bool | |
1238 | ||
1239 | config SYS_P4080_ERRATUM_SERDES8 | |
1240 | bool | |
1241 | ||
1242 | config SYS_P4080_ERRATUM_SERDES9 | |
1243 | bool | |
1244 | ||
1245 | config SYS_P4080_ERRATUM_SERDES_A001 | |
1246 | bool | |
1247 | ||
1248 | config SYS_P4080_ERRATUM_SERDES_A005 | |
1249 | bool | |
1250 | ||
7371774a YS |
1251 | config SYS_FSL_QORIQ_CHASSIS1 |
1252 | bool | |
1253 | ||
1254 | config SYS_FSL_QORIQ_CHASSIS2 | |
1255 | bool | |
1256 | ||
8303acbc YS |
1257 | config SYS_FSL_NUM_LAWS |
1258 | int "Number of local access windows" | |
1259 | depends on FSL_LAW | |
1260 | default 32 if ARCH_B4420 || \ | |
1261 | ARCH_B4860 || \ | |
1262 | ARCH_P2041 || \ | |
1263 | ARCH_P3041 || \ | |
1264 | ARCH_P4080 || \ | |
1265 | ARCH_P5020 || \ | |
1266 | ARCH_P5040 || \ | |
1267 | ARCH_T2080 || \ | |
1268 | ARCH_T2081 || \ | |
1269 | ARCH_T4160 || \ | |
1270 | ARCH_T4240 | |
08a37fd1 | 1271 | default 16 if ARCH_T1023 || \ |
8303acbc YS |
1272 | ARCH_T1024 || \ |
1273 | ARCH_T1040 || \ | |
1274 | ARCH_T1042 | |
1275 | default 12 if ARCH_BSC9131 || \ | |
1276 | ARCH_BSC9132 || \ | |
1277 | ARCH_C29X || \ | |
1278 | ARCH_MPC8536 || \ | |
1279 | ARCH_MPC8572 || \ | |
1280 | ARCH_P1010 || \ | |
1281 | ARCH_P1011 || \ | |
1282 | ARCH_P1020 || \ | |
1283 | ARCH_P1021 || \ | |
1284 | ARCH_P1022 || \ | |
1285 | ARCH_P1023 || \ | |
1286 | ARCH_P1024 || \ | |
1287 | ARCH_P1025 || \ | |
1288 | ARCH_P2020 | |
1289 | default 10 if ARCH_MPC8544 || \ | |
1290 | ARCH_MPC8548 || \ | |
1291 | ARCH_MPC8568 || \ | |
1292 | ARCH_MPC8569 | |
1293 | default 8 if ARCH_MPC8540 || \ | |
1294 | ARCH_MPC8541 || \ | |
1295 | ARCH_MPC8555 || \ | |
1296 | ARCH_MPC8560 | |
1297 | help | |
1298 | Number of local access windows. This is fixed per SoC. | |
1299 | If not sure, do not change. | |
1300 | ||
9ec10107 YS |
1301 | config SYS_FSL_THREADS_PER_CORE |
1302 | int | |
1303 | default 2 if E6500 | |
1304 | default 1 | |
1305 | ||
26e79b65 YS |
1306 | config SYS_NUM_TLBCAMS |
1307 | int "Number of TLB CAM entries" | |
1308 | default 64 if E500MC | |
1309 | default 16 | |
1310 | help | |
1311 | Number of TLB CAM entries for Book-E chips. 64 for E500MC, | |
1312 | 16 for other E500 SoCs. | |
1313 | ||
4851278e YS |
1314 | config SYS_PPC64 |
1315 | bool | |
1316 | ||
53c95384 YS |
1317 | config SYS_PPC_E500_USE_DEBUG_TLB |
1318 | bool | |
1319 | ||
d98b98d6 PK |
1320 | config FSL_IFC |
1321 | bool | |
1322 | ||
06878977 PK |
1323 | config FSL_ELBC |
1324 | bool | |
1325 | ||
53c95384 YS |
1326 | config SYS_PPC_E500_DEBUG_TLB |
1327 | int "Temporary TLB entry for external debugger" | |
1328 | depends on SYS_PPC_E500_USE_DEBUG_TLB | |
1329 | default 0 if ARCH_MPC8544 || ARCH_MPC8548 | |
1330 | default 1 if ARCH_MPC8536 | |
1331 | default 2 if ARCH_MPC8572 || \ | |
1332 | ARCH_P1011 || \ | |
1333 | ARCH_P1020 || \ | |
1334 | ARCH_P1021 || \ | |
1335 | ARCH_P1022 || \ | |
1336 | ARCH_P1024 || \ | |
1337 | ARCH_P1025 || \ | |
1338 | ARCH_P2020 | |
1339 | default 3 if ARCH_P1010 || \ | |
1340 | ARCH_BSC9132 || \ | |
1341 | ARCH_C29X | |
1342 | help | |
1343 | Select a temporary TLB entry to be used during boot to work | |
1344 | around limitations in e500v1 and e500v2 external debugger | |
1345 | support. This reduces the portions of the boot code where | |
1346 | breakpoints and single stepping do not work. The value of this | |
1347 | symbol should be set to the TLB1 entry to be used for this | |
1348 | purpose. If unsure, do not change. | |
1349 | ||
1c40707e PK |
1350 | config SYS_FSL_IFC_CLK_DIV |
1351 | int "Divider of platform clock" | |
1352 | depends on FSL_IFC | |
1353 | default 2 if ARCH_B4420 || \ | |
1354 | ARCH_B4860 || \ | |
1355 | ARCH_T1024 || \ | |
1356 | ARCH_T1023 || \ | |
1357 | ARCH_T1040 || \ | |
1358 | ARCH_T1042 || \ | |
1359 | ARCH_T4160 || \ | |
1360 | ARCH_T4240 | |
1361 | default 1 | |
1362 | help | |
1363 | Defines divider of platform clock(clock input to | |
1364 | IFC controller). | |
1365 | ||
add63f94 PK |
1366 | config SYS_FSL_LBC_CLK_DIV |
1367 | int "Divider of platform clock" | |
1368 | depends on FSL_ELBC || ARCH_MPC8540 || \ | |
1369 | ARCH_MPC8548 || ARCH_MPC8541 || \ | |
1370 | ARCH_MPC8555 || ARCH_MPC8560 || \ | |
1371 | ARCH_MPC8568 | |
1372 | ||
1373 | default 2 if ARCH_P2041 || \ | |
1374 | ARCH_P3041 || \ | |
1375 | ARCH_P4080 || \ | |
1376 | ARCH_P5020 || \ | |
1377 | ARCH_P5040 | |
1378 | default 1 | |
1379 | ||
1380 | help | |
1381 | Defines divider of platform clock(clock input to | |
1382 | eLBC controller). | |
1383 | ||
dd84058d MY |
1384 | source "board/freescale/b4860qds/Kconfig" |
1385 | source "board/freescale/bsc9131rdb/Kconfig" | |
1386 | source "board/freescale/bsc9132qds/Kconfig" | |
1387 | source "board/freescale/c29xpcie/Kconfig" | |
1388 | source "board/freescale/corenet_ds/Kconfig" | |
1389 | source "board/freescale/mpc8536ds/Kconfig" | |
1390 | source "board/freescale/mpc8540ads/Kconfig" | |
1391 | source "board/freescale/mpc8541cds/Kconfig" | |
1392 | source "board/freescale/mpc8544ds/Kconfig" | |
1393 | source "board/freescale/mpc8548cds/Kconfig" | |
1394 | source "board/freescale/mpc8555cds/Kconfig" | |
1395 | source "board/freescale/mpc8560ads/Kconfig" | |
1396 | source "board/freescale/mpc8568mds/Kconfig" | |
1397 | source "board/freescale/mpc8569mds/Kconfig" | |
1398 | source "board/freescale/mpc8572ds/Kconfig" | |
1399 | source "board/freescale/p1010rdb/Kconfig" | |
1400 | source "board/freescale/p1022ds/Kconfig" | |
1401 | source "board/freescale/p1023rdb/Kconfig" | |
dd84058d MY |
1402 | source "board/freescale/p1_p2_rdb_pc/Kconfig" |
1403 | source "board/freescale/p1_twr/Kconfig" | |
dd84058d MY |
1404 | source "board/freescale/p2041rdb/Kconfig" |
1405 | source "board/freescale/qemu-ppce500/Kconfig" | |
aba80048 | 1406 | source "board/freescale/t102xqds/Kconfig" |
48c6f328 | 1407 | source "board/freescale/t102xrdb/Kconfig" |
dd84058d MY |
1408 | source "board/freescale/t1040qds/Kconfig" |
1409 | source "board/freescale/t104xrdb/Kconfig" | |
1410 | source "board/freescale/t208xqds/Kconfig" | |
1411 | source "board/freescale/t208xrdb/Kconfig" | |
1412 | source "board/freescale/t4qds/Kconfig" | |
1413 | source "board/freescale/t4rdb/Kconfig" | |
1414 | source "board/gdsys/p1022/Kconfig" | |
1415 | source "board/keymile/kmp204x/Kconfig" | |
1416 | source "board/sbc8548/Kconfig" | |
1417 | source "board/socrates/Kconfig" | |
87e29878 | 1418 | source "board/varisys/cyrus/Kconfig" |
dd84058d MY |
1419 | source "board/xes/xpedite520x/Kconfig" |
1420 | source "board/xes/xpedite537x/Kconfig" | |
1421 | source "board/xes/xpedite550x/Kconfig" | |
8b0044ff | 1422 | source "board/Arcturus/ucp1020/Kconfig" |
dd84058d MY |
1423 | |
1424 | endmenu |