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1 | /* |
2 | * Copyright 2010 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * See file CREDITS for list of people who contributed to this | |
5 | * project. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License as | |
9 | * published by the Free Software Foundation; either version 2 of | |
10 | * the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
20 | * MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | #include <config.h> | |
24 | #include <common.h> | |
25 | #include <asm/io.h> | |
26 | #include <asm/immap_85xx.h> | |
27 | #include <asm/fsl_serdes.h> | |
28 | ||
29 | #define SRDS1_MAX_LANES 8 | |
30 | ||
31 | static u32 serdes1_prtcl_map; | |
32 | ||
33 | static u8 serdes1_cfg_tbl[][SRDS1_MAX_LANES] = { | |
34 | [0x2] = {PCIE1, PCIE1, PCIE1, PCIE1, NONE, NONE, NONE, NONE}, | |
35 | [0x3] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE2, PCIE2}, | |
36 | [0x6] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, | |
37 | [0x7] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE2, PCIE2, PCIE3, PCIE3}, | |
38 | [0xb] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, | |
39 | [0xc] = {PCIE1, PCIE1, PCIE1, PCIE1, SRIO1, SRIO1, SRIO1, SRIO1}, | |
40 | [0xd] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, | |
41 | [0xe] = {NONE, NONE, NONE, NONE, SRIO1, SRIO1, SRIO1, SRIO1}, | |
42 | [0xf] = {PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1, PCIE1}, | |
43 | }; | |
44 | ||
45 | int is_serdes_configured(enum srds_prtcl prtcl) | |
46 | { | |
47 | return (1 << prtcl) & serdes1_prtcl_map; | |
48 | } | |
49 | ||
50 | void fsl_serdes_init(void) | |
51 | { | |
52 | ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); | |
53 | u32 pordevsr = in_be32(&gur->pordevsr); | |
54 | u32 srds_cfg = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> | |
55 | MPC85xx_PORDEVSR_IO_SEL_SHIFT; | |
56 | int lane; | |
57 | ||
58 | debug("PORDEVSR[IO_SEL_SRDS] = %x\n", srds_cfg); | |
59 | ||
60 | if (srds_cfg > ARRAY_SIZE(serdes1_cfg_tbl)) { | |
61 | printf("Invalid PORDEVSR[IO_SEL_SRDS] = %d\n", srds_cfg); | |
62 | return; | |
63 | } | |
64 | ||
65 | for (lane = 0; lane < SRDS1_MAX_LANES; lane++) { | |
66 | enum srds_prtcl lane_prtcl = serdes1_cfg_tbl[srds_cfg][lane]; | |
67 | serdes1_prtcl_map |= (1 << lane_prtcl); | |
68 | } | |
69 | ||
70 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS)) | |
71 | serdes1_prtcl_map |= (1 << SGMII_TSEC1); | |
72 | ||
73 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS)) | |
74 | serdes1_prtcl_map |= (1 << SGMII_TSEC2); | |
75 | ||
76 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS)) | |
77 | serdes1_prtcl_map |= (1 << SGMII_TSEC3); | |
78 | ||
79 | if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS)) | |
80 | serdes1_prtcl_map |= (1 << SGMII_TSEC4); | |
81 | } |