projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| c97cd1ba SW |
1 | /* |
| 2 | * (C) Copyright 2006 | |
| 3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de | |
| 4 | * | |
| 5 | * Copyright 2009 Freescale Semiconductor, Inc. | |
| 6 | * | |
| 1a459660 | 7 | * SPDX-License-Identifier: GPL-2.0+ |
| c97cd1ba SW |
8 | */ |
| 9 | ||
| 10 | #include "config.h" /* CONFIG_BOARDDIR */ | |
| 11 | ||
| 12 | OUTPUT_ARCH(powerpc) | |
| 5df572f0 YZ |
13 | #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC |
| 14 | PHDRS | |
| 15 | { | |
| 16 | text PT_LOAD; | |
| 17 | bss PT_LOAD; | |
| 18 | } | |
| 19 | #endif | |
| c97cd1ba SW |
20 | SECTIONS |
| 21 | { | |
| 22 | . = CONFIG_SPL_TEXT_BASE; | |
| 23 | .text : { | |
| 24 | *(.text*) | |
| 25 | } | |
| 26 | _etext = .; | |
| 27 | ||
| 28 | .reloc : { | |
| 29 | _GOT2_TABLE_ = .; | |
| 30 | KEEP(*(.got2)) | |
| 31 | KEEP(*(.got)) | |
| 32 | PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); | |
| 33 | _FIXUP_TABLE_ = .; | |
| 34 | KEEP(*(.fixup)) | |
| 35 | } | |
| 36 | __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; | |
| 37 | __fixup_entries = (. - _FIXUP_TABLE_) >> 2; | |
| 38 | ||
| 39 | . = ALIGN(8); | |
| 40 | .data : { | |
| 41 | *(.rodata*) | |
| 42 | *(.data*) | |
| 43 | *(.sdata*) | |
| 44 | } | |
| 45 | _edata = .; | |
| 46 | ||
| bb0dc108 YZ |
47 | . = .; |
| 48 | __start___ex_table = .; | |
| 49 | __ex_table : { *(__ex_table) } | |
| 50 | __stop___ex_table = .; | |
| 51 | ||
| c97cd1ba SW |
52 | . = ALIGN(8); |
| 53 | __init_begin = .; | |
| 54 | __init_end = .; | |
| 55 | /* FIXME for non-NAND SPL */ | |
| 56 | #if defined(CONFIG_FSL_IFC) /* Restrict bootpg at 4K boundry for IFC */ | |
| 57 | .bootpg ADDR(.text) + 0x1000 : | |
| 58 | { | |
| 3a88179d | 59 | arch/powerpc/cpu/mpc85xx/start.o (.bootpg) |
| c97cd1ba SW |
60 | } |
| 61 | #define RESET_VECTOR_OFFSET 0x1ffc /* IFC has 8K sram */ | |
| 62 | #elif defined(CONFIG_FSL_ELBC) | |
| 63 | #define RESET_VECTOR_OFFSET 0xffc /* LBC has 4k sram */ | |
| 64 | #else | |
| 65 | #error unknown NAND controller | |
| 66 | #endif | |
| 5df572f0 YZ |
67 | #ifdef CONFIG_SYS_MPC85XX_NO_RESETVEC |
| 68 | .bootpg ADDR(.text) - 0x1000 : | |
| 69 | { | |
| 70 | KEEP(*(.bootpg)) | |
| 71 | } :text = 0xffff | |
| 72 | #else | |
| c97cd1ba SW |
73 | .resetvec ADDR(.text) + RESET_VECTOR_OFFSET : { |
| 74 | KEEP(*(.resetvec)) | |
| 75 | } = 0xffff | |
| 5df572f0 | 76 | #endif |
| c97cd1ba SW |
77 | |
| 78 | /* | |
| 79 | * Make sure that the bss segment isn't linked at 0x0, otherwise its | |
| 80 | * address won't be updated during relocation fixups. | |
| 81 | */ | |
| 82 | . |= 0x10; | |
| 83 | ||
| 67ad0d52 | 84 | . = ALIGN(4); |
| c97cd1ba SW |
85 | __bss_start = .; |
| 86 | .bss : { | |
| 87 | *(.sbss*) | |
| 88 | *(.bss*) | |
| 89 | } | |
| 67ad0d52 | 90 | . = ALIGN(4); |
| 3929fb0a | 91 | __bss_end = .; |
| c97cd1ba | 92 | } |