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debb7354 JL |
1 | /* |
2 | * (C) Copyright 2000-2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * (C) Copyright 2002 (440 port) | |
6 | * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com | |
7 | * | |
8 | * (C) Copyright 2003 Motorola Inc. (MPC85xx port) | |
9 | * Xianghua Xiao (X.Xiao@motorola.com) | |
10 | * | |
cfc7a7f5 | 11 | * (C) Copyright 2004, 2007 Freescale Semiconductor. (MPC86xx Port) |
c934f655 | 12 | * Jeff Brown |
debb7354 JL |
13 | * Srikanth Srinivasan (srikanth.srinivasan@freescale.com) |
14 | * | |
1a459660 | 15 | * SPDX-License-Identifier: GPL-2.0+ |
debb7354 JL |
16 | */ |
17 | ||
18 | #include <common.h> | |
19 | #include <mpc86xx.h> | |
20 | #include <command.h> | |
21 | #include <asm/processor.h> | |
cc1dd33f JS |
22 | #ifdef CONFIG_POST |
23 | #include <post.h> | |
24 | #endif | |
debb7354 | 25 | |
cdd917a4 | 26 | int interrupt_init_cpu(unsigned long *decrementer_count) |
debb7354 | 27 | { |
6d0f6bcf | 28 | volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
5c7cbcd3 | 29 | volatile ccsr_pic_t *pic = &immr->im_pic; |
debb7354 | 30 | |
cc1dd33f JS |
31 | #ifdef CONFIG_POST |
32 | /* | |
33 | * The POST word is stored in the PIC's TFRR register which gets | |
34 | * cleared when the PIC is reset. Save it off so we can restore it | |
35 | * later. | |
36 | */ | |
37 | ulong post_word = post_word_load(); | |
38 | #endif | |
39 | ||
5c7cbcd3 KG |
40 | pic->gcr = MPC86xx_PICGCR_RST; |
41 | while (pic->gcr & MPC86xx_PICGCR_RST) | |
42 | ; | |
43 | pic->gcr = MPC86xx_PICGCR_MODE; | |
debb7354 | 44 | |
6d0f6bcf | 45 | *decrementer_count = get_tbclk() / CONFIG_SYS_HZ; |
7f2229b5 | 46 | debug("interrupt init: tbclk() = %ld MHz, decrementer_count = %ld\n", |
ffff3ae5 | 47 | (get_tbclk() / 1000000), |
5c7cbcd3 | 48 | *decrementer_count); |
5c9efb36 | 49 | |
cfc7a7f5 | 50 | #ifdef CONFIG_INTERRUPTS |
cfc7a7f5 JL |
51 | |
52 | pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */ | |
7f2229b5 | 53 | debug("iivpr1@%p = %x\n", &pic->iivpr1, pic->iivpr1); |
cfc7a7f5 JL |
54 | |
55 | pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */ | |
7f2229b5 | 56 | debug("iivpr2@%p = %x\n", &pic->iivpr2, pic->iivpr2); |
cfc7a7f5 JL |
57 | |
58 | pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */ | |
7f2229b5 | 59 | debug("iivpr3@%p = %x\n", &pic->iivpr3, pic->iivpr3); |
cfc7a7f5 JL |
60 | |
61 | #if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1) | |
62 | pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */ | |
7f2229b5 | 63 | debug("iivpr8@%p = %x\n", &pic->iivpr8, pic->iivpr8); |
cfc7a7f5 JL |
64 | #endif |
65 | #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2) | |
66 | pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */ | |
7f2229b5 | 67 | debug("iivpr9@%p = %x\n", &pic->iivpr9, pic->iivpr9); |
cfc7a7f5 JL |
68 | #endif |
69 | ||
70 | pic->ctpr = 0; /* 40080 clear current task priority register */ | |
71 | #endif | |
72 | ||
cc1dd33f JS |
73 | #ifdef CONFIG_POST |
74 | post_word_store(post_word); | |
75 | #endif | |
76 | ||
5c9efb36 | 77 | return 0; |
debb7354 JL |
78 | } |
79 | ||
debb7354 JL |
80 | /* |
81 | * timer_interrupt - gets called when the decrementer overflows, | |
82 | * with interrupts disabled. | |
83 | * Trivial implementation - no need to be really accurate. | |
84 | */ | |
ffff3ae5 | 85 | void timer_interrupt_cpu(struct pt_regs *regs) |
debb7354 JL |
86 | { |
87 | /* nothing to do here */ | |
debb7354 JL |
88 | } |
89 | ||
debb7354 JL |
90 | /* |
91 | * Install and free a interrupt handler. Not implemented yet. | |
92 | */ | |
ffff3ae5 | 93 | void irq_install_handler(int vec, interrupt_handler_t *handler, void *arg) |
debb7354 | 94 | { |
debb7354 JL |
95 | } |
96 | ||
ffff3ae5 | 97 | void irq_free_handler(int vec) |
debb7354 | 98 | { |
debb7354 JL |
99 | } |
100 | ||
c934f655 | 101 | /* |
debb7354 | 102 | * irqinfo - print information about PCI devices,not implemented. |
debb7354 | 103 | */ |
54841ab5 | 104 | int do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) |
debb7354 | 105 | { |
debb7354 JL |
106 | return 0; |
107 | } | |
108 | ||
109 | /* | |
110 | * Handle external interrupts | |
111 | */ | |
ffff3ae5 | 112 | void external_interrupt(struct pt_regs *regs) |
debb7354 JL |
113 | { |
114 | puts("external_interrupt (oops!)\n"); | |
115 | } |