[people/ms/u-boot.git] / arch / powerpc / cpu / ppc4xx / dcr.S

/*
 * (C) Copyright 2001
 * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com
 *
 * SPDX-License-Identifier:	GPL-2.0+ 
 */
#include <config.h>

#if defined(CONFIG_4xx) && defined(CONFIG_CMD_SETGETDCR)

#include <asm/ppc4xx.h>

#define _LINUX_CONFIG_H 1       /* avoid reading Linux autoconf.h file  */

#include <ppc_asm.tmpl>
#include <ppc_defs.h>

#include <asm/cache.h>
#include <asm/mmu.h>

#define _ASMLANGUAGE

/*****************************************************************************
 *
 *  XXX - DANGER
 *        These routines make use of self modifying code.  DO NOT CALL THEM
 *	  UNTIL THEY ARE RELOCATED TO RAM.  Additionally, I do not
 *	  recommend them for use in anything other than an interactive
 *        debugging environment.  This is mainly due to performance reasons.
 *
 ****************************************************************************/

/*
 * static void _create_MFDCR(unsigned short dcrn)
 *
 * Builds a 'mfdcr' instruction for get_dcr
 * function.
 */
		.section ".text"
		.align 2
		.type	 _create_MFDCR,@function
_create_MFDCR:
		/*
		 * Build up a 'mfdcr' instruction formatted as follows:
		 *
		 *  OPCD |   RT   |    DCRF      |     XO       | CR |
		 * ---------------|--------------|--------------|----|
		 * 0   5 | 6   10 | 11        20 | 21        30 | 31 |
		 *       |        |    DCRN      |              |    |
		 *   31  |  %r3   | (5..9|0..4)  |      323     |  0 |
		 *
		 * Where:
		 *	OPCD = opcode - 31
		 *	RT   = destination register - %r3 return register
		 *	DCRF = DCRN # with upper and lower halves swapped
		 *	XO   = extended opcode - 323
		 *	CR   = CR[CR0] NOT undefined - 0
		 */
		rlwinm	r0, r3, 27, 27, 31	/* OPCD = 31 */
		rlwinm	r3, r3, 5, 22, 26
		or	r3, r3, r0
		slwi	r3, r3, 10
		oris	r3, r3, 0x3e30		/* RT = %r3 */
		ori	r3, r3, 323		/* XO = 323 */
		slwi	r3, r3, 1		/* CR = 0 */

		mflr	r4
		stw	r3, 0(r4)		/* Store instr in get_dcr() */
		dcbst	r0, r4			/* Make sure val is written out */
		sync				/* Wait for write to complete */
		icbi	r0, r4			/* Make sure old instr is dumped */
		isync				/* Wait for icbi to complete */

		blr
.Lfe1:		.size	 _create_MFDCR,.Lfe1-_create_MFDCR
/* end _create_MFDCR() */

/*
 * static void _create_MTDCR(unsigned short dcrn, unsigned long value)
 *
 * Builds a 'mtdcr' instruction for set_dcr
 * function.
 */
		.section ".text"
		.align 2
		.type	 _create_MTDCR,@function
_create_MTDCR:
		/*
		 * Build up a 'mtdcr' instruction formatted as follows:
		 *
		 *  OPCD |   RS   |    DCRF      |     XO       | CR |
		 * ---------------|--------------|--------------|----|
		 * 0   5 | 6   10 | 11        20 | 21        30 | 31 |
		 *       |        |    DCRN      |              |    |
		 *   31  |  %r3   | (5..9|0..4)  |      451     |  0 |
		 *
		 * Where:
		 *	OPCD = opcode - 31
		 *	RS   = source register - %r4
		 *	DCRF = dest. DCRN # with upper and lower halves swapped
		 *	XO   = extended opcode - 451
		 *	CR   = CR[CR0] NOT undefined - 0
		 */
		rlwinm	r0, r3, 27, 27, 31	/* OPCD = 31 */
		rlwinm	r3, r3, 5, 22, 26
		or	r3, r3, r0
		slwi	r3, r3, 10
		oris	r3, r3, 0x3e40		/* RS = %r4 */
		ori	r3, r3, 451		/* XO = 451 */
		slwi	r3, r3, 1		/* CR = 0 */

		mflr	r5
		stw	r3, 0(r5)		/* Store instr in set_dcr() */
		dcbst	r0, r5			/* Make sure val is written out */
		sync				/* Wait for write to complete */
		icbi	r0, r5			/* Make sure old instr is dumped */
		isync				/* Wait for icbi to complete */

		blr
.Lfe2:		.size	 _create_MTDCR,.Lfe2-_create_MTDCR
/* end _create_MTDCR() */


/*
 * unsigned long get_dcr(unsigned short dcrn)
 *
 * Return a given DCR's value.
 */
		/* */
		/* XXX - This is self modifying code, hence */
		/* it is in the data section. */
		/* */
		.section ".data"
		.align	2
		.globl	get_dcr
		.type	get_dcr,@function
get_dcr:
		mflr	r0			/* Get link register */
		stwu	r1, -32(r1)		/* Save back chain and move SP */
		stw	r0, +36(r1)		/* Save link register */

		bl	_create_MFDCR		/* Build following instruction */
		/* XXX - we build this instuction up on the fly. */
		.long	0			/* Get DCR's value */

		lwz	r0, +36(r1)		/* Get saved link register */
		mtlr	r0			/* Restore link register */
		addi	r1, r1, +32		/* Remove frame from stack */
		blr				/* Return to calling function */
.Lfe3:		.size	get_dcr,.Lfe3-get_dcr
/* end get_dcr() */


/*
 * unsigned void set_dcr(unsigned short dcrn, unsigned long value)
 *
 * Return a given DCR's value.
 */
		/*
		 * XXX - This is self modifying code, hence
		 * it is in the data section.
		 */
		.section ".data"
		.align	2
		.globl	set_dcr
		.type	set_dcr,@function
set_dcr:
		mflr	r0			/* Get link register */
		stwu	r1, -32(r1)		/* Save back chain and move SP */
		stw	r0, +36(r1)		/* Save link register */

		bl	_create_MTDCR		/* Build following instruction */
		/* XXX - we build this instuction up on the fly. */
		.long	0			/* Set DCR's value */

		lwz	r0, +36(r1)		/* Get saved link register */
		mtlr	r0			/* Restore link register */
		addi	r1, r1, +32		/* Remove frame from stack */
		blr				/* Return to calling function */
.Lfe4:		.size	set_dcr,.Lfe4-set_dcr
/* end set_dcr() */
#endif
Commit	Line	Data
c74078f8 WD	1	/*
	2	* (C) Copyright 2001
	3	* Erik Theisen, Wave 7 Optics, etheisen@mindspring.com
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
c74078f8 WD	6	*/
	7	#include <config.h>
	8
3a1ed1e1	9	#if defined(CONFIG_4xx) && defined(CONFIG_CMD_SETGETDCR)
c74078f8	10
b36df561	11	#include <asm/ppc4xx.h>
c74078f8 WD	12
	13	#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
	14
	15	#include <ppc_asm.tmpl>
	16	#include <ppc_defs.h>
	17
	18	#include <asm/cache.h>
	19	#include <asm/mmu.h>
	20
	21	#define _ASMLANGUAGE
	22
	23	/*****************************************************************************
	24	*
	25	* XXX - DANGER
	26	* These routines make use of self modifying code. DO NOT CALL THEM
	27	* UNTIL THEY ARE RELOCATED TO RAM. Additionally, I do not
	28	* recommend them for use in anything other than an interactive
	29	* debugging environment. This is mainly due to performance reasons.
	30	*
	31	****************************************************************************/
	32
	33	/*
	34	* static void _create_MFDCR(unsigned short dcrn)
	35	*
	36	* Builds a 'mfdcr' instruction for get_dcr
	37	* function.
	38	*/
	39	.section ".text"
	40	.align 2
	41	.type _create_MFDCR,@function
	42	_create_MFDCR:
	43	/*
	44	* Build up a 'mfdcr' instruction formatted as follows:
	45	*
	46	* OPCD \| RT \| DCRF \| XO \| CR \|
	47	* ---------------\|--------------\|--------------\|----\|
	48	* 0 5 \| 6 10 \| 11 20 \| 21 30 \| 31 \|
	49	* \| \| DCRN \| \| \|
	50	* 31 \| %r3 \| (5..9\|0..4) \| 323 \| 0 \|
	51	*
	52	* Where:
	53	* OPCD = opcode - 31
	54	* RT = destination register - %r3 return register
	55	* DCRF = DCRN # with upper and lower halves swapped
	56	* XO = extended opcode - 323
	57	* CR = CR[CR0] NOT undefined - 0
	58	*/
	59	rlwinm r0, r3, 27, 27, 31 /* OPCD = 31 */
	60	rlwinm r3, r3, 5, 22, 26
	61	or r3, r3, r0
	62	slwi r3, r3, 10
	63	oris r3, r3, 0x3e30 /* RT = %r3 */
	64	ori r3, r3, 323 /* XO = 323 */
	65	slwi r3, r3, 1 /* CR = 0 */
	66
	67	mflr r4
	68	stw r3, 0(r4) /* Store instr in get_dcr() */
	69	dcbst r0, r4 /* Make sure val is written out */
	70	sync /* Wait for write to complete */
	71	icbi r0, r4 /* Make sure old instr is dumped */
	72	isync /* Wait for icbi to complete */
	73
	74	blr
	75	.Lfe1: .size _create_MFDCR,.Lfe1-_create_MFDCR
76	/* end _create_MFDCR() */
77
78	/*
79	* static void _create_MTDCR(unsigned short dcrn, unsigned long value)
80	*
81	* Builds a 'mtdcr' instruction for set_dcr
82	* function.
83	*/
84	.section ".text"
85	.align 2
86	.type _create_MTDCR,@function
87	_create_MTDCR:
88	/*
89	* Build up a 'mtdcr' instruction formatted as follows:
90	*
91	* OPCD \| RS \| DCRF \| XO \| CR \|
92	* ---------------\|--------------\|--------------\|----\|
93	* 0 5 \| 6 10 \| 11 20 \| 21 30 \| 31 \|
94	* \| \| DCRN \| \| \|
95	* 31 \| %r3 \| (5..9\|0..4) \| 451 \| 0 \|
96	*
97	* Where:
98	* OPCD = opcode - 31
99	* RS = source register - %r4
100	* DCRF = dest. DCRN # with upper and lower halves swapped
101	* XO = extended opcode - 451
102	* CR = CR[CR0] NOT undefined - 0
103	*/
104	rlwinm r0, r3, 27, 27, 31 /* OPCD = 31 */
105	rlwinm r3, r3, 5, 22, 26
106	or r3, r3, r0
107	slwi r3, r3, 10
108	oris r3, r3, 0x3e40 /* RS = %r4 */
109	ori r3, r3, 451 /* XO = 451 */
110	slwi r3, r3, 1 /* CR = 0 */
111
112	mflr r5
113	stw r3, 0(r5) /* Store instr in set_dcr() */
114	dcbst r0, r5 /* Make sure val is written out */
115	sync /* Wait for write to complete */
116	icbi r0, r5 /* Make sure old instr is dumped */
117	isync /* Wait for icbi to complete */
118
119	blr
120	.Lfe2: .size _create_MTDCR,.Lfe2-_create_MTDCR
121	/* end _create_MTDCR() */
122
123
124	/*
125	* unsigned long get_dcr(unsigned short dcrn)
126	*
127	* Return a given DCR's value.
128	*/
129	/* */
130	/* XXX - This is self modifying code, hence */
131	/* it is in the data section. */
132	/* */
133	.section ".data"
134	.align 2
135	.globl get_dcr
136	.type get_dcr,@function
137	get_dcr:
138	mflr r0 /* Get link register */
139	stwu r1, -32(r1) /* Save back chain and move SP */
140	stw r0, +36(r1) /* Save link register */
141
142	bl _create_MFDCR /* Build following instruction */
143	/* XXX - we build this instuction up on the fly. */
144	.long 0 /* Get DCR's value */
145
146	lwz r0, +36(r1) /* Get saved link register */
147	mtlr r0 /* Restore link register */
148	addi r1, r1, +32 /* Remove frame from stack */
149	blr /* Return to calling function */
150	.Lfe3: .size get_dcr,.Lfe3-get_dcr
151	/* end get_dcr() */
152
153
154	/*
155	* unsigned void set_dcr(unsigned short dcrn, unsigned long value)
156	*
157	* Return a given DCR's value.
158	*/
159	/*
160	* XXX - This is self modifying code, hence
161	* it is in the data section.
162	*/
163	.section ".data"
164	.align 2
165	.globl set_dcr
166	.type set_dcr,@function
167	set_dcr:
168	mflr r0 /* Get link register */
169	stwu r1, -32(r1) /* Save back chain and move SP */
170	stw r0, +36(r1) /* Save link register */
171
172	bl _create_MTDCR /* Build following instruction */
173	/* XXX - we build this instuction up on the fly. */
174	.long 0 /* Set DCR's value */
175
176	lwz r0, +36(r1) /* Get saved link register */
177	mtlr r0 /* Restore link register */
178	addi r1, r1, +32 /* Remove frame from stack */
179	blr /* Return to calling function */
180	.Lfe4: .size set_dcr,.Lfe4-set_dcr
181	/* end set_dcr() */
068b60a0	182	#endif