projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| d865fd09 RR |
1 | /* |
| 2 | * (C) Copyright 2008 | |
| 5b218ae1 | 3 | * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com |
| d865fd09 RR |
4 | * This work has been supported by: QTechnology http://qtec.com/ |
| 5 | * Based on interrupts.c Wolfgang Denk-DENX Software Engineering-wd@denx.de | |
| 1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
| d865fd09 RR |
7 | */ |
| 8 | #include <common.h> | |
| 9 | #include <watchdog.h> | |
| 10 | #include <command.h> | |
| 11 | #include <asm/processor.h> | |
| 12 | #include <asm/interrupt.h> | |
| b36df561 | 13 | #include <asm/ppc4xx.h> |
| d865fd09 | 14 | #include <ppc_asm.tmpl> |
| d865fd09 RR |
15 | #include <asm/io.h> |
| 16 | #include <asm/xilinx_irq.h> | |
| 17 | ||
| 18 | DECLARE_GLOBAL_DATA_PTR; | |
| 19 | ||
| 20 | void pic_enable(void) | |
| 21 | { | |
| 22 | debug("Xilinx PIC at 0x%8x\n", intc); | |
| 23 | ||
| 24 | /* | |
| 25 | * Disable all external interrupts until they are | |
| 26 | * explicitly requested. | |
| 27 | */ | |
| 28 | out_be32((u32 *) IER, 0); | |
| 29 | ||
| 30 | /* Acknowledge any pending interrupts just in case. */ | |
| 31 | out_be32((u32 *) IAR, 0xffffffff); | |
| 32 | ||
| 33 | /* Turn on the Master Enable. */ | |
| 34 | out_be32((u32 *) MER, 0x3UL); | |
| 35 | ||
| 36 | return; | |
| 37 | } | |
| 38 | ||
| 39 | int xilinx_pic_irq_get(void) | |
| 40 | { | |
| 41 | u32 irq; | |
| 42 | irq = in_be32((u32 *) IVR); | |
| 43 | ||
| 44 | /* If no interrupt is pending then all bits of the IVR are set to 1. As | |
| 45 | * the IVR is as many bits wide as numbers of inputs are available. | |
| 46 | * Therefore, if all bits of the IVR are set to one, its content will | |
| 47 | * be bigger than XPAR_INTC_MAX_NUM_INTR_INPUTS. | |
| 48 | */ | |
| 49 | if (irq >= XPAR_INTC_MAX_NUM_INTR_INPUTS) | |
| 50 | irq = -1; /* report no pending interrupt. */ | |
| 51 | ||
| 52 | debug("get_irq: %d\n", irq); | |
| 53 | return (irq); | |
| 54 | } | |
| 55 | ||
| 56 | void pic_irq_enable(unsigned int irq) | |
| 57 | { | |
| 58 | u32 mask = IRQ_MASK(irq); | |
| 59 | debug("enable: %d\n", irq); | |
| 60 | out_be32((u32 *) SIE, mask); | |
| 61 | } | |
| 62 | ||
| 63 | void pic_irq_disable(unsigned int irq) | |
| 64 | { | |
| 65 | u32 mask = IRQ_MASK(irq); | |
| 66 | debug("disable: %d\n", irq); | |
| 67 | out_be32((u32 *) CIE, mask); | |
| 68 | } | |
| 69 | ||
| 70 | void pic_irq_ack(unsigned int irq) | |
| 71 | { | |
| 72 | u32 mask = IRQ_MASK(irq); | |
| 73 | debug("ack: %d\n", irq); | |
| 74 | out_be32((u32 *) IAR, mask); | |
| 75 | } | |
| 76 | ||
| 77 | void external_interrupt(struct pt_regs *regs) | |
| 78 | { | |
| 79 | int irq; | |
| 80 | ||
| 81 | irq = xilinx_pic_irq_get(); | |
| 82 | if (irq < 0) | |
| 83 | return; | |
| 84 | ||
| 85 | interrupt_run_handler(irq); | |
| 86 | ||
| 87 | return; | |
| 88 | } |