projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 47d41cc3 | 1 | /* |
| 21608275 | 2 | * Copyright 2009-2010 Freescale Semiconductor, Inc. |
| 47d41cc3 KG |
3 | * |
| 4 | * This program is free software; you can redistribute it and/or | |
| 5 | * modify it under the terms of the GNU General Public License as | |
| 6 | * published by the Free Software Foundation; either version 2 of | |
| 7 | * the License, or (at your option) any later version. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, | |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | * GNU General Public License for more details. | |
| 13 | * | |
| 14 | * You should have received a copy of the GNU General Public License | |
| 15 | * along with this program; if not, write to the Free Software | |
| 16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
| 17 | * MA 02111-1307 USA | |
| 18 | * | |
| 19 | */ | |
| 20 | ||
| 21 | #ifndef _ASM_CONFIG_H_ | |
| 22 | #define _ASM_CONFIG_H_ | |
| 23 | ||
| a16028da MF |
24 | #define CONFIG_LMB |
| 25 | ||
| 87c90639 | 26 | #ifndef CONFIG_MAX_MEM_MAPPED |
| bd76729b | 27 | #if defined(CONFIG_4xx) || defined(CONFIG_E500) || defined(CONFIG_MPC86xx) |
| 87c90639 KG |
28 | #define CONFIG_MAX_MEM_MAPPED ((phys_size_t)2 << 30) |
| 29 | #else | |
| 2ede879f | 30 | #define CONFIG_MAX_MEM_MAPPED (256 << 20) |
| 87c90639 KG |
31 | #endif |
| 32 | #endif | |
| 33 | ||
| f732a759 PT |
34 | /* Check if boards need to enable FSL DMA engine for SDRAM init */ |
| 35 | #if !defined(CONFIG_FSL_DMA) && defined(CONFIG_DDR_ECC) | |
| 36 | #if (defined(CONFIG_MPC83xx) && defined(CONFIG_DDR_ECC_INIT_VIA_DMA)) || \ | |
| 37 | ((defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)) && \ | |
| 38 | !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)) | |
| 017f11f6 | 39 | #define CONFIG_FSL_DMA |
| 47d41cc3 | 40 | #endif |
| 017f11f6 PT |
41 | #endif |
| 42 | ||
| 3b1f243b | 43 | #if defined(CONFIG_MPC8572) || defined(CONFIG_P1020) || \ |
| 21608275 | 44 | defined(CONFIG_P1021) || defined(CONFIG_P1022) || \ |
| 3b1f243b | 45 | defined(CONFIG_P2020) || defined(CONFIG_MPC8641) |
| 7e4259bb KG |
46 | #define CONFIG_MAX_CPUS 2 |
| 47 | #elif defined(CONFIG_PPC_P4080) | |
| 48 | #define CONFIG_MAX_CPUS 8 | |
| 0e870980 | 49 | #else |
| 7e4259bb | 50 | #define CONFIG_MAX_CPUS 1 |
| 0e870980 PA |
51 | #endif |
| 52 | ||
| 5ccd29c3 PT |
53 | /* |
| 54 | * Provide a default boot page translation virtual address that lines up with | |
| 55 | * Freescale's default e500 reset page. | |
| 56 | */ | |
| 57 | #if (defined(CONFIG_E500) && defined(CONFIG_MP)) | |
| 58 | #ifndef CONFIG_BPTR_VIRT_ADDR | |
| 59 | #define CONFIG_BPTR_VIRT_ADDR 0xfffff000 | |
| 60 | #endif | |
| 61 | #endif | |
| 62 | ||
| 3ad89c4e KG |
63 | /* Enable TSEC2.0 for the platforms that have it if we are using TSEC */ |
| 64 | #if defined(CONFIG_TSEC_ENET) && \ | |
| 65 | (defined(CONFIG_P1020) || defined(CONFIG_P1011)) | |
| 66 | #define CONFIG_TSECV2 | |
| 67 | #endif | |
| 68 | ||
| 94e9411b KG |
69 | /* Number of TLB CAM entries we have on FSL Book-E chips */ |
| 70 | #if defined(CONFIG_E500MC) | |
| 71 | #define CONFIG_SYS_NUM_TLBCAMS 64 | |
| 72 | #elif defined(CONFIG_E500) | |
| 73 | #define CONFIG_SYS_NUM_TLBCAMS 16 | |
| 74 | #endif | |
| 75 | ||
| 85829017 PT |
76 | /* Relocation to SDRAM works on all PPC boards */ |
| 77 | #define CONFIG_RELOC_FIXUP_WORKS | |
| 78 | ||
| 017f11f6 | 79 | #endif /* _ASM_CONFIG_H_ */ |