[people/ms/u-boot.git] / arch / powerpc / include / asm / fsl_liodn.h

/*
 * Copyright 2009-2011 Freescale Semiconductor, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _FSL_LIODN_H_
#define _FSL_LIODN_H_

#include <asm/types.h>

struct srio_liodn_id_table {
	u32 id[2];
	unsigned long reg_offset[2];
	u8 num_ids;
	u8 portid;
};
#define SET_SRIO_LIODN_1(port, idA) \
	{ .id = { idA }, .num_ids = 1, .portid = port, \
	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
	}

#define SET_SRIO_LIODN_2(port, idA, idB) \
	{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
	  .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
	}

struct liodn_id_table {
	const char * compat;
	u32 id[2];
	u8 num_ids;
	phys_addr_t compat_offset;
	unsigned long reg_offset;
};

extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
extern void set_liodns(void);
extern void fdt_fixup_liodn(void *blob);

#define SET_LIODN_BASE_1(idA) \
	{ .id = { idA }, .num_ids = 1, }

#define SET_LIODN_BASE_2(idA, idB) \
	{ .id = { idA, idB }, .num_ids = 2 }

#define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
	{ .compat = name, \
	  .id = { idA }, .num_ids = 1, \
	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
	}

#define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
	{ .compat = name, \
	  .id = { idA, idB }, .num_ids = 2, \
	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
	}

#define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
	SET_LIODN_ENTRY_1(compat, liodn, \
		offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
		compatoff)

#define SET_USB_LIODN(usbNum, compat, liodn) \
	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
		CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)

#define SET_SATA_LIODN(sataNum, liodn) \
	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
		CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)

#define SET_PCI_LIODN(compat, pciNum, liodn) \
	SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)

#define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
	SET_LIODN_ENTRY_1(compat, liodn,\
		offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)

/* reg nodes for DMA start @ 0x300 */
#define SET_DMA_LIODN(dmaNum, liodn) \
	SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
		CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)

#define SET_SDHC_LIODN(sdhcNum, liodn) \
	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
		CONFIG_SYS_MPC85xx_ESDHC_OFFSET)

#define SET_QMAN_LIODN(liodn) \
	SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
		CONFIG_SYS_FSL_QMAN_OFFSET, \
		CONFIG_SYS_FSL_QMAN_OFFSET)

#define SET_BMAN_LIODN(liodn) \
	SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
		CONFIG_SYS_FSL_BMAN_OFFSET, \
		CONFIG_SYS_FSL_BMAN_OFFSET)

#define SET_PME_LIODN(liodn) \
	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
		CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
		CONFIG_SYS_FSL_CORENET_PME_OFFSET)

#define SET_PMAN_LIODN(num, liodn) \
	SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
		offsetof(struct ccsr_pman, ppa1) + \
		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \
		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET)

/* -1 from portID due to how immap has the registers */
#define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
	CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])

/* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
#define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
	SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \

/* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
#define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
	SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \

/*
 * handle both old and new versioned SEC properties:
 * "fsl,secX.Y" became "fsl,sec-vX.Y" during development
 */
#define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
	SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
		CONFIG_SYS_FSL_SEC_OFFSET, \
		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
	SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
		CONFIG_SYS_FSL_SEC_OFFSET, \
		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)

/* This is a bit evil since we treat rtic param as both a string & hex value */
#define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
		liodnA,	\
		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
		CONFIG_SYS_FSL_SEC_OFFSET, \
		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
	SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
		liodnA,	\
		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
		CONFIG_SYS_FSL_SEC_OFFSET, \
		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))

#define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
	SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
		offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
		CONFIG_SYS_FSL_SEC_OFFSET, 0)

#define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
	SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
	liodnA, \
	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)

#define SET_RMAN_LIODN(ibNum, liodn) \
	SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
		offsetof(struct ccsr_rman, mmitdr) + \
		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)

extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
extern struct liodn_id_table raide_liodn_tbl[];
extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
#ifdef CONFIG_SYS_SRIO
extern struct srio_liodn_id_table srio_liodn_tbl[];
extern int srio_liodn_tbl_sz;
#endif
extern struct liodn_id_table rman_liodn_tbl[];
extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
extern int rman_liodn_tbl_sz;

#endif
Commit	Line	Data
db977abf	1	/*
24995d82	2	* Copyright 2009-2011 Freescale Semiconductor, Inc.
db977abf	3	*
1a459660	4	* SPDX-License-Identifier: GPL-2.0+
db977abf KG	5	*/
	6
	7	#ifndef _FSL_LIODN_H_
	8	#define _FSL_LIODN_H_
	9
	10	#include <asm/types.h>
	11
1a0c6421 KG	12	struct srio_liodn_id_table {
	13	u32 id[2];
	14	unsigned long reg_offset[2];
	15	u8 num_ids;
	16	u8 portid;
	17	};
	18	#define SET_SRIO_LIODN_1(port, idA) \
	19	{ .id = { idA }, .num_ids = 1, .portid = port, \
	20	.reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
	21	+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
	22	}
	23
	24	#define SET_SRIO_LIODN_2(port, idA, idB) \
	25	{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
	26	.reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
	27	+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
	28	.reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
	29	+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
	30	}
	31
db977abf KG	32	struct liodn_id_table {
	33	const char * compat;
	34	u32 id[2];
	35	u8 num_ids;
	36	phys_addr_t compat_offset;
	37	unsigned long reg_offset;
	38	};
	39
	40	extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
	41	extern void set_liodns(void);
	42	extern void fdt_fixup_liodn(void *blob);
	43
	44	#define SET_LIODN_BASE_1(idA) \
	45	{ .id = { idA }, .num_ids = 1, }
	46
	47	#define SET_LIODN_BASE_2(idA, idB) \
	48	{ .id = { idA, idB }, .num_ids = 2 }
	49
	50	#define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
	51	{ .compat = name, \
	52	.id = { idA }, .num_ids = 1, \
	53	.reg_offset = off + CONFIG_SYS_CCSRBAR, \
	54	.compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
	55	}
	56
	57	#define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
	58	{ .compat = name, \
	59	.id = { idA, idB }, .num_ids = 2, \
	60	.reg_offset = off + CONFIG_SYS_CCSRBAR, \
	61	.compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
	62	}
	63
	64	#define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
	65	SET_LIODN_ENTRY_1(compat, liodn, \
	66	offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
	67	compatoff)
	68
	69	#define SET_USB_LIODN(usbNum, compat, liodn) \
	70	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
	71	CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
	72
	73	#define SET_SATA_LIODN(sataNum, liodn) \
	74	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
	75	CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
	76
33e68354 LT	77	#define SET_PCI_LIODN(compat, pciNum, liodn) \
33e68354 LT	78	SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
db977abf KG	79	CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
db977abf KG	80
e389a377 LT	81	#define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
	82	SET_LIODN_ENTRY_1(compat, liodn,\
	83	offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
	84	CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
	85
db977abf KG	86	/* reg nodes for DMA start @ 0x300 */
	87	#define SET_DMA_LIODN(dmaNum, liodn) \
	88	SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
	89	CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
	90
	91	#define SET_SDHC_LIODN(sdhcNum, liodn) \
	92	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
	93	CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
	94
	95	#define SET_QMAN_LIODN(liodn) \
	96	SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
24995d82 HW	97	CONFIG_SYS_FSL_QMAN_OFFSET, \
24995d82 HW	98	CONFIG_SYS_FSL_QMAN_OFFSET)
db977abf KG	99
	100	#define SET_BMAN_LIODN(liodn) \
	101	SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
24995d82 HW	102	CONFIG_SYS_FSL_BMAN_OFFSET, \
24995d82 HW	103	CONFIG_SYS_FSL_BMAN_OFFSET)
db977abf KG	104
	105	#define SET_PME_LIODN(liodn) \
	106	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
	107	CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
	108	CONFIG_SYS_FSL_CORENET_PME_OFFSET)
	109
f311838d AF	110	#define SET_PMAN_LIODN(num, liodn) \
	111	SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
	112	offsetof(struct ccsr_pman, ppa1) + \
	113	CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \
	114	CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET)
	115
db977abf KG	116	/* -1 from portID due to how immap has the registers */
	117	#define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
	118	CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
	119	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
	120
	121	/* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
	122	#define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
	123	SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
	124	FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
	125	CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
	126
	127	/* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
	128	#define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
	129	SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
	130	FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
	131	CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
	132
416202f6 KP	133	/*
	134	* handle both old and new versioned SEC properties:
	135	* "fsl,secX.Y" became "fsl,sec-vX.Y" during development
	136	*/
ed062e0f KG	137	#define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
ed062e0f KG	138	SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
416202f6 KP	139	offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
	140	CONFIG_SYS_FSL_SEC_OFFSET, \
	141	CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
	142	SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
ed062e0f	143	offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
db977abf	144	CONFIG_SYS_FSL_SEC_OFFSET, \
ed062e0f	145	CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
db977abf KG	146
	147	/* This is a bit evil since we treat rtic param as both a string & hex value */
	148	#define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
	149	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
416202f6 KP	150	liodnA, \
	151	offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
	152	CONFIG_SYS_FSL_SEC_OFFSET, \
	153	CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
	154	SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
db977abf KG	155	liodnA, \
	156	offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
	157	CONFIG_SYS_FSL_SEC_OFFSET, \
	158	CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
	159
	160	#define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
	161	SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
	162	offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
	163	CONFIG_SYS_FSL_SEC_OFFSET, 0)
	164
6b3a8d00 KG	165	#define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
	166	SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
	167	liodnA, \
	168	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
	169	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
	170	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
	171	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
	172
4d28db8a KG	173	#define SET_RMAN_LIODN(ibNum, liodn) \
	174	SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
	175	offsetof(struct ccsr_rman, mmitdr) + \
	176	CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
	177	CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)
	178
db977abf	179	extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
6b3a8d00	180	extern struct liodn_id_table raide_liodn_tbl[];
db977abf	181	extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
fd946040	182	#ifdef CONFIG_SYS_SRIO
1a0c6421	183	extern struct srio_liodn_id_table srio_liodn_tbl[];
fd946040 TT	184	extern int srio_liodn_tbl_sz;
fd946040 TT	185	#endif
4d28db8a	186	extern struct liodn_id_table rman_liodn_tbl[];
6b3a8d00	187	extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
db977abf	188	extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
4d28db8a	189	extern int rman_liodn_tbl_sz;
db977abf KG	190
db977abf KG	191	#endif