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7065b7d4 RG |
1 | /* |
2 | * Copyright 2010-2011 Freescale Semiconductor, Inc. | |
3 | * | |
1a459660 | 4 | * SPDX-License-Identifier: GPL-2.0+ |
7065b7d4 RG |
5 | */ |
6 | ||
7 | #ifndef __FSL_SECURE_BOOT_H | |
8 | #define __FSL_SECURE_BOOT_H | |
e04916a7 | 9 | #include <asm/config_mpc85xx.h> |
10 | ||
11 | #ifdef CONFIG_SECURE_BOOT | |
bdc22074 AB |
12 | |
13 | #ifndef CONFIG_FIT_SIGNATURE | |
14 | #define CONFIG_CHAIN_OF_TRUST | |
e04916a7 | 15 | #endif |
7065b7d4 | 16 | |
7065b7d4 RG |
17 | #if defined(CONFIG_FSL_CORENET) |
18 | #define CONFIG_SYS_PBI_FLASH_BASE 0xc0000000 | |
f978f7c2 AB |
19 | #elif defined(CONFIG_BSC9132QDS) |
20 | #define CONFIG_SYS_PBI_FLASH_BASE 0xc8000000 | |
b3f0f632 AB |
21 | #elif defined(CONFIG_C29XPCIE) |
22 | #define CONFIG_SYS_PBI_FLASH_BASE 0xcc000000 | |
7065b7d4 RG |
23 | #else |
24 | #define CONFIG_SYS_PBI_FLASH_BASE 0xce000000 | |
25 | #endif | |
26 | #define CONFIG_SYS_PBI_FLASH_WINDOW 0xcff80000 | |
27 | ||
ca4819df AB |
28 | #if defined(CONFIG_B4860QDS) || \ |
29 | defined(CONFIG_T4240QDS) || \ | |
2d8db6d3 | 30 | defined(CONFIG_T2080QDS) || \ |
e47c2a68 | 31 | defined(CONFIG_T2080RDB) || \ |
2d8db6d3 | 32 | defined(CONFIG_T1040QDS) || \ |
e622d9ed | 33 | defined(CONFIG_T104xD4QDS) || \ |
f6050790 | 34 | defined(CONFIG_T104xRDB) || \ |
e622d9ed | 35 | defined(CONFIG_T104xD4RDB) || \ |
f6050790 SL |
36 | defined(CONFIG_PPC_T1023) || \ |
37 | defined(CONFIG_PPC_T1024) | |
fb4a2409 | 38 | #define CONFIG_SYS_CPC_REINIT_F |
e04916a7 | 39 | #define CONFIG_KEY_REVOCATION |
fb4a2409 AB |
40 | #undef CONFIG_SYS_INIT_L3_ADDR |
41 | #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 | |
42 | #endif | |
43 | ||
467a40df AB |
44 | #if defined(CONFIG_RAMBOOT_PBL) |
45 | #undef CONFIG_SYS_INIT_L3_ADDR | |
46 | #define CONFIG_SYS_INIT_L3_ADDR 0xbff00000 | |
47 | #endif | |
48 | ||
e04916a7 | 49 | #if defined(CONFIG_C29XPCIE) |
50 | #define CONFIG_KEY_REVOCATION | |
51 | #endif | |
52 | ||
53 | #if defined(CONFIG_PPC_P3041) || \ | |
54 | defined(CONFIG_PPC_P4080) || \ | |
55 | defined(CONFIG_PPC_P5020) || \ | |
56 | defined(CONFIG_PPC_P5040) || \ | |
57 | defined(CONFIG_PPC_P2041) | |
58 | #define CONFIG_FSL_TRUST_ARCH_v1 | |
59 | #endif | |
60 | ||
2ed948f4 | 61 | #if defined(CONFIG_FSL_CORENET) && !defined(CONFIG_SYS_RAMBOOT) |
e04916a7 | 62 | /* The key used for verification of next level images |
63 | * is picked up from an Extension Table which has | |
64 | * been verified by the ISBC (Internal Secure boot Code) | |
2ed948f4 AB |
65 | * in boot ROM of the SoC. |
66 | * The feature is only applicable in case of NOR boot and is | |
67 | * not applicable in case of RAMBOOT (NAND, SD, SPI). | |
e04916a7 | 68 | */ |
69 | #define CONFIG_FSL_ISBC_KEY_EXT | |
70 | #endif | |
bdc22074 AB |
71 | #endif /* #ifdef CONFIG_SECURE_BOOT */ |
72 | ||
73 | #ifdef CONFIG_CHAIN_OF_TRUST | |
74 | ||
75 | #define CONFIG_CMD_ESBC_VALIDATE | |
76 | #define CONFIG_CMD_BLOB | |
77 | #define CONFIG_FSL_SEC_MON | |
78 | #define CONFIG_SHA_PROG_HW_ACCEL | |
bdc22074 AB |
79 | #define CONFIG_RSA_FREESCALE_EXP |
80 | ||
bdc22074 AB |
81 | #ifndef CONFIG_FSL_CAAM |
82 | #define CONFIG_FSL_CAAM | |
83 | #endif | |
e04916a7 | 84 | |
d0a6d7ce AB |
85 | /* fsl_setenv_chain_of_trust() must be called from |
86 | * board_late_init() | |
87 | */ | |
88 | #ifndef CONFIG_BOARD_LATE_INIT | |
89 | #define CONFIG_BOARD_LATE_INIT | |
90 | #endif | |
91 | ||
5050f6f0 AB |
92 | /* If Boot Script is not on NOR and is required to be copied on RAM */ |
93 | #ifdef CONFIG_BOOTSCRIPT_COPY_RAM | |
94 | #define CONFIG_BS_HDR_ADDR_RAM 0x00010000 | |
95 | #define CONFIG_BS_HDR_ADDR_FLASH 0x00800000 | |
96 | #define CONFIG_BS_HDR_SIZE 0x00002000 | |
97 | #define CONFIG_BS_ADDR_RAM 0x00012000 | |
98 | #define CONFIG_BS_ADDR_FLASH 0x00802000 | |
99 | #define CONFIG_BS_SIZE 0x00001000 | |
100 | ||
101 | #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM | |
102 | #else | |
103 | ||
98cb0efd | 104 | /* The bootscript header address is different for B4860 because the NOR |
105 | * mapping is different on B4 due to reduced NOR size. | |
106 | */ | |
107 | #if defined(CONFIG_B4860QDS) | |
108 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xecc00000 | |
109 | #elif defined(CONFIG_FSL_CORENET) | |
110 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xe8e00000 | |
111 | #elif defined(CONFIG_BSC9132QDS) | |
112 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x88020000 | |
113 | #elif defined(CONFIG_C29XPCIE) | |
114 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xec020000 | |
115 | #else | |
116 | #define CONFIG_BOOTSCRIPT_HDR_ADDR 0xee020000 | |
117 | #endif | |
118 | ||
bdc22074 | 119 | #endif /* #ifdef CONFIG_BOOTSCRIPT_COPY_RAM */ |
98cb0efd | 120 | |
bdc22074 AB |
121 | #include <config_fsl_chain_trust.h> |
122 | #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ | |
0d2cff2d | 123 | #endif |