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0157cedb | 1 | /* |
91a76751 | 2 | * (C) Copyright 2002-2010 |
0157cedb WD |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __ASM_GBL_DATA_H | |
25 | #define __ASM_GBL_DATA_H | |
f046ccd1 | 26 | |
3469424c | 27 | #include "config.h" |
f046ccd1 EL |
28 | #include "asm/types.h" |
29 | ||
5cb48582 SG |
30 | /* Architecture-specific global data */ |
31 | struct arch_global_data { | |
1206c184 SG |
32 | #if defined(CONFIG_8xx) |
33 | unsigned long brg_clk; | |
34 | #endif | |
35 | #if defined(CONFIG_CPM2) | |
748cd059 SG |
36 | /* There are many clocks on the MPC8260 - see page 9-5 */ |
37 | unsigned long vco_out; | |
38 | unsigned long cpm_clk; | |
39 | unsigned long scc_clk; | |
1206c184 SG |
40 | unsigned long brg_clk; |
41 | #endif | |
42 | #if defined(CONFIG_QE) | |
43 | u32 brg_clk; | |
44 | #endif | |
c6731fe2 | 45 | /* TODO: sjg@chromium.org: Should these be unslgned long? */ |
0f898604 | 46 | #if defined(CONFIG_MPC83xx) |
f046ccd1 EL |
47 | /* There are other clocks in the MPC83XX */ |
48 | u32 csb_clk; | |
c6731fe2 | 49 | # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ |
7c619ddc | 50 | defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) |
f046ccd1 EL |
51 | u32 tsec1_clk; |
52 | u32 tsec2_clk; | |
f046ccd1 | 53 | u32 usbdr_clk; |
c6731fe2 | 54 | # elif defined(CONFIG_MPC8309) |
a88731a6 | 55 | u32 usbdr_clk; |
c6731fe2 SG |
56 | # endif |
57 | # if defined(CONFIG_MPC834x) | |
0f253283 | 58 | u32 usbmph_clk; |
c6731fe2 SG |
59 | # endif /* CONFIG_MPC834x */ |
60 | # if defined(CONFIG_MPC8315) | |
555da617 | 61 | u32 tdm_clk; |
c6731fe2 | 62 | # endif |
5f820439 | 63 | u32 core_clk; |
f046ccd1 EL |
64 | u32 enc_clk; |
65 | u32 lbiu_clk; | |
66 | u32 lclk_clk; | |
c6731fe2 | 67 | # if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ |
7c619ddc | 68 | defined(CONFIG_MPC837x) |
03051c3d DL |
69 | u32 pciexp1_clk; |
70 | u32 pciexp2_clk; | |
c6731fe2 SG |
71 | # endif |
72 | # if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) | |
03051c3d | 73 | u32 sata_clk; |
c6731fe2 SG |
74 | # endif |
75 | # if defined(CONFIG_MPC8360) | |
76 | u32 mem_sec_clk; | |
77 | # endif /* CONFIG_MPC8360 */ | |
03051c3d | 78 | #endif |
c6731fe2 SG |
79 | }; |
80 | ||
81 | /* | |
82 | * The following data structure is placed in some memory wich is | |
83 | * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or | |
84 | * some locked parts of the data cache) to allow for a minimum set of | |
85 | * global variables during system initialization (until we have set | |
86 | * up the memory controller so that we can use RAM). | |
87 | */ | |
88 | ||
89 | typedef struct global_data { | |
90 | bd_t *bd; | |
91 | unsigned long flags; | |
92 | unsigned int baudrate; | |
93 | unsigned long cpu_clk; /* CPU clock in Hz! */ | |
94 | unsigned long bus_clk; | |
95 | /* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ | |
96 | unsigned long pci_clk; | |
97 | unsigned long mem_clk; | |
728ece34 | 98 | #if defined(CONFIG_FSL_ESDHC) |
ef50d6c0 KG |
99 | u32 sdhc_clk; |
100 | #endif | |
ada591d2 TP |
101 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
102 | u32 lbc_clk; | |
0e870980 | 103 | void *cpu; |
ada591d2 | 104 | #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ |
0f898604 | 105 | #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
943afa22 TT |
106 | u32 i2c1_clk; |
107 | u32 i2c2_clk; | |
108 | #endif | |
5f820439 DL |
109 | #if defined(CONFIG_QE) |
110 | u32 qe_clk; | |
7737d5c6 DL |
111 | uint mp_alloc_base; |
112 | uint mp_alloc_top; | |
5f820439 | 113 | #endif /* CONFIG_QE */ |
f060054d KG |
114 | #if defined(CONFIG_FSL_LAW) |
115 | u32 used_laws; | |
116 | #endif | |
94e9411b KG |
117 | #if defined(CONFIG_E500) |
118 | u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; | |
119 | #endif | |
cbd8a35c | 120 | #if defined(CONFIG_MPC5xxx) |
945af8d7 | 121 | unsigned long ipb_clk; |
983fda83 | 122 | #endif |
8993e54b | 123 | #if defined(CONFIG_MPC512X) |
5d49e0e1 | 124 | u32 ips_clk; |
8993e54b RJ |
125 | u32 csb_clk; |
126 | #endif /* CONFIG_MPC512X */ | |
983fda83 WD |
127 | #if defined(CONFIG_MPC8220) |
128 | unsigned long bExtUart; | |
129 | unsigned long inp_clk; | |
983fda83 WD |
130 | unsigned long vco_clk; |
131 | unsigned long pev_clk; | |
132 | unsigned long flb_clk; | |
0157cedb | 133 | #endif |
b57ca3e1 | 134 | phys_size_t ram_size; /* RAM size */ |
0157cedb | 135 | unsigned long reset_status; /* reset status register at boot */ |
0f898604 | 136 | #if defined(CONFIG_MPC83xx) |
46497056 NS |
137 | unsigned long arbiter_event_attributes; |
138 | unsigned long arbiter_event_address; | |
139 | #endif | |
0157cedb WD |
140 | unsigned long env_addr; /* Address of Environment struct */ |
141 | unsigned long env_valid; /* Checksum of Environment valid? */ | |
142 | unsigned long have_console; /* serial_init() was called */ | |
9558b48a GR |
143 | #ifdef CONFIG_PRE_CONSOLE_BUFFER |
144 | unsigned long precon_buf_idx; /* Pre-Console buffer index */ | |
145 | #endif | |
6d0f6bcf | 146 | #if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2) |
0157cedb WD |
147 | unsigned int dp_alloc_base; |
148 | unsigned int dp_alloc_top; | |
149 | #endif | |
f10493c6 SR |
150 | #if defined(CONFIG_4xx) |
151 | u32 uart_clk; | |
152 | #endif /* CONFIG_4xx */ | |
6d0f6bcf | 153 | #if defined(CONFIG_SYS_GT_6426x) |
0157cedb WD |
154 | unsigned int mirror_hack[16]; |
155 | #endif | |
756f586a WD |
156 | #if defined(CONFIG_A3000) || \ |
157 | defined(CONFIG_HIDDEN_DRAGON) || \ | |
158 | defined(CONFIG_MUSENKI) || \ | |
159 | defined(CONFIG_SANDPOINT) | |
0157cedb WD |
160 | void * console_addr; |
161 | #endif | |
c7de829c | 162 | unsigned long relocaddr; /* Start address of U-Boot in RAM */ |
0157cedb WD |
163 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
164 | unsigned long fb_base; /* Base address of framebuffer memory */ | |
165 | #endif | |
667122af | 166 | #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) |
228f29ac | 167 | unsigned long post_log_word; /* Record POST activities */ |
79843950 | 168 | unsigned long post_log_res; /* success of POST test */ |
4532cb69 | 169 | unsigned long post_init_f_time; /* When post_init_f started */ |
228f29ac | 170 | #endif |
0157cedb WD |
171 | #ifdef CONFIG_BOARD_TYPES |
172 | unsigned long board_type; | |
173 | #endif | |
4532cb69 WD |
174 | #ifdef CONFIG_MODEM_SUPPORT |
175 | unsigned long do_mdm_init; | |
176 | unsigned long be_quiet; | |
177 | #endif | |
3ad63878 | 178 | #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5) |
4532cb69 | 179 | unsigned long kbd_status; |
d32a874b | 180 | #endif |
2da0fc0d DE |
181 | #ifdef CONFIG_SYS_FPGA_COUNT |
182 | unsigned fpga_state[CONFIG_SYS_FPGA_COUNT]; | |
183 | #endif | |
d32a874b YT |
184 | #if defined(CONFIG_WD_MAX_RATE) |
185 | unsigned long long wdt_last; /* trace watch-dog triggering rate */ | |
8bde7f77 | 186 | #endif |
27b207fd | 187 | void **jt; /* jump table */ |
91a76751 | 188 | char env_buf[32]; /* buffer for getenv() before reloc. */ |
5cb48582 | 189 | struct arch_global_data arch; /* architecture-specific data */ |
0157cedb WD |
190 | } gd_t; |
191 | ||
47fde91f | 192 | #include <asm-generic/global_data_flags.h> |
0157cedb WD |
193 | |
194 | #if 1 | |
e7670f6c | 195 | #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") |
0157cedb WD |
196 | #else /* We could use plain global data, but the resulting code is bigger */ |
197 | #define XTRN_DECLARE_GLOBAL_DATA_PTR extern | |
198 | #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ | |
199 | gd_t *gd | |
200 | #endif | |
201 | ||
202 | #endif /* __ASM_GBL_DATA_H */ |