[people/ms/u-boot.git] / arch / sh / include / asm / cpu_sh7763.h

/*
 * Copyright (C) 2008 Renesas Solutions Corp.
 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */
#ifndef _ASM_CPU_SH7763_H_
#define _ASM_CPU_SH7763_H_

/* CACHE */
#define CACHE_OC_NUM_WAYS	1
#define CCR				0xFF00001C
#define CCR_CACHE_INIT	0x0000090b

/* SCIF */
/* SCIF0 */
#define SCIF0_BASE	SCSMR0
#define SCSMR0		0xFFE00000

/* SCIF1 */
#define SCIF1_BASE	SCSMR1
#define SCSMR1		0xFFE08000

/* SCIF2 */
#define SCIF2_BASE	SCSMR2
#define SCSMR2		0xFFE10000

/* Watchdog Timer */
#define WTCNT		WDTST
#define WDTST		0xFFCC0000

/* TMU */
#define TMU_BASE	0xFFD80000

#endif /* _ASM_CPU_SH7763_H_ */
Commit	Line	Data
60179098 NI	1	/*
	2	* Copyright (C) 2008 Renesas Solutions Corp.
	3	* Copyright (C) 2007,2008 Nobuhiro Iwamatsu
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
60179098 NI	6	*/
	7	#ifndef _ASM_CPU_SH7763_H_
	8	#define _ASM_CPU_SH7763_H_
	9
	10	/* CACHE */
	11	#define CACHE_OC_NUM_WAYS 1
	12	#define CCR 0xFF00001C
	13	#define CCR_CACHE_INIT 0x0000090b
	14
	15	/* SCIF */
	16	/* SCIF0 */
	17	#define SCIF0_BASE SCSMR0
	18	#define SCSMR0 0xFFE00000
	19
	20	/* SCIF1 */
	21	#define SCIF1_BASE SCSMR1
	22	#define SCSMR1 0xFFE08000
	23
	24	/* SCIF2 */
	25	#define SCIF2_BASE SCSMR2
	26	#define SCSMR2 0xFFE10000
	27
	28	/* Watchdog Timer */
	29	#define WTCNT WDTST
	30	#define WDTST 0xFFCC0000
	31
	32	/* TMU */
73f35e0b	33	#define TMU_BASE 0xFFD80000
60179098 NI	34
60179098 NI	35	#endif /* _ASM_CPU_SH7763_H_ */