projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| dd84058d MY |
1 | menu "x86 architecture" |
| 2 | depends on X86 | |
| 3 | ||
| 4 | config SYS_ARCH | |
| dd84058d MY |
5 | default "x86" |
| 6 | ||
| 45ccec8f MY |
7 | config USE_PRIVATE_LIBGCC |
| 8 | default y | |
| 9 | ||
| dd84058d MY |
10 | choice |
| 11 | prompt "Target select" | |
| 12 | ||
| 13 | config TARGET_COREBOOT | |
| 14 | bool "Support coreboot" | |
| 8ef07571 SG |
15 | help |
| 16 | This target is used for running U-Boot on top of Coreboot. In | |
| 17 | this case Coreboot does the early inititalisation, and U-Boot | |
| 18 | takes over once the RAM, video and CPU are fully running. | |
| 19 | U-Boot is loaded as a fallback payload from Coreboot, in | |
| 20 | Coreboot terminology. This method was used for the Chromebook | |
| 21 | Pixel when launched. | |
| 22 | ||
| 23 | config TARGET_CHROMEBOOK_LINK | |
| 24 | bool "Support Chromebook link" | |
| 25 | help | |
| 26 | This is the Chromebook Pixel released in 2013. It uses an Intel | |
| 27 | i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of | |
| 28 | SDRAM. It has a Panther Point platform controller hub, PCIe | |
| 29 | WiFi and Bluetooth. It also includes a 720p webcam, USB SD | |
| 30 | reader, microphone and speakers, display port and 32GB SATA | |
| 31 | solid state drive. There is a Chrome OS EC connected on LPC, | |
| 32 | and it provides a 2560x1700 high resolution touch-enabled LCD | |
| 33 | display. | |
| dd84058d MY |
34 | |
| 35 | endchoice | |
| 36 | ||
| 8ef07571 SG |
37 | source "arch/x86/cpu/ivybridge/Kconfig" |
| 38 | ||
| dd84058d MY |
39 | source "board/chromebook-x86/coreboot/Kconfig" |
| 40 | ||
| 8ef07571 SG |
41 | source "board/google/chromebook_link/Kconfig" |
| 42 | ||
| dd84058d | 43 | endmenu |