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Commit | Line | Data |
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2f3f477b SG |
1 | # |
2 | # Copyright (C) 2016 Google Inc. | |
3 | # | |
4 | # SPDX-License-Identifier: GPL-2.0 | |
5 | ||
6 | config INTEL_BROADWELL | |
7 | bool | |
8 | select CACHE_MRC_BIN | |
5d89b37f | 9 | select ARCH_EARLY_INIT_R |
1e452b46 | 10 | imply HAVE_INTEL_ME |
67f99f97 | 11 | imply ENABLE_MRC_CACHE |
1b15ef9c | 12 | imply ENV_IS_IN_SPI_FLASH |
24357dfd | 13 | imply AHCI_PCI |
1b15ef9c BM |
14 | imply ICH_SPI |
15 | imply INTEL_BROADWELL_GPIO | |
16 | imply SCSI | |
17 | imply SPI_FLASH | |
b9342b2c BM |
18 | imply USB |
19 | imply USB_EHCI_HCD | |
1b15ef9c | 20 | imply VIDEO_BROADWELL_IGD |
2f3f477b SG |
21 | |
22 | if INTEL_BROADWELL | |
23 | ||
24 | config DCACHE_RAM_BASE | |
25 | default 0xff7c0000 | |
26 | ||
27 | config DCACHE_RAM_SIZE | |
28 | default 0x40000 | |
29 | ||
30 | config DCACHE_RAM_MRC_VAR_SIZE | |
31 | default 0x30000 | |
32 | ||
33 | config CPU_SPECIFIC_OPTIONS | |
34 | def_bool y | |
35 | select SMM_TSEG | |
36 | select X86_RAMTEST | |
37 | ||
38 | config SMM_TSEG_SIZE | |
39 | hex | |
40 | default 0x800000 | |
41 | ||
42 | endif |