[people/ms/u-boot.git] / arch / x86 / cpu / quark / dram.c

/*
 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <errno.h>
#include <fdtdec.h>
#include <asm/post.h>
#include <asm/arch/mrc.h>
#include <asm/arch/quark.h>

DECLARE_GLOBAL_DATA_PTR;

static int mrc_configure_params(struct mrc_params *mrc_params)
{
	const void *blob = gd->fdt_blob;
	int node;
	int mrc_flags;

	node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_QRK_MRC);
	if (node < 0) {
		debug("%s: Cannot find MRC node\n", __func__);
		return -EINVAL;
	}

	/*
	 * TODO:
	 *
	 * We need support fast boot (MRC cache) in the future.
	 *
	 * Set boot mode to cold boot for now
	 */
	mrc_params->boot_mode = BM_COLD;

	/*
	 * TODO:
	 *
	 * We need determine ECC by pin strap state
	 *
	 * Disable ECC by default for now
	 */
	mrc_params->ecc_enables = 0;

	mrc_flags = fdtdec_get_int(blob, node, "flags", 0);
	if (mrc_flags & MRC_FLAG_SCRAMBLE_EN)
		mrc_params->scrambling_enables = 1;
	else
		mrc_params->scrambling_enables = 0;

	mrc_params->dram_width = fdtdec_get_int(blob, node, "dram-width", 0);
	mrc_params->ddr_speed = fdtdec_get_int(blob, node, "dram-speed", 0);
	mrc_params->ddr_type = fdtdec_get_int(blob, node, "dram-type", 0);

	mrc_params->rank_enables = fdtdec_get_int(blob, node, "rank-mask", 0);
	mrc_params->channel_enables = fdtdec_get_int(blob, node,
		"chan-mask", 0);
	mrc_params->channel_width = fdtdec_get_int(blob, node,
		"chan-width", 0);
	mrc_params->address_mode = fdtdec_get_int(blob, node, "addr-mode", 0);

	mrc_params->refresh_rate = fdtdec_get_int(blob, node,
		"refresh-rate", 0);
	mrc_params->sr_temp_range = fdtdec_get_int(blob, node,
		"sr-temp-range", 0);
	mrc_params->ron_value = fdtdec_get_int(blob, node,
		"ron-value", 0);
	mrc_params->rtt_nom_value = fdtdec_get_int(blob, node,
		"rtt-nom-value", 0);
	mrc_params->rd_odt_value = fdtdec_get_int(blob, node,
		"rd-odt-value", 0);

	mrc_params->params.density = fdtdec_get_int(blob, node,
		"dram-density", 0);
	mrc_params->params.cl = fdtdec_get_int(blob, node, "dram-cl", 0);
	mrc_params->params.ras = fdtdec_get_int(blob, node, "dram-ras", 0);
	mrc_params->params.wtr = fdtdec_get_int(blob, node, "dram-wtr", 0);
	mrc_params->params.rrd = fdtdec_get_int(blob, node, "dram-rrd", 0);
	mrc_params->params.faw = fdtdec_get_int(blob, node, "dram-faw", 0);

	debug("MRC dram_width %d\n", mrc_params->dram_width);
	debug("MRC rank_enables %d\n", mrc_params->rank_enables);
	debug("MRC ddr_speed %d\n", mrc_params->ddr_speed);
	debug("MRC flags: %s\n",
	      (mrc_params->scrambling_enables) ? "SCRAMBLE_EN" : "");

	debug("MRC density=%d tCL=%d tRAS=%d tWTR=%d tRRD=%d tFAW=%d\n",
	      mrc_params->params.density, mrc_params->params.cl,
	      mrc_params->params.ras, mrc_params->params.wtr,
	      mrc_params->params.rrd, mrc_params->params.faw);

	return 0;
}

int dram_init(void)
{
	struct mrc_params mrc_params;
	int ret;

	memset(&mrc_params, 0, sizeof(struct mrc_params));
	ret = mrc_configure_params(&mrc_params);
	if (ret)
		return ret;

	/* Set up the DRAM by calling the memory reference code */
	mrc_init(&mrc_params);
	if (mrc_params.status)
		return -EIO;

	gd->ram_size = mrc_params.mem_size;
	post_code(POST_DRAM);

	return 0;
}

void dram_init_banksize(void)
{
	gd->bd->bi_dram[0].start = 0;
	gd->bd->bi_dram[0].size = gd->ram_size;
}

/*
 * This function looks for the highest region of memory lower than 4GB which
 * has enough space for U-Boot where U-Boot is aligned on a page boundary.
 * It overrides the default implementation found elsewhere which simply
 * picks the end of ram, wherever that may be. The location of the stack,
 * the relocation address, and how far U-Boot is moved by relocation are
 * set in the global data structure.
 */
ulong board_get_usable_ram_top(ulong total_size)
{
	return gd->ram_size;
}
Commit	Line	Data
828d9af5 BM	1	/*
	2	* Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
	3	*
	4	* SPDX-License-Identifier: GPL-2.0+
	5	*/
	6
	7	#include <common.h>
20c34115 BM	8	#include <errno.h>
20c34115 BM	9	#include <fdtdec.h>
828d9af5	10	#include <asm/post.h>
20c34115	11	#include <asm/arch/mrc.h>
828d9af5 BM	12	#include <asm/arch/quark.h>
	13
	14	DECLARE_GLOBAL_DATA_PTR;
	15
20c34115 BM	16	static int mrc_configure_params(struct mrc_params *mrc_params)
	17	{
	18	const void *blob = gd->fdt_blob;
	19	int node;
	20	int mrc_flags;
	21
	22	node = fdtdec_next_compatible(blob, 0, COMPAT_INTEL_QRK_MRC);
	23	if (node < 0) {
	24	debug("%s: Cannot find MRC node\n", __func__);
	25	return -EINVAL;
	26	}
	27
	28	/*
	29	* TODO:
	30	*
	31	* We need support fast boot (MRC cache) in the future.
	32	*
	33	* Set boot mode to cold boot for now
	34	*/
	35	mrc_params->boot_mode = BM_COLD;
	36
	37	/*
	38	* TODO:
	39	*
	40	* We need determine ECC by pin strap state
	41	*
	42	* Disable ECC by default for now
	43	*/
	44	mrc_params->ecc_enables = 0;
	45
	46	mrc_flags = fdtdec_get_int(blob, node, "flags", 0);
	47	if (mrc_flags & MRC_FLAG_SCRAMBLE_EN)
	48	mrc_params->scrambling_enables = 1;
	49	else
	50	mrc_params->scrambling_enables = 0;
	51
	52	mrc_params->dram_width = fdtdec_get_int(blob, node, "dram-width", 0);
	53	mrc_params->ddr_speed = fdtdec_get_int(blob, node, "dram-speed", 0);
	54	mrc_params->ddr_type = fdtdec_get_int(blob, node, "dram-type", 0);
	55
	56	mrc_params->rank_enables = fdtdec_get_int(blob, node, "rank-mask", 0);
	57	mrc_params->channel_enables = fdtdec_get_int(blob, node,
	58	"chan-mask", 0);
	59	mrc_params->channel_width = fdtdec_get_int(blob, node,
	60	"chan-width", 0);
	61	mrc_params->address_mode = fdtdec_get_int(blob, node, "addr-mode", 0);
	62
	63	mrc_params->refresh_rate = fdtdec_get_int(blob, node,
	64	"refresh-rate", 0);
	65	mrc_params->sr_temp_range = fdtdec_get_int(blob, node,
	66	"sr-temp-range", 0);
	67	mrc_params->ron_value = fdtdec_get_int(blob, node,
	68	"ron-value", 0);
	69	mrc_params->rtt_nom_value = fdtdec_get_int(blob, node,
	70	"rtt-nom-value", 0);
	71	mrc_params->rd_odt_value = fdtdec_get_int(blob, node,
	72	"rd-odt-value", 0);
	73
	74	mrc_params->params.density = fdtdec_get_int(blob, node,
	75	"dram-density", 0);
	76	mrc_params->params.cl = fdtdec_get_int(blob, node, "dram-cl", 0);
	77	mrc_params->params.ras = fdtdec_get_int(blob, node, "dram-ras", 0);
	78	mrc_params->params.wtr = fdtdec_get_int(blob, node, "dram-wtr", 0);
	79	mrc_params->params.rrd = fdtdec_get_int(blob, node, "dram-rrd", 0);
80	mrc_params->params.faw = fdtdec_get_int(blob, node, "dram-faw", 0);
81
82	debug("MRC dram_width %d\n", mrc_params->dram_width);
83	debug("MRC rank_enables %d\n", mrc_params->rank_enables);
84	debug("MRC ddr_speed %d\n", mrc_params->ddr_speed);
85	debug("MRC flags: %s\n",
86	(mrc_params->scrambling_enables) ? "SCRAMBLE_EN" : "");
87
88	debug("MRC density=%d tCL=%d tRAS=%d tWTR=%d tRRD=%d tFAW=%d\n",
89	mrc_params->params.density, mrc_params->params.cl,
90	mrc_params->params.ras, mrc_params->params.wtr,
91	mrc_params->params.rrd, mrc_params->params.faw);
92
93	return 0;
94	}
95
828d9af5 BM	96	int dram_init(void)
828d9af5 BM	97	{
20c34115 BM	98	struct mrc_params mrc_params;
	99	int ret;
	100
	101	memset(&mrc_params, 0, sizeof(struct mrc_params));
	102	ret = mrc_configure_params(&mrc_params);
	103	if (ret)
	104	return ret;
	105
	106	/* Set up the DRAM by calling the memory reference code */
	107	mrc_init(&mrc_params);
	108	if (mrc_params.status)
	109	return -EIO;
	110
	111	gd->ram_size = mrc_params.mem_size;
828d9af5 BM	112	post_code(POST_DRAM);
	113
	114	return 0;
	115	}
	116
	117	void dram_init_banksize(void)
	118	{
	119	gd->bd->bi_dram[0].start = 0;
	120	gd->bd->bi_dram[0].size = gd->ram_size;
	121	}
	122
	123	/*
	124	* This function looks for the highest region of memory lower than 4GB which
	125	* has enough space for U-Boot where U-Boot is aligned on a page boundary.
	126	* It overrides the default implementation found elsewhere which simply
	127	* picks the end of ram, wherever that may be. The location of the stack,
	128	* the relocation address, and how far U-Boot is moved by relocation are
	129	* set in the global data structure.
	130	*/
	131	ulong board_get_usable_ram_top(ulong total_size)
	132	{
	133	return gd->ram_size;
	134	}