[people/ms/u-boot.git] / arch / x86 / include / asm / u-boot-x86.h

/*
 * (C) Copyright 2002
 * Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _U_BOOT_I386_H_
#define _U_BOOT_I386_H_	1

extern char gdt_rom[];

/* cpu/.../cpu.c */
int arch_cpu_init(void);
int x86_cpu_init_f(void);
int cpu_init_f(void);
void setup_gdt(gd_t *id, u64 *gdt_addr);
/*
 * Setup FSP execution environment GDT to use the one we used in
 * arch/x86/cpu/start16.S and reload the segment registers.
 */
void setup_fsp_gdt(void);
int init_cache(void);
int cleanup_before_linux(void);

/* cpu/.../timer.c */
void timer_isr(void *);
typedef void (timer_fnc_t) (void);
int register_timer_isr (timer_fnc_t *isr_func);
unsigned long get_tbclk_mhz(void);
void timer_set_base(uint64_t base);
int i8254_init(void);

/* cpu/.../interrupts.c */
int cpu_init_interrupts(void);

int cleanup_before_linux(void);
int x86_cleanup_before_linux(void);
void x86_enable_caches(void);
void x86_disable_caches(void);
int x86_init_cache(void);
void reset_cpu(ulong addr);
ulong board_get_usable_ram_top(ulong total_size);
int dram_init_banksize(void);
int default_print_cpuinfo(void);

/* Set up a UART which can be used with printch(), printhex8(), etc. */
int setup_internal_uart(int enable);

void setup_pcat_compatibility(void);

void isa_unmap_rom(u32 addr);
u32 isa_map_rom(u32 bus_addr, int size);

/* arch/x86/lib/... */
int video_bios_init(void);

void	board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
void	board_init_f_r(void) __attribute__ ((noreturn));

int arch_misc_init(void);

/* Read the time stamp counter */
static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
{
	uint32_t high, low;
	__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
	return (((uint64_t)high) << 32) | low;
}

/* board/... */
void timer_set_tsc_base(uint64_t new_base);
uint64_t timer_get_tsc(void);
void board_quiesce_devices(void);

void quick_ram_check(void);

#define PCI_VGA_RAM_IMAGE_START		0xc0000

#endif	/* _U_BOOT_I386_H_ */
Commit	Line	Data
2262cfee WD	1	/*
2262cfee WD	2	* (C) Copyright 2002
fa82f871	3	* Daniel Engström, Omicron Ceti AB, daniel@omicron.se.
2262cfee	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
2262cfee WD	6	*/
2262cfee WD	7
3bac3513 WD	8	#ifndef _U_BOOT_I386_H_
3bac3513 WD	9	#define _U_BOOT_I386_H_ 1
2262cfee	10
002610f6 BM	11	extern char gdt_rom[];
002610f6 BM	12
2262cfee	13	/* cpu/.../cpu.c */
8b37c769	14	int arch_cpu_init(void);
0ea76e92	15	int x86_cpu_init_f(void);
1c409bc7	16	int cpu_init_f(void);
9e6c572f	17	void setup_gdt(gd_t id, u64 gdt_addr);
002610f6 BM	18	/*
	19	* Setup FSP execution environment GDT to use the one we used in
	20	* arch/x86/cpu/start16.S and reload the segment registers.
	21	*/
	22	void setup_fsp_gdt(void);
d653244b	23	int init_cache(void);
f30fc4de	24	int cleanup_before_linux(void);
8c63d476 GR	25
	26	/* cpu/.../timer.c */
	27	void timer_isr(void *);
	28	typedef void (timer_fnc_t) (void);
	29	int register_timer_isr (timer_fnc_t *isr_func);
e761ecdb SG	30	unsigned long get_tbclk_mhz(void);
e761ecdb SG	31	void timer_set_base(uint64_t base);
da3fe247	32	int i8254_init(void);
8c63d476	33
abf0cd3d GR	34	/* cpu/.../interrupts.c */
	35	int cpu_init_interrupts(void);
	36
e1ffd817 SG	37	int cleanup_before_linux(void);
	38	int x86_cleanup_before_linux(void);
	39	void x86_enable_caches(void);
	40	void x86_disable_caches(void);
	41	int x86_init_cache(void);
	42	void reset_cpu(ulong addr);
	43	ulong board_get_usable_ram_top(ulong total_size);
76b00aca	44	int dram_init_banksize(void);
727c1a98	45	int default_print_cpuinfo(void);
e1ffd817	46
447f8b01	47	/* Set up a UART which can be used with printch(), printhex8(), etc. */
d521197d	48	int setup_internal_uart(int enable);
447f8b01	49
79ea6b87 GR	50	void setup_pcat_compatibility(void);
79ea6b87 GR	51
7a8e9bed WD	52	void isa_unmap_rom(u32 addr);
	53	u32 isa_map_rom(u32 bus_addr, int size);
	54
fea25720	55	/* arch/x86/lib/... */
7a8e9bed	56	int video_bios_init(void);
2262cfee	57
f48dd6fc GR	58	void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
f48dd6fc GR	59	void board_init_f_r(void) __attribute__ ((noreturn));
2262cfee	60
afbf1404 BM	61	int arch_misc_init(void);
afbf1404 BM	62
2f899e03	63	/* Read the time stamp counter */
d8819f94	64	static inline __attribute__((no_instrument_function)) uint64_t rdtsc(void)
2f899e03 VB	65	{
	66	uint32_t high, low;
	67	__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high));
	68	return (((uint64_t)high) << 32) \| low;
	69	}
	70
	71	/* board/... */
	72	void timer_set_tsc_base(uint64_t new_base);
	73	uint64_t timer_get_tsc(void);
b7b8410a	74	void board_quiesce_devices(void);
2f899e03	75
65dd74a6 SG	76	void quick_ram_check(void);
65dd74a6 SG	77
bdc88d4e SG	78	#define PCI_VGA_RAM_IMAGE_START 0xc0000
bdc88d4e SG	79
3bac3513	80	#endif /* _U_BOOT_I386_H_ */