[people/ms/u-boot.git] / arch / x86 / lib / init_helpers.c

/*
 * (C) Copyright 2011
 * Graeme Russ, <graeme.russ@gmail.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <linux/errno.h>
#include <asm/mtrr.h>

DECLARE_GLOBAL_DATA_PTR;

/* Get the top of usable RAM */
__weak ulong board_get_usable_ram_top(ulong total_size)
{
	return gd->ram_size;
}

int init_cache_f_r(void)
{
#if defined(CONFIG_X86_RESET_VECTOR) & !defined(CONFIG_HAVE_FSP)
	int ret;

	ret = mtrr_commit(false);
	/* If MTRR MSR is not implemented by the processor, just ignore it */
	if (ret && ret != -ENOSYS)
		return ret;
#endif
	/* Initialise the CPU cache(s) */
	return init_cache();
}
Commit	Line	Data
d47ab0ec GR	1	/*
	2	* (C) Copyright 2011
	3	* Graeme Russ, <graeme.russ@gmail.com>
	4	*
1a459660	5	* SPDX-License-Identifier: GPL-2.0+
d47ab0ec	6	*/
c17ca6b5	7
d47ab0ec	8	#include <common.h>
1221ce45	9	#include <linux/errno.h>
db55bd7d	10	#include <asm/mtrr.h>
d47ab0ec GR	11
	12	DECLARE_GLOBAL_DATA_PTR;
	13
5e98947f SG	14	/* Get the top of usable RAM */
5e98947f SG	15	__weak ulong board_get_usable_ram_top(ulong total_size)
a1d57b7a	16	{
5e98947f SG	17	return gd->ram_size;
	18	}
	19
a1d57b7a GR	20	int init_cache_f_r(void)
a1d57b7a GR	21	{
db55bd7d SG	22	#if defined(CONFIG_X86_RESET_VECTOR) & !defined(CONFIG_HAVE_FSP)
	23	int ret;
	24
	25	ret = mtrr_commit(false);
3b621cca BM	26	/* If MTRR MSR is not implemented by the processor, just ignore it */
3b621cca BM	27	if (ret && ret != -ENOSYS)
db55bd7d SG	28	return ret;
db55bd7d SG	29	#endif
a1d57b7a GR	30	/* Initialise the CPU cache(s) */
	31	return init_cache();
	32	}