[people/ms/u-boot.git] / board / AndesTech / adp-ag101p / adp-ag101p.c

/*
 * Copyright (C) 2011 Andes Technology Corporation
 * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
 * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <netdev.h>
#include <asm/io.h>

#include <faraday/ftsdc010.h>
#include <faraday/ftsmc020.h>

DECLARE_GLOBAL_DATA_PTR;

/*
 * Miscellaneous platform dependent initializations
 */

int board_init(void)
{
	/*
	 * refer to BOOT_PARAMETER_PA_BASE within
	 * "linux/arch/nds32/include/asm/misc_spec.h"
	 */
	gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
	gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;

	return 0;
}

int dram_init(void)
{
	unsigned long sdram_base = PHYS_SDRAM_0;
	unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
	unsigned long actual_size;

	actual_size = get_ram_size((void *)sdram_base, expected_size);

	gd->ram_size = actual_size;

	if (expected_size != actual_size) {
		printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
				actual_size >> 20, expected_size >> 20);
	}

	return 0;
}

int dram_init_banksize(void)
{
	gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
	gd->bd->bi_dram[0].size =  PHYS_SDRAM_0_SIZE;
	gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
	gd->bd->bi_dram[1].size =  PHYS_SDRAM_1_SIZE;

	return 0;
}

int board_eth_init(bd_t *bd)
{
	return ftmac100_initialize(bd);
}

ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
{
	if (banknum == 0) {	/* non-CFI boot flash */
		info->portwidth = FLASH_CFI_8BIT;
		info->chipwidth = FLASH_CFI_BY8;
		info->interface = FLASH_CFI_X8;
		return 1;
	} else {
		return 0;
	}
}

int board_mmc_init(bd_t *bis)
{
	ftsdc010_mmc_init(0);
	return 0;
}
Commit	Line	Data
6cb144bc ML	1	/*
	2	* Copyright (C) 2011 Andes Technology Corporation
	3	* Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com>
	4	* Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
6cb144bc ML	7	*/
	8
	9	#include <common.h>
	10	#include <netdev.h>
	11	#include <asm/io.h>
	12
	13	#include <faraday/ftsdc010.h>
	14	#include <faraday/ftsmc020.h>
	15
	16	DECLARE_GLOBAL_DATA_PTR;
	17
	18	/*
	19	* Miscellaneous platform dependent initializations
	20	*/
	21
	22	int board_init(void)
	23	{
	24	/*
	25	* refer to BOOT_PARAMETER_PA_BASE within
	26	* "linux/arch/nds32/include/asm/misc_spec.h"
	27	*/
	28	gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P;
	29	gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400;
	30
6cb144bc ML	31	return 0;
	32	}
	33
	34	int dram_init(void)
	35	{
	36	unsigned long sdram_base = PHYS_SDRAM_0;
3c016704	37	unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE;
6cb144bc ML	38	unsigned long actual_size;
	39
	40	actual_size = get_ram_size((void *)sdram_base, expected_size);
	41
	42	gd->ram_size = actual_size;
	43
	44	if (expected_size != actual_size) {
	45	printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
	46	actual_size >> 20, expected_size >> 20);
	47	}
	48
	49	return 0;
	50	}
	51
76b00aca	52	int dram_init_banksize(void)
3c016704	53	{
	54	gd->bd->bi_dram[0].start = PHYS_SDRAM_0;
	55	gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE;
	56	gd->bd->bi_dram[1].start = PHYS_SDRAM_1;
	57	gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE;
76b00aca SG	58
76b00aca SG	59	return 0;
3c016704	60	}
3c016704	61
6cb144bc ML	62	int board_eth_init(bd_t *bd)
	63	{
	64	return ftmac100_initialize(bd);
	65	}
	66
	67	ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info)
	68	{
	69	if (banknum == 0) { /* non-CFI boot flash */
	70	info->portwidth = FLASH_CFI_8BIT;
	71	info->chipwidth = FLASH_CFI_BY8;
	72	info->interface = FLASH_CFI_X8;
	73	return 1;
	74	} else {
	75	return 0;
	76	}
	77	}
	78
	79	int board_mmc_init(bd_t *bis)
	80	{
	81	ftsdc010_mmc_init(0);
	82	return 0;
	83	}