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[people/ms/u-boot.git] / board / MAI / bios_emulator / scitech / include / x86emu / regs.h
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1/****************************************************************************
2*
3* Realmode X86 Emulator Library
4*
5* Copyright (C) 1996-1999 SciTech Software, Inc.
6* Copyright (C) David Mosberger-Tang
7* Copyright (C) 1999 Egbert Eich
8*
9* ========================================================================
10*
11* Permission to use, copy, modify, distribute, and sell this software and
12* its documentation for any purpose is hereby granted without fee,
13* provided that the above copyright notice appear in all copies and that
14* both that copyright notice and this permission notice appear in
15* supporting documentation, and that the name of the authors not be used
16* in advertising or publicity pertaining to distribution of the software
17* without specific, written prior permission. The authors makes no
18* representations about the suitability of this software for any purpose.
19* It is provided "as is" without express or implied warranty.
20*
21* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
22* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
23* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
24* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
25* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
26* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
27* PERFORMANCE OF THIS SOFTWARE.
28*
29* ========================================================================
30*
31* Language: ANSI C
32* Environment: Any
33* Developer: Kendall Bennett
34*
35* Description: Header file for x86 register definitions.
36*
37****************************************************************************/
38
39#ifndef __X86EMU_REGS_H
40#define __X86EMU_REGS_H
41
42/*---------------------- Macros and type definitions ----------------------*/
43
44#pragma pack(1)
45
46/*
47 * General EAX, EBX, ECX, EDX type registers. Note that for
48 * portability, and speed, the issue of byte swapping is not addressed
49 * in the registers. All registers are stored in the default format
50 * available on the host machine. The only critical issue is that the
51 * registers should line up EXACTLY in the same manner as they do in
52 * the 386. That is:
53 *
54 * EAX & 0xff === AL
55 * EAX & 0xffff == AX
56 *
57 * etc. The result is that alot of the calculations can then be
58 * done using the native instruction set fully.
59 */
60
61#ifdef __BIG_ENDIAN__
62
63typedef struct {
64 u32 e_reg;
65 } I32_reg_t;
66
67typedef struct {
68 u16 filler0, x_reg;
69 } I16_reg_t;
70
71typedef struct {
72 u8 filler0, filler1, h_reg, l_reg;
73 } I8_reg_t;
74
75#else /* !__BIG_ENDIAN__ */
76
77typedef struct {
78 u32 e_reg;
79 } I32_reg_t;
80
81typedef struct {
82 u16 x_reg;
83 } I16_reg_t;
84
85typedef struct {
86 u8 l_reg, h_reg;
87 } I8_reg_t;
88
89#endif /* BIG_ENDIAN */
90
91typedef union {
92 I32_reg_t I32_reg;
93 I16_reg_t I16_reg;
94 I8_reg_t I8_reg;
95 } i386_general_register;
96
97struct i386_general_regs {
98 i386_general_register A, B, C, D;
99 };
100
101typedef struct i386_general_regs Gen_reg_t;
102
103struct i386_special_regs {
104 i386_general_register SP, BP, SI, DI, IP;
105 u32 FLAGS;
106 };
107
8bde7f77 108/*
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109 * Segment registers here represent the 16 bit quantities
110 * CS, DS, ES, SS.
111 */
112
113struct i386_segment_regs {
114 u16 CS, DS, SS, ES, FS, GS;
115 };
116
117/* 8 bit registers */
118#define R_AH gen.A.I8_reg.h_reg
119#define R_AL gen.A.I8_reg.l_reg
120#define R_BH gen.B.I8_reg.h_reg
121#define R_BL gen.B.I8_reg.l_reg
122#define R_CH gen.C.I8_reg.h_reg
123#define R_CL gen.C.I8_reg.l_reg
124#define R_DH gen.D.I8_reg.h_reg
125#define R_DL gen.D.I8_reg.l_reg
126
127/* 16 bit registers */
128#define R_AX gen.A.I16_reg.x_reg
129#define R_BX gen.B.I16_reg.x_reg
130#define R_CX gen.C.I16_reg.x_reg
131#define R_DX gen.D.I16_reg.x_reg
132
133/* 32 bit extended registers */
134#define R_EAX gen.A.I32_reg.e_reg
135#define R_EBX gen.B.I32_reg.e_reg
136#define R_ECX gen.C.I32_reg.e_reg
137#define R_EDX gen.D.I32_reg.e_reg
138
139/* special registers */
140#define R_SP spc.SP.I16_reg.x_reg
141#define R_BP spc.BP.I16_reg.x_reg
142#define R_SI spc.SI.I16_reg.x_reg
143#define R_DI spc.DI.I16_reg.x_reg
144#define R_IP spc.IP.I16_reg.x_reg
145#define R_FLG spc.FLAGS
146
147/* special registers */
148#define R_SP spc.SP.I16_reg.x_reg
149#define R_BP spc.BP.I16_reg.x_reg
150#define R_SI spc.SI.I16_reg.x_reg
151#define R_DI spc.DI.I16_reg.x_reg
152#define R_IP spc.IP.I16_reg.x_reg
153#define R_FLG spc.FLAGS
154
155/* special registers */
156#define R_ESP spc.SP.I32_reg.e_reg
157#define R_EBP spc.BP.I32_reg.e_reg
158#define R_ESI spc.SI.I32_reg.e_reg
159#define R_EDI spc.DI.I32_reg.e_reg
160#define R_EIP spc.IP.I32_reg.e_reg
161#define R_EFLG spc.FLAGS
162
163/* segment registers */
164#define R_CS seg.CS
165#define R_DS seg.DS
166#define R_SS seg.SS
167#define R_ES seg.ES
168#define R_FS seg.FS
169#define R_GS seg.GS
170
171/* flag conditions */
172#define FB_CF 0x0001 /* CARRY flag */
173#define FB_PF 0x0004 /* PARITY flag */
174#define FB_AF 0x0010 /* AUX flag */
175#define FB_ZF 0x0040 /* ZERO flag */
176#define FB_SF 0x0080 /* SIGN flag */
177#define FB_TF 0x0100 /* TRAP flag */
178#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
179#define FB_DF 0x0400 /* DIR flag */
180#define FB_OF 0x0800 /* OVERFLOW flag */
181
182/* 80286 and above always have bit#1 set */
183#define F_ALWAYS_ON (0x0002) /* flag bits always on */
184
185/*
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186 * Define a mask for only those flag bits we will ever pass back
187 * (via PUSHF)
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188 */
189#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
190
191/* following bits masked in to a 16bit quantity */
192
193#define F_CF 0x0001 /* CARRY flag */
194#define F_PF 0x0004 /* PARITY flag */
195#define F_AF 0x0010 /* AUX flag */
196#define F_ZF 0x0040 /* ZERO flag */
197#define F_SF 0x0080 /* SIGN flag */
198#define F_TF 0x0100 /* TRAP flag */
199#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
200#define F_DF 0x0400 /* DIR flag */
201#define F_OF 0x0800 /* OVERFLOW flag */
202
203#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
204#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
205#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
206#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
207#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
208
209#define CONDITIONAL_SET_FLAG(COND,FLAG) \
210 if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
211
212#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
213#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
214#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
215
216#define F_ALL_CALC 0xff0000 /* All have been calced */
217
218/*
219 * Emulator machine state.
220 * Segment usage control.
221 */
222#define SYSMODE_SEG_DS_SS 0x00000001
223#define SYSMODE_SEGOVR_CS 0x00000002
224#define SYSMODE_SEGOVR_DS 0x00000004
225#define SYSMODE_SEGOVR_ES 0x00000008
226#define SYSMODE_SEGOVR_FS 0x00000010
227#define SYSMODE_SEGOVR_GS 0x00000020
228#define SYSMODE_SEGOVR_SS 0x00000040
229#define SYSMODE_PREFIX_REPE 0x00000080
230#define SYSMODE_PREFIX_REPNE 0x00000100
231#define SYSMODE_PREFIX_DATA 0x00000200
232#define SYSMODE_PREFIX_ADDR 0x00000400
233#define SYSMODE_INTR_PENDING 0x10000000
234#define SYSMODE_EXTRN_INTR 0x20000000
235#define SYSMODE_HALTED 0x40000000
236
237#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
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238 SYSMODE_SEGOVR_CS | \
239 SYSMODE_SEGOVR_DS | \
240 SYSMODE_SEGOVR_ES | \
241 SYSMODE_SEGOVR_FS | \
242 SYSMODE_SEGOVR_GS | \
243 SYSMODE_SEGOVR_SS)
c7de829c 244#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
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245 SYSMODE_SEGOVR_CS | \
246 SYSMODE_SEGOVR_DS | \
247 SYSMODE_SEGOVR_ES | \
248 SYSMODE_SEGOVR_FS | \
249 SYSMODE_SEGOVR_GS | \
250 SYSMODE_SEGOVR_SS | \
251 SYSMODE_PREFIX_DATA | \
252 SYSMODE_PREFIX_ADDR)
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253
254#define INTR_SYNCH 0x1
255#define INTR_ASYNCH 0x2
256#define INTR_HALTED 0x4
257
258typedef struct {
259 struct i386_general_regs gen;
260 struct i386_special_regs spc;
261 struct i386_segment_regs seg;
262 /*
263 * MODE contains information on:
264 * REPE prefix 2 bits repe,repne
265 * SEGMENT overrides 5 bits normal,DS,SS,CS,ES
266 * Delayed flag set 3 bits (zero, signed, parity)
267 * reserved 6 bits
268 * interrupt # 8 bits instruction raised interrupt
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269 * BIOS video segregs 4 bits
270 * Interrupt Pending 1 bits
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271 * Extern interrupt 1 bits
272 * Halted 1 bits
273 */
274 long mode;
275 u8 intno;
276 volatile int intr; /* mask of pending interrupts */
277 int debug;
278#ifdef DEBUG
279 int check;
280 u16 saved_ip;
281 u16 saved_cs;
282 int enc_pos;
283 int enc_str_pos;
284 char decode_buf[32]; /* encoded byte stream */
285 char decoded_buf[256]; /* disassembled strings */
286#endif
287 } X86EMU_regs;
288
289/****************************************************************************
290REMARKS:
291Structure maintaining the emulator machine state.
292
293MEMBERS:
294x86 - X86 registers
295mem_base - Base real mode memory for the emulator
296mem_size - Size of the real mode memory block for the emulator
297****************************************************************************/
298typedef struct {
299 X86EMU_regs x86;
300 unsigned long mem_base;
301 unsigned long mem_size;
302 void* private;
303 } X86EMU_sysEnv;
304
305#pragma pack()
306
307/*----------------------------- Global Variables --------------------------*/
308
309#ifdef __cplusplus
310extern "C" { /* Use "C" linkage when in C++ mode */
311#endif
312
313/* Global emulator machine state.
314 *
315 * We keep it global to avoid pointer dereferences in the code for speed.
316 */
317
318extern X86EMU_sysEnv _X86EMU_env;
319#define M _X86EMU_env
8bde7f77 320
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321/*-------------------------- Function Prototypes --------------------------*/
322
323/* Function to log information at runtime */
324
8bde7f77 325/*void printk(const char *fmt, ...); */
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326
327#ifdef __cplusplus
328} /* End of "C" linkage for C++ */
329#endif
330
331#endif /* __X86EMU_REGS_H */