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c157d8e2 | 1 | /* |
1a459660 | 2 | * SPDX-License-Identifier: GPL-2.0+ |
c157d8e2 SR |
3 | */ |
4 | ||
25ddd1fb | 5 | #include <asm-offsets.h> |
c157d8e2 | 6 | #include <ppc_asm.tmpl> |
cf6eb6da | 7 | #include <asm/mmu.h> |
c157d8e2 SR |
8 | #include <config.h> |
9 | ||
c157d8e2 SR |
10 | /************************************************************************** |
11 | * TLB TABLE | |
12 | * | |
13 | * This table is used by the cpu boot code to setup the initial tlb | |
14 | * entries. Rather than make broad assumptions in the cpu source tree, | |
15 | * this table lets each board set things up however they like. | |
16 | * | |
17 | * Pointer to the table is returned in r1 | |
18 | * | |
19 | *************************************************************************/ | |
20 | ||
21 | .section .bootpg,"ax" | |
22 | .globl tlbtab | |
23 | ||
24 | tlbtab: | |
25 | tlbtab_start | |
84286386 SR |
26 | |
27 | /* | |
28 | * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the | |
29 | * speed up boot process. It is patched after relocation to enable SA_I | |
30 | */ | |
cf6eb6da | 31 | tlbentry( CONFIG_SYS_BOOT_BASE_ADDR, SZ_256M, CONFIG_SYS_BOOT_BASE_ADDR, 0, AC_RWX | SA_G/*|SA_I*/) |
84286386 SR |
32 | |
33 | /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ | |
cf6eb6da | 34 | tlbentry( CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G ) |
84286386 | 35 | |
cf6eb6da SR |
36 | tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_RWX | SA_IG ) |
37 | tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, CONFIG_SYS_PCI_BASE, 0, AC_RW | SA_IG ) | |
38 | tlbentry( CONFIG_SYS_NVRAM_BASE_ADDR, SZ_256M, CONFIG_SYS_NVRAM_BASE_ADDR, 0, AC_RWX | SA_W|SA_I ) | |
c157d8e2 SR |
39 | |
40 | /* PCI */ | |
cf6eb6da SR |
41 | tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 0, AC_RW | SA_IG ) |
42 | tlbentry( CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 0, AC_RW | SA_IG ) | |
43 | tlbentry( CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 0, AC_RW | SA_IG ) | |
44 | tlbentry( CONFIG_SYS_PCI_MEMBASE3, SZ_256M, CONFIG_SYS_PCI_MEMBASE3, 0, AC_RW | SA_IG ) | |
c157d8e2 SR |
45 | |
46 | /* USB 2.0 Device */ | |
cf6eb6da | 47 | tlbentry( CONFIG_SYS_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_RW | SA_IG ) |
c157d8e2 SR |
48 | |
49 | tlbtab_end |